linux-sgx.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
To: <x86@kernel.org>, <platform-driver-x86@vger.kernel.org>
Cc: <dave.hansen@intel.com>, <sean.j.christopherson@intel.com>,
	<nhorman@redhat.com>, <npmccallum@redhat.com>,
	<linux-sgx@vger.kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>,
	"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v12 10/13] x86/sgx: sgx_einit()
Date: Tue, 3 Jul 2018 21:19:55 +0300	[thread overview]
Message-ID: <20180703182118.15024-11-jarkko.sakkinen@linux.intel.com> (raw)
In-Reply-To: <20180703182118.15024-1-jarkko.sakkinen@linux.intel.com>

From: Sean Christopherson <sean.j.christopherson@intel.com>

Implements function to perform ENCLS(EINIT) leaf function that initializes
an enclave, which can be used by a driver for running enclaves and VMMs.

Writing the LE hash MSRs is extraordinarily expensive, e.g. 3-4x slower
than normal MSRs, so we use a per-cpu cache to track the last known value
of the MSRs to avoid unnecessarily writing the MSRs with the current value.

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
 arch/x86/include/asm/sgx.h      |  2 ++
 arch/x86/kernel/cpu/intel_sgx.c | 46 +++++++++++++++++++++++++++++++++
 2 files changed, 48 insertions(+)

diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h
index 4f5f32b37b5d..bc09b4576d68 100644
--- a/arch/x86/include/asm/sgx.h
+++ b/arch/x86/include/asm/sgx.h
@@ -215,6 +215,8 @@ void *sgx_get_page(struct sgx_epc_page *ptr);
 void sgx_put_page(void *epc_page_ptr);
 struct page *sgx_get_backing(struct file *file, pgoff_t index);
 void sgx_put_backing(struct page *backing_page, bool write);
+int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken *token,
+	      struct sgx_epc_page *secs_page, u64 le_pubkey_hash[4]);
 
 #define SGX_FN(name, params...)		\
 {					\
diff --git a/arch/x86/kernel/cpu/intel_sgx.c b/arch/x86/kernel/cpu/intel_sgx.c
index b52bab8eff99..53dd91cb7a49 100644
--- a/arch/x86/kernel/cpu/intel_sgx.c
+++ b/arch/x86/kernel/cpu/intel_sgx.c
@@ -31,6 +31,12 @@ static int sgx_nr_epc_banks;
 static struct task_struct *ksgxswapd_tsk;
 static DECLARE_WAIT_QUEUE_HEAD(ksgxswapd_waitq);
 
+/*
+ * A cache for last known values of IA32_SGXLEPUBKEYHASHx MSRs. Cache entries
+ * are initialized when they are first used by sgx_einit().
+ */
+static DEFINE_PER_CPU(u64 [4], sgx_le_pubkey_hash_cache);
+
 static void sgx_swap_cluster(void)
 {
 	struct sgx_epc_page *cluster[SGX_NR_TO_SCAN + 1];
@@ -255,6 +261,46 @@ void sgx_put_backing(struct page *backing_page, bool write)
 }
 EXPORT_SYMBOL(sgx_put_backing);
 
+/**
+ * sgx_einit - EINIT an enclave with the appropriate LE pubkey hash
+ * @sigstruct:		a pointer to the enclave's sigstruct
+ * @token:		a pointer to the enclave's EINIT token
+ * @secs_page:		a pointer to the enclave's SECS EPC page
+ * @le_pubkey_hash:	the desired LE pubkey hash for EINIT
+ */
+int sgx_einit(struct sgx_sigstruct *sigstruct, struct sgx_einittoken *token,
+	      struct sgx_epc_page *secs_page, u64 le_pubkey_hash[4])
+{
+	u64 __percpu *cache;
+	void *secs;
+	int i, ret;
+
+	secs = sgx_get_page(secs_page);
+
+	if (!sgx_lc_enabled) {
+		ret = __einit(sigstruct, token, secs);
+		goto out;
+	}
+
+	cache = per_cpu(sgx_le_pubkey_hash_cache, smp_processor_id());
+
+	preempt_disable();
+	for (i = 0; i < 4; i++) {
+		if (le_pubkey_hash[i] == cache[i])
+			continue;
+
+		wrmsrl(MSR_IA32_SGXLEPUBKEYHASH0 + i, le_pubkey_hash[i]);
+		cache[i] = le_pubkey_hash[i];
+	}
+	ret = __einit(sigstruct, token, secs);
+	preempt_enable();
+
+out:
+	sgx_put_page(secs);
+	return ret;
+}
+EXPORT_SYMBOL(sgx_einit);
+
 static __init int sgx_init_epc_bank(unsigned long addr, unsigned long size,
 				    unsigned long index,
 				    struct sgx_epc_bank *bank)
-- 
2.17.1

  parent reply	other threads:[~2018-07-03 18:19 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-03 18:19 [PATCH v12 00/13] Intel SGX1 support Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 01/13] x86/sgx: updated MAINTAINERS Jarkko Sakkinen
2018-07-03 18:41   ` Thomas Gleixner
2018-07-04 17:23     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 02/13] x86/sgx: add SGX definitions to cpufeature Jarkko Sakkinen
2018-07-03 18:48   ` Thomas Gleixner
2018-07-04 17:24     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 03/13] x86/sgx: add SGX definitions to msr-index.h Jarkko Sakkinen
2018-07-03 18:31   ` Dave Hansen
2018-07-04 17:25     ` Jarkko Sakkinen
2018-07-05 16:05     ` Jarkko Sakkinen
2018-07-05 16:08       ` Jarkko Sakkinen
2018-07-05 16:09       ` Dave Hansen
2018-07-03 18:51   ` Thomas Gleixner
2018-07-04 17:26     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 04/13] x86/cpufeatures: add Intel-defined SGX leaf CPUID_12_EAX Jarkko Sakkinen
2018-07-03 18:54   ` Thomas Gleixner
2018-07-04 17:27     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 05/13] x86/sgx: architectural structures Jarkko Sakkinen
2018-07-03 19:02   ` Dave Hansen
2018-07-04 18:03     ` Jarkko Sakkinen
2018-07-03 19:04   ` Thomas Gleixner
2018-07-04 18:07     ` Jarkko Sakkinen
2018-07-03 21:22   ` Dave Hansen
2018-07-04 18:09     ` Jarkko Sakkinen
2018-07-05 15:31   ` Dave Hansen
2018-07-05 20:09     ` Jarkko Sakkinen
2018-07-05 21:50       ` hpa
2018-07-10  8:06         ` Andy Shevchenko
2018-07-10 11:57           ` Thomas Gleixner
2018-07-03 18:19 ` [PATCH v12 06/13] x86/sgx: detect Intel SGX Jarkko Sakkinen
2018-07-03 19:09   ` Thomas Gleixner
2018-07-04 17:28     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 07/13] x86/sgx: data structures for tracking available EPC pages Jarkko Sakkinen
2018-07-03 19:03   ` Dave Hansen
2018-07-04 17:34     ` Jarkko Sakkinen
2018-07-03 19:46   ` Thomas Gleixner
2018-07-03 20:26     ` Randy Dunlap
2018-07-03 20:44       ` Thomas Gleixner
2018-07-04 17:36       ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 08/13] x86/sgx: wrappers for ENCLS opcode leaf functions Jarkko Sakkinen
2018-07-03 20:16   ` Thomas Gleixner
2018-07-04 17:33     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 09/13] x86/sgx: EPC page allocation routines Jarkko Sakkinen
2018-07-03 20:41   ` Thomas Gleixner
2018-07-04  4:25     ` Borislav Petkov
2018-07-05 18:21       ` Jarkko Sakkinen
2018-07-04 18:24     ` Jarkko Sakkinen
2018-07-03 18:19 ` Jarkko Sakkinen [this message]
2018-07-03 18:19 ` [PATCH v12 11/13] platform/x86: Intel SGX driver Jarkko Sakkinen
2018-07-25 15:52   ` Jethro Beekman
2018-07-28 13:23     ` Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 12/13] platform/x86: ptrace() support for the " Jarkko Sakkinen
2018-07-03 18:19 ` [PATCH v12 13/13] x86/sgx: driver documentation Jarkko Sakkinen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180703182118.15024-11-jarkko.sakkinen@linux.intel.com \
    --to=jarkko.sakkinen@linux.intel.com \
    --cc=dave.hansen@intel.com \
    --cc=hpa@zytor.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-sgx@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=nhorman@redhat.com \
    --cc=npmccallum@redhat.com \
    --cc=platform-driver-x86@vger.kernel.org \
    --cc=sean.j.christopherson@intel.com \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).