* [PATCH 3/3] ARM: shmobile: r8a7790: add the I2C bus clock
@ 2013-09-10 11:39 Ulrich Hecht
2014-01-08 16:31 ` [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks Valentine Barshak
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Ulrich Hecht @ 2013-09-10 11:39 UTC (permalink / raw)
To: linux-sh
From: Nguyen Viet Dung <nv-dung@jinso.co.jp>
This patch adds the I2C bus clock.
Signed-off-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
---
arch/arm/mach-shmobile/clock-r8a7790.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index d99b87b..654d922 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -52,6 +52,7 @@
#define SMSTPCR5 0xe6150144
#define SMSTPCR7 0xe615014c
#define SMSTPCR8 0xe6150990
+#define SMSTPCR9 0xe6150994
#define SDCKCR 0xE6150074
#define SD2CKCR 0xE6150078
@@ -181,6 +182,7 @@ static struct clk div6_clks[DIV6_NR] = {
/* MSTP */
enum {
+ MSTP931, MSTP930, MSTP929, MSTP928,
MSTP813,
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
MSTP717, MSTP716,
@@ -192,6 +194,10 @@ enum {
};
static struct clk mstp_clks[MSTP_NR] = {
+ [MSTP931] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 31, 0), /* I2C0 */
+ [MSTP930] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 30, 0), /* I2C1 */
+ [MSTP929] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 29, 0), /* I2C2 */
+ [MSTP928] = SH_CLK_MSTP32(&hp_clk, SMSTPCR9, 28, 0), /* I2C3 */
[MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */
[MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */
[MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */
@@ -247,6 +253,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("mp", &mp_clk),
CLKDEV_CON_ID("qspi", &qspi_clk),
CLKDEV_CON_ID("cp", &cp_clk),
+ CLKDEV_CON_ID("peripheral_clk", &hp_clk),
/* DIV4 */
CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]),
@@ -286,6 +293,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("ee220000.mmcif", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
+ CLKDEV_DEV_ID("i2c-rcar_h2.0", &mstp_clks[MSTP931]),
+ CLKDEV_DEV_ID("i2c-rcar_h2.1", &mstp_clks[MSTP930]),
+ CLKDEV_DEV_ID("i2c-rcar_h2.2", &mstp_clks[MSTP929]),
+ CLKDEV_DEV_ID("i2c-rcar_h2.3", &mstp_clks[MSTP928]),
};
#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \
--
1.8.1.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks
2013-09-10 11:39 [PATCH 3/3] ARM: shmobile: r8a7790: add the I2C bus clock Ulrich Hecht
@ 2014-01-08 16:31 ` Valentine Barshak
2014-01-09 8:19 ` Simon Horman
2014-01-09 14:26 ` Valentine
2 siblings, 0 replies; 4+ messages in thread
From: Valentine Barshak @ 2014-01-08 16:31 UTC (permalink / raw)
To: linux-sh
This adds SATA[01] clock support to R8A7790 SoC.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
---
arch/arm/mach-shmobile/clock-r8a7790.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index d1b1b8f..b22f89d 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -196,6 +196,7 @@ enum {
MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
MSTP931, MSTP930, MSTP929, MSTP928,
MSTP917,
+ MSTP815, MSTP814,
MSTP813,
MSTP811, MSTP810, MSTP809, MSTP808,
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
@@ -225,6 +226,8 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
+ [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
+ [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
[MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */
[MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */
@@ -339,6 +342,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]),
CLKDEV_DEV_ID("pci-rcar-gen2.2", &mstp_clks[MSTP703]),
+ CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]),
+ CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
/* ICK */
CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
--
1.8.3.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks
2013-09-10 11:39 [PATCH 3/3] ARM: shmobile: r8a7790: add the I2C bus clock Ulrich Hecht
2014-01-08 16:31 ` [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks Valentine Barshak
@ 2014-01-09 8:19 ` Simon Horman
2014-01-09 14:26 ` Valentine
2 siblings, 0 replies; 4+ messages in thread
From: Simon Horman @ 2014-01-09 8:19 UTC (permalink / raw)
To: linux-sh
On Wed, Jan 08, 2014 at 08:31:25PM +0400, Valentine Barshak wrote:
> This adds SATA[01] clock support to R8A7790 SoC.
>
> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
> ---
> arch/arm/mach-shmobile/clock-r8a7790.c | 5 +++++
> 1 file changed, 5 insertions(+)
Thanks, I have queued this up.
As I did so without 2/3 of this series applied there were some
minor conflicts. Please check that the following is correct.
From: Valentine Barshak <valentine.barshak@cogentembedded.com>
ARM: shmobile: r8a7790: Add SATA clocks
This adds SATA[01] clock support to R8A7790 SoC.
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
[horms+renesas@verge.net.au: resolved trivial conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index b2b2323..f25b43a 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -196,6 +196,7 @@ enum {
MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
MSTP931, MSTP930, MSTP929, MSTP928,
MSTP917,
+ MSTP815, MSTP814,
MSTP813,
MSTP811, MSTP810, MSTP809, MSTP808,
MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
@@ -226,6 +227,8 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
[MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
[MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
+ [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
+ [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
[MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
[MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */
[MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */
@@ -340,6 +343,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
+ CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]),
+ CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
/* ICK */
CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks
2013-09-10 11:39 [PATCH 3/3] ARM: shmobile: r8a7790: add the I2C bus clock Ulrich Hecht
2014-01-08 16:31 ` [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks Valentine Barshak
2014-01-09 8:19 ` Simon Horman
@ 2014-01-09 14:26 ` Valentine
2 siblings, 0 replies; 4+ messages in thread
From: Valentine @ 2014-01-09 14:26 UTC (permalink / raw)
To: linux-sh
On 01/09/2014 12:19 PM, Simon Horman wrote:
> On Wed, Jan 08, 2014 at 08:31:25PM +0400, Valentine Barshak wrote:
>> This adds SATA[01] clock support to R8A7790 SoC.
>>
>> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
>> ---
>> arch/arm/mach-shmobile/clock-r8a7790.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>
> Thanks, I have queued this up.
>
> As I did so without 2/3 of this series applied there were some
> minor conflicts. Please check that the following is correct.
It is correct.
Thanks,
Val.
>
> From: Valentine Barshak <valentine.barshak@cogentembedded.com>
>
> ARM: shmobile: r8a7790: Add SATA clocks
>
> This adds SATA[01] clock support to R8A7790 SoC.
>
> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
> [horms+renesas@verge.net.au: resolved trivial conflicts]
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
>
> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
> index b2b2323..f25b43a 100644
> --- a/arch/arm/mach-shmobile/clock-r8a7790.c
> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c
> @@ -196,6 +196,7 @@ enum {
> MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005,
> MSTP931, MSTP930, MSTP929, MSTP928,
> MSTP917,
> + MSTP815, MSTP814,
> MSTP813,
> MSTP811, MSTP810, MSTP809, MSTP808,
> MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720,
> @@ -226,6 +227,8 @@ static struct clk mstp_clks[MSTP_NR] = {
> [MSTP929] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */
> [MSTP928] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */
> [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */
> + [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */
> + [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */
> [MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */
> [MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */
> [MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */
> @@ -340,6 +343,8 @@ static struct clk_lookup lookups[] = {
> CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
> CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
> CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
> + CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]),
> + CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
>
> /* ICK */
> CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-01-09 14:26 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2013-09-10 11:39 [PATCH 3/3] ARM: shmobile: r8a7790: add the I2C bus clock Ulrich Hecht
2014-01-08 16:31 ` [PATCH 3/3] ARM: shmobile: r8a7790: Add SATA clocks Valentine Barshak
2014-01-09 8:19 ` Simon Horman
2014-01-09 14:26 ` Valentine
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