[PATCH 04/11] ARM: shmobile: lager.dts: add pci 0/1/2

[PATCH 04/11] ARM: shmobile: lager.dts: add pci 0/1/2

[Ben Dooks]

Enable pci1 and pci2 nodes for USB controllers attached to the AHB<>PCI
bridge devices. Node pci0 is enabled for the moment as a device, but
could be switched to usb-gadget mode later.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
---
Cc: linux-sh@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Simon Horman <horms@verge.net.au>
---
 arch/arm/boot/dts/r8a7790-lager.dts | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 1081c5e..15e21d0 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -80,6 +80,22 @@
 		renesas,groups = "mmc1_data8", "mmc1_ctrl";
 		renesas,function = "mmc1";
 	};
+
+	usb0_pins: usb0 {
+		renesas,groups = "usb0";
+		renesas,function = "usb";
+	};
+
+	usb1_pins: usb1 {
+		renesas,groups = "usb1";
+		renesas,function = "usb";
+	};
+
+	usb2_pins: usb2 {
+		renesas,groups = "usb2";
+		renesas,function = "usb";
+	};
+
 };
 
 &mmcif1 {
@@ -95,3 +111,21 @@
 &sata1 {
 	status = "okay";
 };
+
+&pci0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
+&pci2 {
+	status = "okay";
+	pinctrl-0 = <&usb2_pins>;
+	pinctrl-names = "default";
+};
-- 
1.8.5.3

Re: [PATCH 04/11] ARM: shmobile: lager.dts: add pci 0/1/2

[Magnus Damm]

On Wed, Feb 5, 2014 at 7:19 PM, Ben Dooks <ben.dooks@codethink.co.uk> wrote:
> Enable pci1 and pci2 nodes for USB controllers attached to the AHB<>PCI
> bridge devices. Node pci0 is enabled for the moment as a device, but
> could be switched to usb-gadget mode later.
>
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>

I'd like this to follow board-lager.c, which means using usb0 as
gadget-only due to missing cable detection on the micro-USB connector.
So feel free to keep pci0, pci1, pci2 in r8a7790.dtsi but for
r8a7790-lager.dtsi please omit pci0 to keep in-sync with the legacy
board-lager.c code.

Thanks,

/ magnus

Re: [PATCH 04/11] ARM: shmobile: lager.dts: add pci 0/1/2

[Ben Dooks]

On 05/02/14 12:09, Magnus Damm wrote:
> On Wed, Feb 5, 2014 at 7:19 PM, Ben Dooks <ben.dooks@codethink.co.uk> wrote:
>> Enable pci1 and pci2 nodes for USB controllers attached to the AHB<>PCI
>> bridge devices. Node pci0 is enabled for the moment as a device, but
>> could be switched to usb-gadget mode later.
>>
>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
>
> I'd like this to follow board-lager.c, which means using usb0 as
> gadget-only due to missing cable detection on the micro-USB connector.
> So feel free to keep pci0, pci1, pci2 in r8a7790.dtsi but for
> r8a7790-lager.dtsi please omit pci0 to keep in-sync with the legacy
> board-lager.c code.

Thanks, I'd missed that there was no A/B detection on the
socket.

Can I add the pci0 to the r8a7790.dtsi as we need it for our
project? I will update the lager dts file to set channel 0
to be used as the device.

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [PATCH 04/11] ARM: shmobile: lager.dts: add pci 0/1/2

[Magnus Damm]

On Wed, Feb 5, 2014 at 9:13 PM, Ben Dooks <ben.dooks@codethink.co.uk> wrote:
> On 05/02/14 12:09, Magnus Damm wrote:
>>
>> On Wed, Feb 5, 2014 at 7:19 PM, Ben Dooks <ben.dooks@codethink.co.uk>
>> wrote:
>>>
>>> Enable pci1 and pci2 nodes for USB controllers attached to the AHB<>PCI
>>> bridge devices. Node pci0 is enabled for the moment as a device, but
>>> could be switched to usb-gadget mode later.
>>>
>>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>>> Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
>>
>>
>> I'd like this to follow board-lager.c, which means using usb0 as
>> gadget-only due to missing cable detection on the micro-USB connector.
>> So feel free to keep pci0, pci1, pci2 in r8a7790.dtsi but for
>> r8a7790-lager.dtsi please omit pci0 to keep in-sync with the legacy
>> board-lager.c code.
>
>
> Thanks, I'd missed that there was no A/B detection on the
> socket.
>
> Can I add the pci0 to the r8a7790.dtsi as we need it for our
> project? I will update the lager dts file to set channel 0
> to be used as the device.

I think your r8a7790.dtsi modification looks fine as-is in "[PATCH
03/11] ARM: shmbobile: r8a7790.dtsi: add pci0/1/2 nodes".

Regarding Lager DTS, please leave pci0 disabled and whenever usbhs is
DT-aware then we should hook that up to USB0.

Cheers,

/ magnus