shdma of updates and r8a7790 enablement

shdma of updates and r8a7790 enablement

[Ben Dooks]

Add the device tree entries for the R8A7790 SoC and update the shdma
code to use the information in the device tree.

[PATCH 1/9] ARM: shmobile: r8a7790: add dmac0,dmac1 clocks

[Ben Dooks]

Add clocks for the SYS-DMAC0 and SYS-DMAC1 hardware blocks.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/r8a7790.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1e7c39..f98b01d 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -671,16 +671,17 @@
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
 			clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>,
-				 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>;
+				 <&mp_clk>, <&mp_clk>, <&mp_clk>, <&mp_clk>, <&hp_clk>, <&hp_clk>;
 			#clock-cells = <1>;
 			renesas,clock-indices = <
 				R8A7790_CLK_SCIFA2 R8A7790_CLK_SCIFA1 R8A7790_CLK_SCIFA0
 				R8A7790_CLK_MSIOF2 R8A7790_CLK_SCIFB0 R8A7790_CLK_SCIFB1
 				R8A7790_CLK_MSIOF1 R8A7790_CLK_MSIOF3 R8A7790_CLK_SCIFB2
+				R8A7790_CLK_SYS_DMAC0 R8A7790_CLK_SYS_DMAC1
 			>;
 			clock-output-names  				"scifa2", "scifa1", "scifa0", "msiof2", "scifb0",
-				"scifb1", "msiof1", "msiof3", "scifb2";
+				"scifb1", "msiof1", "msiof3", "scifb2", "dmac0", "dmac1";
 		};
 		mstp3_clks: mstp3_clks@e615013c {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
-- 
1.9.1

[PATCH 2/9] ARM: shmobile: r8a7790: add dma defines for sys and audio dmacs

[Ben Dooks]

Add the DMA resource IDs for the R8A7790 Audio and SYS DMA controllers
for use when specifying DMA handles.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 include/dt-bindings/dma/r8a7790-dma.h | 223 ++++++++++++++++++++++++++++++++++
 1 file changed, 223 insertions(+)
 create mode 100644 include/dt-bindings/dma/r8a7790-dma.h

diff --git a/include/dt-bindings/dma/r8a7790-dma.h b/include/dt-bindings/dma/r8a7790-dma.h
new file mode 100644
index 0000000..7c52132
--- /dev/null
+++ b/include/dt-bindings/dma/r8a7790-dma.h
@@ -0,0 +1,223 @@
+/*
+ * R8A7790 System and Audio DMA channel resource identifiers
+ *
+ * Copyirght (c) 2014 Codethink Ltd.
+ *	Ben Dooks <ben.dooks@codethink.co.uk>
+ *
+ * Licensed under GPLv2
+*/
+
+/* System DMAC */
+
+#define R8A7790_DMA_SCIFA0_TX	(0x21)
+#define R8A7790_DMA_SCIFA0_RX	(0x22)
+#define R8A7790_DMA_SCIFA1_TX	(0x25)
+#define R8A7790_DMA_SCIFA1_RX	(0x26)
+#define R8A7790_DMA_SCIFA2_TX	(0x27)
+#define R8A7790_DMA_SCIFA2_RX	(0x28)
+
+#define R8A7790_DMA_SCIFB0_TX	(0x3D)
+#define R8A7790_DMA_SCIFB0_RX	(0x3E)
+#define R8A7790_DMA_SCIFB1_TX	(0x19)
+#define R8A7790_DMA_SCIFB1_RX	(0x1A)
+#define R8A7790_DMA_SCIFB2_TX	(0x1D)
+#define R8A7790_DMA_SCIFB2_RX	(0x1E)
+
+#define R8A7790_DMA_HSCIF0_TX	(0x39)
+#define R8A7790_DMA_HSCIF0_RX	(0x3A)
+#define R8A7790_DMA_HSCIF1_TX	(0x4D)
+#define R8A7790_DMA_HSCIF1_RX	(0x4E)
+
+#define R8A7790_DMA_SCIF0_TX	(0x29)
+#define R8A7790_DMA_SCIF0_RX	(0x2A)
+#define R8A7790_DMA_SCIF1_TX	(0x2D)
+#define R8A7790_DMA_SCIF1_RX	(0x2E)
+
+#define R8A7790_DMA_MSIOF0_TX	(0x81)
+#define R8A7790_DMA_MSIOF0_RX	(0x82)
+#define R8A7790_DMA_MSIOF1_TX	(0x85)
+#define R8A7790_DMA_MSIOF1_RX	(0x86)
+#define R8A7790_DMA_MSIOF2_TX	(0x41)
+#define R8A7790_DMA_MSIOF2_RX	(0x42)
+#define R8A7790_DMA_MSIOF3_TX	(0x45)
+#define R8A7790_DMA_MSIOF3_RX	(0x46)
+
+#define R8A7790_DMA_QSPI_TX	(0x17)
+#define R8A7790_DMA_QSPI_RX	(0x18)
+
+#define R8A7790_DMA_SIM_TX	(0xA1)
+#define R8A7790_DMA_SIM_RX	(0xA2)
+
+#define R8A7790_DMA_IIC0_TX	(0x61)
+#define R8A7790_DMA_IIC0_RX	(0x62)
+#define R8A7790_DMA_IIC1_TX	(0x65)
+#define R8A7790_DMA_IIC1_RX	(0x66)
+#define R8A7790_DMA_IIC2_TX	(0x69)
+#define R8A7790_DMA_IIC2_RX	(0x6A)
+#define R8A7790_DMA_IIC3_TX	(0x77)
+#define R8A7790_DMA_IIC3_RX	(0x78)
+
+#define R8A7790_DMA_SDHI0_TX	(0xCD)
+#define R8A7790_DMA_SDHI0_RX	(0xCE)
+#define R8A7790_DMA_SDHI1_TX	(0xC9)
+#define R8A7790_DMA_SDHI1_RX	(0xCA)
+#define R8A7790_DMA_SDHI2_TX	(0xC1)
+#define R8A7790_DMA_SDHI2_RX	(0xC2)
+#define R8A7790_DMA_SDHI2C2_TX	(0xC5)
+#define R8A7790_DMA_SDHI2C2_RX	(0xC6)
+#define R8A7790_DMA_SDHI3_TX	(0xD3)
+#define R8A7790_DMA_SDHI3_RX	(0xD4)
+#define R8A7790_DMA_SDHI3C2_TX	(0xDF)
+#define R8A7790_DMA_SDHI3C2_RX	(0xDE)
+
+#define R8A7790_DMA_TPU0	(0xF1)
+#define R8A7790_DMA_TSIF0	(0xEA)
+#define R8A7790_DMA_TSIF1	(0xF0)
+
+#define R8A7790_DMA_AXISTATR	(0xA6)
+#define R8A7790_DMA_AXISTATS0	(0xAC)
+#define R8A7790_DMA_AXISTATS1	(0xAA)
+#define R8A7790_DMA_AXISTATS2	(0xA8)
+#define R8A7790_DMA_AXISTATS3	(0xA4)
+
+#define R8A7790_DMA_MMCIF0_TX	(0xD1)
+#define R8A7790_DMA_MMCIF0_RX	(0xD2)
+#define R8A7790_DMA_MMCIF1_TX	(0xE1)
+#define R8A7790_DMA_MMCIF1_RX	(0xE2)
+
+/* Audio DMAC */
+
+#define R8A7790_DMA_DTCPC0_TX	(0xD7)
+#define R8A7790_DMA_DTCPC0_RX	(0xD8)
+#define R8A7790_DMA_DTCPC1_TX	(0xD9)
+#define R8A7790_DMA_DTCPC1_RX	(0xDA)
+#define R8A7790_DMA_DTCPP0_TX	(0xBF)
+#define R8A7790_DMA_DTCPP0_RX	(0xC0)
+#define R8A7790_DMA_DTCPP1_TX	(0xD5)
+#define R8A7790_DMA_DTCPP1_RX	(0xD6)
+
+#define R8A7790_DMA_MLM0_TX	(0xDB)
+#define R8A7790_DMA_MLM0_RX	(0xDC)
+#define R8A7790_DMA_MLM1_TX	(0xE3)
+#define R8A7790_DMA_MLM1_RX	(0xE4)
+#define R8A7790_DMA_MLM2_TX	(0xE5)
+#define R8A7790_DMA_MLM2_RX	(0xE6)
+#define R8A7790_DMA_MLM3_TX	(0xE7)
+#define R8A7790_DMA_MLM3_RX	(0xE8)
+#define R8A7790_DMA_MLM4_TX	(0xF3)
+#define R8A7790_DMA_MLM4_RX	(0xF4)
+#define R8A7790_DMA_MLM5_TX	(0xF5)
+#define R8A7790_DMA_MLM5_RX	(0xF6)
+#define R8A7790_DMA_MLM6_TX	(0xF7)
+#define R8A7790_DMA_MLM6_RX	(0xF8)
+#define R8A7790_DMA_MLM7_TX	(0xF9)
+#define R8A7790_DMA_MLM7_RX	(0xFA)
+
+#define R8A7790_DMA_SCU0	(0x85)
+#define R8A7790_DMA_SCU1	(0x87)
+#define R8A7790_DMA_SCU2	(0x89)
+#define R8A7790_DMA_SCU3	(0x8B)
+#define R8A7790_DMA_SCU4	(0x8D)
+#define R8A7790_DMA_SCU5	(0x8F)
+#define R8A7790_DMA_SCU6	(0x91)
+#define R8A7790_DMA_SCU7	(0x93)
+#define R8A7790_DMA_SCU8	(0x95)
+#define R8A7790_DMA_SCU9	(0x97)
+
+#define R8A7790_DMA_SCUCMD0	(0xBC)
+#define R8A7790_DMA_SCUCMD1	(0xBE)
+
+#define R8A7790_DMA_SCUOUT0	(0x9A)
+#define R8A7790_DMA_SCUOUT1	(0x9C)
+#define R8A7790_DMA_SCUOUT2	(0x9E)
+#define R8A7790_DMA_SCUOUT3	(0xA0)
+#define R8A7790_DMA_SCUOUT4	(0xB0)
+#define R8A7790_DMA_SCUOUT5	(0xB2)
+#define R8A7790_DMA_SCUOUT6	(0xB4)
+#define R8A7790_DMA_SCUOUT7	(0xB6)
+#define R8A7790_DMA_SCUOUT8	(0xB8)
+#define R8A7790_DMA_SCUOUT9	(0xBA)
+
+#define R8A7790_DMA_SSCI00_TX	(0x15)
+#define R8A7790_DMA_SSCI00_RX	(0x16)
+#define R8A7790_DMA_SSCI01_TX	(0x35)
+#define R8A7790_DMA_SSCI01_RX	(0x36)
+#define R8A7790_DMA_SSCI02_TX	(0x37)
+#define R8A7790_DMA_SSCI02_RX	(0x38)
+#define R8A7790_DMA_SSCI03_TX	(0x47)
+#define R8A7790_DMA_SSCI03_RX	(0x48)
+
+#define R8A7790_DMA_SSCI10_TX	(0x49)
+#define R8A7790_DMA_SSCI10_RX	(0x4A)
+#define R8A7790_DMA_SSCI11_TX	(0x4B)
+#define R8A7790_DMA_SSCI11_RX	(0x4C)
+#define R8A7790_DMA_SSCI12_TX	(0x57)
+#define R8A7790_DMA_SSCI12_RX	(0x58)
+#define R8A7790_DMA_SSCI13_TX	(0x59)
+#define R8A7790_DMA_SSCI13_RX	(0x5A)
+
+#define R8A7790_DMA_SSCI20_TX	(0x63)
+#define R8A7790_DMA_SSCI20_RX	(0x64)
+#define R8A7790_DMA_SSCI21_TX	(0x67)
+#define R8A7790_DMA_SSCI21_RX	(0x68)
+#define R8A7790_DMA_SSCI22_TX	(0x6B)
+#define R8A7790_DMA_SSCI22_RX	(0x6C)
+#define R8A7790_DMA_SSCI23_TX	(0x6D)
+#define R8A7790_DMA_SSCI23_RX	(0x6E)
+
+#define R8A7790_DMA_SSCI20_TX	(0x63)
+#define R8A7790_DMA_SSCI20_RX	(0x64)
+#define R8A7790_DMA_SSCI21_TX	(0x67)
+#define R8A7790_DMA_SSCI21_RX	(0x68)
+#define R8A7790_DMA_SSCI22_TX	(0x6B)
+#define R8A7790_DMA_SSCI22_RX	(0x6C)
+#define R8A7790_DMA_SSCI23_TX	(0x6D)
+#define R8A7790_DMA_SSCI23_RX	(0x6E)
+
+#define R8A7790_DMA_SSCI3_TX	(0x6F)
+#define R8A7790_DMA_SSCI3_RX	(0x70)
+
+#define R8A7790_DMA_SSCI4_TX	(0x71)
+#define R8A7790_DMA_SSCI4_RX	(0x72)
+
+#define R8A7790_DMA_SSCI5_TX	(0x73)
+#define R8A7790_DMA_SSCI5_RX	(0x74)
+
+#define R8A7790_DMA_SSCI6_TX	(0x75)
+#define R8A7790_DMA_SSCI6_RX	(0x76)
+
+#define R8A7790_DMA_SSCI7_TX	(0x79)
+#define R8A7790_DMA_SSCI7_RX	(0x7A)
+
+#define R8A7790_DMA_SSCI8_TX	(0x7B)
+#define R8A7790_DMA_SSCI8_RX	(0x7C)
+
+#define R8A7790_DMA_SSCI90_TX	(0x7D)
+#define R8A7790_DMA_SSCI90_RX	(0x7E)
+#define R8A7790_DMA_SSCI91_TX	(0x7F)
+#define R8A7790_DMA_SSCI91_RX	(0x80)
+#define R8A7790_DMA_SSCI92_TX	(0x81)
+#define R8A7790_DMA_SSCI92_RX	(0x82)
+#define R8A7790_DMA_SSCI93_TX	(0x83)
+#define R8A7790_DMA_SSCI93_RX	(0x84)
+
+#define R8A7790_DMA_SSIND0_TX	(0x01)
+#define R8A7790_DMA_SSIND0_RX	(0x02)
+#define R8A7790_DMA_SSIND1_TX	(0x03)
+#define R8A7790_DMA_SSIND1_RX	(0x04)
+#define R8A7790_DMA_SSIND2_TX	(0x05)
+#define R8A7790_DMA_SSIND2_RX	(0x06)
+#define R8A7790_DMA_SSIND3_TX	(0x07)
+#define R8A7790_DMA_SSIND3_RX	(0x08)
+#define R8A7790_DMA_SSIND4_TX	(0x09)
+#define R8A7790_DMA_SSIND4_RX	(0x0A)
+#define R8A7790_DMA_SSIND5_TX	(0x0B)
+#define R8A7790_DMA_SSIND5_RX	(0x0C)
+#define R8A7790_DMA_SSIND6_TX	(0x0D)
+#define R8A7790_DMA_SSIND6_RX	(0x0E)
+#define R8A7790_DMA_SSIND7_TX	(0x0F)
+#define R8A7790_DMA_SSIND7_RX	(0x10)
+#define R8A7790_DMA_SSIND8_TX	(0x11)
+#define R8A7790_DMA_SSIND8_RX	(0x12)
+#define R8A7790_DMA_SSIND9_TX	(0x13)
+#define R8A7790_DMA_SSIND9_RX	(0x14)
-- 
1.9.1

[PATCH 3/9] ARM: shmobile: r8a7790: add dmac0 dmac1 nodes

[Ben Dooks]

Add nodes for the SYS-DMA controllers, SYS-DMAC0 and SYS-DMAC1. These
both share the same device sources, so are wrapped in the shdma-mux
node to allow both to be used.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>

---
v2:
	- fix indentation
	- remove extra channel on dmac1
v3:
	- updated to use include files
---
 arch/arm/boot/dts/r8a7790.dtsi | 90 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index f98b01d..a005e68 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -8,6 +8,8 @@
  * kind, whether express or implied.
  */
 
+#include <dt-bindings/dma/shdma.h>
+#include <dt-bindings/dma/r8a7790-dma.h>
 #include <dt-bindings/clock/r8a7790-clock.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -86,6 +88,94 @@
 		};
 	};
 
+#define CHCR_RX_32BIT	SHDMA_ARM_CHCR_RX(SHDMA_ARM_SZ_32BIT)
+#define CHCR_TX_32BIT	SHDMA_ARM_CHCR_TX(SHDMA_ARM_SZ_32BIT)
+#define CHCR_RX_256BIT	SHDMA_ARM_CHCR_RX(SHDMA_ARM_SZ_256BIT)
+#define CHCR_TX_256BIT	SHDMA_ARM_CHCR_TX(SHDMA_ARM_SZ_256BIT)
+
+	dma0: dma-mux@0 {
+		compatible = "renesas,shdma-mux";
+		#dma-cells = <1>;
+		dma-channels = <20>;
+		dma-requests = <256>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		renesas,slaves = <R8A7790_DMA_SDHI0_RX  CHCR_RX_256BIT>,
+				 <R8A7790_DMA_SDHI0_TX  CHCR_TX_256BIT>,
+				 <R8A7790_DMA_SDHI1_RX  CHCR_RX_256BIT>,
+				 <R8A7790_DMA_SDHI1_TX  CHCR_TX_256BIT>,
+				 <R8A7790_DMA_SDHI2_RX  CHCR_RX_256BIT>,
+				 <R8A7790_DMA_SDHI2_TX  CHCR_TX_256BIT>,
+				 <R8A7790_DMA_MMCIF0_RX CHCR_RX_32BIT>,
+				 <R8A7790_DMA_MMCIF0_TX CHCR_TX_32BIT>,
+				 <R8A7790_DMA_MMCIF1_RX CHCR_RX_32BIT>,
+				 <R8A7790_DMA_MMCIF1_TX CHCR_TX_32BIT>;
+
+		sysdma0: dmac@e6700000 {
+			compatible = "renesas,dma-r8a7790", "renesas,dma-arm";
+			clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC0>;
+			dma-channels = <15>;
+			status = "disabled";
+			reg = <0 0xe6700020 0 0xffc0>;
+			interrupt-parent = <&gic>;
+
+			interrupts =	<0 197 IRQ_TYPE_LEVEL_HIGH>, /* error */
+					<0 200 IRQ_TYPE_LEVEL_HIGH>, /* ch0 */
+					<0 201 IRQ_TYPE_LEVEL_HIGH>,
+					<0 202 IRQ_TYPE_LEVEL_HIGH>,
+					<0 203 IRQ_TYPE_LEVEL_HIGH>,
+					<0 204 IRQ_TYPE_LEVEL_HIGH>,
+					<0 205 IRQ_TYPE_LEVEL_HIGH>,
+					<0 206 IRQ_TYPE_LEVEL_HIGH>,
+					<0 207 IRQ_TYPE_LEVEL_HIGH>,
+					<0 208 IRQ_TYPE_LEVEL_HIGH>,
+					<0 209 IRQ_TYPE_LEVEL_HIGH>,
+					<0 210 IRQ_TYPE_LEVEL_HIGH>,
+					<0 211 IRQ_TYPE_LEVEL_HIGH>,
+					<0 212 IRQ_TYPE_LEVEL_HIGH>,
+					<0 213 IRQ_TYPE_LEVEL_HIGH>,
+					<0 214 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14";
+		};
+
+		sysdma1: dmac@e6720000 {
+			compatible = "renesas,dma-r8a7790";
+			clocks = <&mstp2_clks R8A7790_CLK_SYS_DMAC1>;
+			dma-channels = <15>;
+			reg = <0 0xe6720020 0 0xffc0>;
+			status = "disabled";
+
+			interrupt-parent = <&gic>;
+			interrupts =  <0 220 IRQ_TYPE_LEVEL_HIGH>,
+					<0 216 IRQ_TYPE_LEVEL_HIGH>,
+					<0 217 IRQ_TYPE_LEVEL_HIGH>,
+					<0 218 IRQ_TYPE_LEVEL_HIGH>,
+					<0 219 IRQ_TYPE_LEVEL_HIGH>,
+					<0 308 IRQ_TYPE_LEVEL_HIGH>,
+					<0 309 IRQ_TYPE_LEVEL_HIGH>,
+					<0 310 IRQ_TYPE_LEVEL_HIGH>,
+					<0 311 IRQ_TYPE_LEVEL_HIGH>,
+					<0 312 IRQ_TYPE_LEVEL_HIGH>,
+					<0 313 IRQ_TYPE_LEVEL_HIGH>,
+					<0 314 IRQ_TYPE_LEVEL_HIGH>,
+					<0 315 IRQ_TYPE_LEVEL_HIGH>,
+					<0 316 IRQ_TYPE_LEVEL_HIGH>,
+					<0 317 IRQ_TYPE_LEVEL_HIGH>,
+					<0 318 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14";
+		};
+	};
+
 	gic: interrupt-controller@f1001000 {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
-- 
1.9.1

[PATCH 4/9] ARM: shmobile: r8a7790: Add DMA for MMCIF1

[Ben Dooks]

Updated dtsi file with DMA info for MMCIF1

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/r8a7790.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a005e68..a64bdc6 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -334,6 +334,9 @@
 		reg = <0 0xee220000 0 0x80>;
 		interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&mstp3_clks R8A7790_CLK_MMCIF1>;
+		dmas =  <&dma0 R8A7790_DMA_MMCIF1_RX>,
+			<&dma0 R8A7790_DMA_MMCIF1_TX>;
+		dma-names = "rx", "tx";
 		reg-io-width = <4>;
 		status = "disabled";
 	};
-- 
1.9.1

[PATCH 5/9] ARM: shmobile: add Audio DMAC clocks

[Ben Dooks]

Add MSTP5 clock definitions for Audio DMAC

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/r8a7790.dtsi            | 7 ++++---
 include/dt-bindings/clock/r8a7790-clock.h | 2 ++
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a64bdc6..2c8cbbd 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -795,10 +795,11 @@
 		mstp5_clks: mstp5_clks@e6150144 {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
 			reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
-			clocks = <&extal_clk>, <&p_clk>;
+			clocks = <&hp_clk>, <&hp_clk>, <&extal_clk>, <&p_clk>;
 			#clock-cells = <1>;
-			renesas,clock-indices = <R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
-			clock-output-names = "thermal", "pwm";
+			renesas,clock-indices = <R8A7790_CLK_AUDIO_DMAC0 R8A7790_CLK_AUDIO_DMAC1
+						 R8A7790_CLK_THERMAL R8A7790_CLK_PWM>;
+			clock-output-names = "audmac0", "audamc1", "thermal", "pwm";
 		};
 		mstp7_clks: mstp7_clks@e615014c {
 			compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 6548a5f..9e74d11 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -63,6 +63,8 @@
 #define R8A7790_CLK_USBDMAC1		31
 
 /* MSTP5 */
+#define R8A7790_CLK_AUDIO_DMAC1		1
+#define R8A7790_CLK_AUDIO_DMAC0		2
 #define R8A7790_CLK_THERMAL		22
 #define R8A7790_CLK_PWM			23
 
-- 
1.9.1

[PATCH 6/9] ARM: shmobile: r8a7790: add audio dmac node

[Ben Dooks]

Add initial audio dmac node and resources.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/r8a7790.dtsi | 68 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 68 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 2c8cbbd..6032783 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -176,6 +176,74 @@
 		};
 	};
 
+	dma1: dma-mux@1 {
+		compatible = "renesas,shdma-mux";
+		#dma-cells = <1>;
+		dma-channels = <20>;
+		dma-requests = <256>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		audiodma0: dmac@ec700000 {
+			compatible = "renesas,dma-r8a7790", "renesas,dma-arm";
+			clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
+			dma-channels = <13>;
+			status = "disabled";
+			reg = <0 0xec700020 0 0xffc0>;
+			interrupt-parent = <&gic>;
+
+			interrupts =	<0 346 IRQ_TYPE_LEVEL_HIGH>, /* error */
+					<0 320 IRQ_TYPE_LEVEL_HIGH>, /* ch0 */
+					<0 321 IRQ_TYPE_LEVEL_HIGH>,
+					<0 322 IRQ_TYPE_LEVEL_HIGH>,
+					<0 323 IRQ_TYPE_LEVEL_HIGH>,
+					<0 324 IRQ_TYPE_LEVEL_HIGH>,
+					<0 325 IRQ_TYPE_LEVEL_HIGH>,
+					<0 326 IRQ_TYPE_LEVEL_HIGH>,
+					<0 327 IRQ_TYPE_LEVEL_HIGH>,
+					<0 328 IRQ_TYPE_LEVEL_HIGH>,
+					<0 329 IRQ_TYPE_LEVEL_HIGH>,
+					<0 330 IRQ_TYPE_LEVEL_HIGH>,
+					<0 331 IRQ_TYPE_LEVEL_HIGH>,
+					<0 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12";
+		};
+
+		audiodma1: dmac@ec720000 {
+			compatible = "renesas,dma-r8a7790", "renesas,dma-arm";
+			clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC1>;
+			dma-channels = <13>;
+			status = "disabled";
+			reg = <0 0xec720020 0 0xffc0>;
+			interrupt-parent = <&gic>;
+
+			interrupts =	<0 347 IRQ_TYPE_LEVEL_HIGH>, /* error */
+					<0 333 IRQ_TYPE_LEVEL_HIGH>, /* ch0 */
+					<0 334 IRQ_TYPE_LEVEL_HIGH>,
+					<0 335 IRQ_TYPE_LEVEL_HIGH>,
+					<0 336 IRQ_TYPE_LEVEL_HIGH>,
+					<0 337 IRQ_TYPE_LEVEL_HIGH>,
+					<0 338 IRQ_TYPE_LEVEL_HIGH>,
+					<0 339 IRQ_TYPE_LEVEL_HIGH>,
+					<0 340 IRQ_TYPE_LEVEL_HIGH>,
+					<0 341 IRQ_TYPE_LEVEL_HIGH>,
+					<0 342 IRQ_TYPE_LEVEL_HIGH>,
+					<0 343 IRQ_TYPE_LEVEL_HIGH>,
+					<0 344 IRQ_TYPE_LEVEL_HIGH>,
+					<0 345 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12";
+		};
+	};
+
 	gic: interrupt-controller@f1001000 {
 		compatible = "arm,cortex-a15-gic";
 		#interrupt-cells = <3>;
-- 
1.9.1

[PATCH 7/9] ARM: shmobile: lager: enable sysdma units 0 and 1

[Ben Dooks]

Add the new sysdma units to the lager board.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 arch/arm/boot/dts/r8a7790-lager.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a9010..3b4f59c 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -214,3 +214,11 @@
 	cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
 	status = "okay";
 };
+
+&sysdma0 {
+	status = "okay";
+};
+
+&sysdma1 {
+	status = "okay";
+};
-- 
1.9.1

[PATCH 8/9] DMA: shdma: initial of common code

[Ben Dooks]

Add support for building shdma internal data from the device tree to allow
converting the driver to be device tree enabled.

It includes a helper for the of case to build the internal data used to
select and filter out the DMA channels from the ID information in the
device tree. Also updates the documentation for the DT case.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 Documentation/devicetree/bindings/dma/shdma.txt |  24 +++++
 drivers/dma/sh/shdma-of.c                       | 134 ++++++++++++++++++++++++
 drivers/dma/sh/shdma.h                          |  20 ++++
 include/dt-bindings/dma/shdma.h                 |  45 ++++++++
 4 files changed, 223 insertions(+)
 create mode 100644 include/dt-bindings/dma/shdma.h

diff --git a/Documentation/devicetree/bindings/dma/shdma.txt b/Documentation/devicetree/bindings/dma/shdma.txt
index 2a3f3b8..7d9e7bd 100644
--- a/Documentation/devicetree/bindings/dma/shdma.txt
+++ b/Documentation/devicetree/bindings/dma/shdma.txt
@@ -15,6 +15,12 @@ Required properties:
 - compatible:	should be "renesas,shdma-mux"
 - #dma-cells:	should be <1>, see "dmas" property below
 
+New properites, required for renesas,dma-r8a7790.
+- reneasa,slaves: A list of DMA channel MID/RID and the configuration to
+		go with them. These pairs are in the form of:
+			< mid+rid configuration>
+
+
 Optional properties (currently unused):
 - dma-channels:	number of DMA channels
 - dma-requests:	number of DMA request signals
@@ -25,6 +31,7 @@ Required properties:
 - compatible:	should be of the form "renesas,shdma-<soc>", where <soc> should
 		be replaced with the desired SoC model, e.g.
 		"renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
+		"renesas,dma-r8a7790" for the DMAC on the R8A7790.
 
 Example:
 	dmac: dma-multiplexer@0 {
@@ -70,6 +77,23 @@ Example:
 		};
 	};
 
+For r8a7790, the following is an example of using the reneasas,slaves to
+configure the slave channels on the controller:
+
+	dma0: dma-mux@0 {
+		compatible = "renesas,shdma-mux";
+		#dma-cells = <1>;
+		dma-channels = <20>;
+		dma-requests = <256>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+
+		renesas,slaves = <R8A7790_DMA_SDHI0_RX  CHCR_RX_256BIT>,
+                                 <R8A7790_DMA_SDHI0_TX  CHCR_TX_256BIT>;
+	}
+
 * DMA client
 
 Required properties:
diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c
index 06473a0..386fd9e 100644
--- a/drivers/dma/sh/shdma-of.c
+++ b/drivers/dma/sh/shdma-of.c
@@ -3,12 +3,15 @@
  *
  * Copyright (C) 2013 Renesas Electronics Inc.
  * Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright (c) 2014 Codethink Limited
+ *	Ben Dooks <ben.dooks@codethink.co.uk>
  *
  * This is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * published by the Free Software Foundation.
  */
 
+#include <linux/slab.h>
 #include <linux/dmaengine.h>
 #include <linux/module.h>
 #include <linux/of.h>
@@ -16,9 +19,37 @@
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/shdma-base.h>
+#include <linux/sh_dma.h>
+
+#include <dt-bindings/dma/shdma.h>
 
 #define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
 
+#include "shdma-arm.h"
+
+static const unsigned int arm_dma_ts_shift[] = SH_DMAE_TS_SHIFT;
+
+static struct sh_dmae_pdata arm_dmae_info = {
+	.ts_low_shift	= SHDMA_ARM_TS_LOW_SHIFT,
+	.ts_low_mask	= SHDMA_ARM_TS_LOW_BIT << SHDMA_ARM_TS_LOW_SHIFT,
+	.ts_high_shift	= SHDMA_ARM_TS_HI_SHIFT,
+	.ts_high_mask	= SHDMA_ARM_TS_HI_BIT << SHDMA_ARM_TS_HI_SHIFT,
+	.ts_shift	= arm_dma_ts_shift,
+	.ts_shift_num	= ARRAY_SIZE(arm_dma_ts_shift),
+	.dmaor_init	= DMAOR_DME,
+	.chclr_present	= 1,
+	.chclr_bitwise	= 1,
+};
+
+struct sh_dmae_of_info shdma_arm_info = {
+	.pdata_template	= &arm_dmae_info,
+	.channel_offset	= 0x8000-0x20,
+	.channel_stride	= 0x80,
+	.offset		= 0x0,
+	.dmars		= 0x40,
+	.chclr_offset	= 0x80,
+};
+
 static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
 				       struct of_dma *ofdma)
 {
@@ -40,6 +71,109 @@ static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
 	return chan;
 }
 
+const struct sh_dmae_pdata *
+sh_dma_probe_of(struct platform_device *pdev, const struct of_device_id *ofmatch)
+{
+	const struct device_node *np = pdev->dev.of_node;
+	const struct sh_dmae_of_info *ofinf;
+	struct device *dev = &pdev->dev;
+	struct sh_dmae_pdata *pdata;
+	struct sh_dmae_channel *chan;
+	struct property *prop;
+	u32 nr_chan;
+	unsigned ch;
+	int ret;
+	int len;
+
+	if (!ofmatch)
+		return NULL;
+
+	ofinf = ofmatch->data;
+
+	pdata = devm_kzalloc(dev, sizeof(struct sh_dmae_pdata), GFP_KERNEL);
+	if (!pdata) {
+		dev_err(dev, "failed to make platform data\n");
+		return NULL;
+	}
+
+	*pdata = *ofinf->pdata_template;	/* copy in template first */
+
+	ret = of_property_read_u32(np, "dma-channels", &nr_chan);
+	if (ret < 0) {
+		dev_err(dev, "failed to get number of channels\n");
+		return NULL;
+	}
+
+	chan = devm_kzalloc(dev, nr_chan * sizeof(struct sh_dmae_channel),
+			    GFP_KERNEL);
+	if (!chan) {
+		dev_err(dev, "cannot allocate %d channels\n", nr_chan);
+		return NULL;
+	}
+
+	pdata->channel = chan;
+	pdata->channel_num = nr_chan;
+
+	dev_dbg(dev, "%d dma channels allocated\n", nr_chan);
+
+	for (ch = 0; ch < nr_chan; ch++) {
+		struct sh_dmae_channel *cp = chan + ch;
+		u32 base = ofinf->channel_offset + ofinf->channel_stride * ch;
+
+		cp->offset = base + ofinf->offset;
+		cp->dmars = base + ofinf->dmars;
+		cp->chclr_bit = ch;
+		cp->chclr_offset = ofinf->chclr_offset;
+
+		dev_dbg(dev, "ch %d: off %08x, dmars %08x, bit %d, off %d\n",
+			ch, cp->offset, cp->dmars,
+			cp->chclr_bit, cp->chclr_offset);
+	}
+
+	/* look in current, or parent node for the slave mappings */
+	prop = of_find_property(np, "renesas,slaves", &len);
+	if (!prop)
+		prop = of_find_property(np->parent, "renesas,slaves", &len);
+
+	if (prop) {
+		struct sh_dmae_slave_config *slaves;
+		int nr_slaves = len / (sizeof(u32) * 3);
+		const __be32 *of_ptr;
+		u32 of_idx;
+
+		slaves = devm_kzalloc(dev, sizeof(*slaves) * nr_slaves,
+				      GFP_KERNEL);
+		if (!slaves) {
+			dev_err(dev, "cannot allocate %d slaves\n", nr_slaves);
+			return NULL;
+		}
+
+		pdata->slave = slaves;
+		pdata->slave_num = nr_slaves;
+		of_idx = 0;
+		of_ptr = NULL;
+
+		dev_dbg(dev, "building %d slaves\n", nr_slaves);
+
+		for (; nr_slaves > 0; nr_slaves--, slaves++) {
+			of_ptr= of_prop_next_u32(prop, of_ptr, &of_idx);
+			slaves->mid_rid = be32_to_cpu(*of_ptr);
+			slaves->slave_id = slaves->mid_rid;
+
+			of_ptr= of_prop_next_u32(prop, of_ptr, &of_idx);
+			slaves->chcr = be32_to_cpu(*of_ptr);
+
+			dev_dbg(dev, "slave: id %02x, chcr %08x, addr %08x\n",
+				slaves->mid_rid, slaves->chcr, slaves->addr);
+		}
+	} else {
+		dev_warn(dev, "did not find any slave information\n");
+	}
+
+	pdev->dev.platform_data = pdata;
+	return pdata;
+};
+
 static int shdma_of_probe(struct platform_device *pdev)
 {
 	const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev);
diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h
index 758a57b..0db8327 100644
--- a/drivers/dma/sh/shdma.h
+++ b/drivers/dma/sh/shdma.h
@@ -56,6 +56,26 @@ struct sh_dmae_desc {
 	struct shdma_desc shdma_desc;
 };
 
+/*
+ * Template information for building shdma data, provided as part of the
+ * data field in the of_device_id structure. This is then used to build
+ * the platform data for the dma code.
+ */
+struct sh_dmae_of_info {
+	struct sh_dmae_pdata	*pdata_template;
+	unsigned int		channel_offset;
+	unsigned int		channel_stride;
+	int			offset;
+	int			dmars;
+	int			chclr_offset;
+	int			chclr_bit;
+};
+
+extern struct sh_dmae_of_info shdma_arm_info;
+
+extern const struct sh_dmae_pdata *sh_dma_probe_of(struct platform_device *pdev,
+						   const struct of_device_id *match);
+
 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
 #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
 #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
diff --git a/include/dt-bindings/dma/shdma.h b/include/dt-bindings/dma/shdma.h
new file mode 100644
index 0000000..0c8fc9e
--- /dev/null
+++ b/include/dt-bindings/dma/shdma.h
@@ -0,0 +1,45 @@
+/* DMA binding definitions for SH-DMAC engines.
+ *
+ * Moved from sh_dma.h to share with device tree by Ben Dooks.
+ * Orignal code from:
+ *   shdma.h: Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ *   shdma-arm.h: Copyright (C) 2013 Renesas Electronics, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#define SHDMA_DM_INC	0x00004000
+#define SHDMA_DM_DEC	0x00008000
+#define SHDMA_DM_FIX	0x0000c000
+#define SHDMA_SM_INC	0x00001000
+#define SHDMA_SM_DEC	0x00002000
+#define SHDMA_SM_FIX	0x00003000
+#define SHDMA_CHCR_DE	0x00000001
+#define SHDMA_CHCR_TE	0x00000002
+#define SHDMA_CHCR_IE	0x00000004
+
+/* ARM specific definitions */
+
+#define SHDMA_ARM_SZ_8BIT	(0)
+#define SHDMA_ARM_SZ_16BIT	(1)
+#define SHDMA_ARM_SZ_32BIT	(2)
+#define SHDMA_ARM_SZ_64BIT	(7)
+#define SHDMA_ARM_SZ_128BIT	(3)
+#define SHDMA_ARM_SZ_256BIT	(4)
+#define SHDMA_ARM_SZ_512BIT	(5)
+
+#define SHDMA_ARM_TS_LOW_BIT	(0x3)
+#define SHDMA_ARM_TS_HI_BIT	(0xc)
+
+#define SHDMA_ARM_TS_LOW_SHIFT	(3)
+#define SHDMA_ARM_TS_HI_SHIFT	(20 - 2)	/* 2 bits for shifted low TS */
+
+#define SHDMA_ARM_TS_INDEX2VAL(i) \
+	((((i) & SHDMA_ARM_TS_LOW_BIT) << SHDMA_ARM_TS_LOW_SHIFT) |\
+	 (((i) & SHDMA_ARM_TS_HI_BIT)  << SHDMA_ARM_TS_HI_SHIFT))
+
+#define SHDMA_ARM_CHCR_RX(size) (SHDMA_DM_INC | SHDMA_SM_FIX | 0x800 | SHDMA_ARM_TS_INDEX2VAL(size))
+#define SHDMA_ARM_CHCR_TX(size) (SHDMA_DM_FIX | SHDMA_SM_INC | 0x800 | SHDMA_ARM_TS_INDEX2VAL(size))
+
-- 
1.9.1

[PATCH 9/9] DMA: shdma: wire r8a7790

[Ben Dooks]

Add support for R8A7790 with new device tree code.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 drivers/dma/sh/shdmac.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
index 0d765c0..84ba8d1 100644
--- a/drivers/dma/sh/shdmac.c
+++ b/drivers/dma/sh/shdmac.c
@@ -677,7 +677,8 @@ static const struct shdma_ops sh_dmae_shdma_ops = {
 };
 
 static const struct of_device_id sh_dmae_of_match[] = {
-	{.compatible = "renesas,shdma-r8a73a4", .data = r8a73a4_shdma_devid,},
+	{ .compatible = "renesas,shdma-r8a73a4", .data = r8a73a4_shdma_devid },
+	{ .compatible = "renesas,dma-r8a7790", .data = &shdma_arm_info },
 	{}
 };
 MODULE_DEVICE_TABLE(of, sh_dmae_of_match);
@@ -693,10 +694,17 @@ static int sh_dmae_probe(struct platform_device *pdev)
 	struct dma_device *dma_dev;
 	struct resource *chan, *dmars, *errirq_res, *chanirq_res;
 
-	if (pdev->dev.of_node)
-		pdata = of_match_device(sh_dmae_of_match, &pdev->dev)->data;
-	else
+	if (pdev->dev.of_node) {
+		const struct of_device_id *match;
+
+		match = of_match_device(sh_dmae_of_match, &pdev->dev);
+		if (match->data = r8a73a4_shdma_devid)
+			pdata = match->data;
+		else
+			pdata = sh_dma_probe_of(pdev, match);
+	} else {
 		pdata = dev_get_platdata(&pdev->dev);
+	}
 
 	/* get platform data */
 	if (!pdata || !pdata->channel_num)
-- 
1.9.1

Re: [PATCH 6/9] ARM: shmobile: r8a7790: add audio dmac node

[Sergei Shtylyov]

Hello.

On 04/08/2014 12:07 AM, Ben Dooks wrote:

> Add initial audio dmac node and resources.

> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
>   arch/arm/boot/dts/r8a7790.dtsi | 68 ++++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 68 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index 2c8cbbd..6032783 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -176,6 +176,74 @@
>   		};
>   	};
>
> +	dma1: dma-mux@1 {
> +		compatible = "renesas,shdma-mux";
> +		#dma-cells = <1>;
> +		dma-channels = <20>;
> +		dma-requests = <256>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		audiodma0: dmac@ec700000 {

    According to the ePARR standard [1], the node name should be 
"dma-controller", not just "dmac".

> +			compatible = "renesas,dma-r8a7790", "renesas,dma-arm";
> +			clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
> +			dma-channels = <13>;
> +			status = "disabled";
> +			reg = <0 0xec700020 0 0xffc0>;
> +			interrupt-parent = <&gic>;

    Shouldn't it be just inherited from the top level node?

[1] http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf

WBR, Sergei

Re: [PATCH 8/9] DMA: shdma: initial of common code

[Sergei Shtylyov]

On 04/08/2014 12:07 AM, Ben Dooks wrote:

> Add support for building shdma internal data from the device tree to allow
> converting the driver to be device tree enabled.

> It includes a helper for the of case to build the internal data used to
> select and filter out the DMA channels from the ID information in the
> device tree. Also updates the documentation for the DT case.

> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
>   Documentation/devicetree/bindings/dma/shdma.txt |  24 +++++
>   drivers/dma/sh/shdma-of.c                       | 134 ++++++++++++++++++++++++
>   drivers/dma/sh/shdma.h                          |  20 ++++
>   include/dt-bindings/dma/shdma.h                 |  45 ++++++++
>   4 files changed, 223 insertions(+)
>   create mode 100644 include/dt-bindings/dma/shdma.h

> diff --git a/Documentation/devicetree/bindings/dma/shdma.txt b/Documentation/devicetree/bindings/dma/shdma.txt
> index 2a3f3b8..7d9e7bd 100644
> --- a/Documentation/devicetree/bindings/dma/shdma.txt
> +++ b/Documentation/devicetree/bindings/dma/shdma.txt
> @@ -15,6 +15,12 @@ Required properties:
>   - compatible:	should be "renesas,shdma-mux"
>   - #dma-cells:	should be <1>, see "dmas" property below
>
> +New properites, required for renesas,dma-r8a7790.
> +- reneasa,slaves: A list of DMA channel MID/RID and the configuration to

    s/reneasa/renesas/

> +		go with them. These pairs are in the form of:
> +			< mid+rid configuration>

    Space after < probably not needed.

> @@ -70,6 +77,23 @@ Example:
>   		};
>   	};
>
> +For r8a7790, the following is an example of using the reneasas,slaves to

    s/reneasas/renesas/

[...]
> diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c
> index 06473a0..386fd9e 100644
> --- a/drivers/dma/sh/shdma-of.c
> +++ b/drivers/dma/sh/shdma-of.c
> @@ -3,12 +3,15 @@
>    *
>    * Copyright (C) 2013 Renesas Electronics Inc.
>    * Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> + * Copyright (c) 2014 Codethink Limited
> + *	Ben Dooks <ben.dooks@codethink.co.uk>
>    *
>    * This is free software; you can redistribute it and/or modify
>    * it under the terms of version 2 of the GNU General Public License as
>    * published by the Free Software Foundation.
>    */
>
> +#include <linux/slab.h>

    I think the #include's are sorted alphabetically in this file.

>   #include <linux/dmaengine.h>
>   #include <linux/module.h>
>   #include <linux/of.h>
> @@ -16,9 +19,37 @@
>   #include <linux/of_platform.h>
>   #include <linux/platform_device.h>
>   #include <linux/shdma-base.h>
> +#include <linux/sh_dma.h>
> +
> +#include <dt-bindings/dma/shdma.h>
>
>   #define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
>
> +#include "shdma-arm.h"
> +
> +static const unsigned int arm_dma_ts_shift[] = SH_DMAE_TS_SHIFT;
> +
> +static struct sh_dmae_pdata arm_dmae_info = {
> +	.ts_low_shift	= SHDMA_ARM_TS_LOW_SHIFT,
> +	.ts_low_mask	= SHDMA_ARM_TS_LOW_BIT << SHDMA_ARM_TS_LOW_SHIFT,
> +	.ts_high_shift	= SHDMA_ARM_TS_HI_SHIFT,
> +	.ts_high_mask	= SHDMA_ARM_TS_HI_BIT << SHDMA_ARM_TS_HI_SHIFT,
> +	.ts_shift	= arm_dma_ts_shift,
> +	.ts_shift_num	= ARRAY_SIZE(arm_dma_ts_shift),
> +	.dmaor_init	= DMAOR_DME,
> +	.chclr_present	= 1,
> +	.chclr_bitwise	= 1,
> +};
> +
> +struct sh_dmae_of_info shdma_arm_info = {
> +	.pdata_template	= &arm_dmae_info,
> +	.channel_offset	= 0x8000-0x20,

    Spaces needed around -, so that the code is at least consistent.

> +	.channel_stride	= 0x80,
> +	.offset		= 0x0,
> +	.dmars		= 0x40,
> +	.chclr_offset	= 0x80,
> +};
> +
>   static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
>   				       struct of_dma *ofdma)
>   {
> @@ -40,6 +71,109 @@ static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
>   	return chan;
>   }
>
> +const struct sh_dmae_pdata *
> +sh_dma_probe_of(struct platform_device *pdev, const struct of_device_id *ofmatch)
> +{
[...]
> +	/* look in current, or parent node for the slave mappings */
> +	prop = of_find_property(np, "renesas,slaves", &len);
> +	if (!prop)
> +		prop = of_find_property(np->parent, "renesas,slaves", &len);
> +

    Empty line not needed here.

> +	if (prop) {
> +		struct sh_dmae_slave_config *slaves;
> +		int nr_slaves = len / (sizeof(u32) * 3);
> +		const __be32 *of_ptr;
> +		u32 of_idx;
> +
[...]
> diff --git a/include/dt-bindings/dma/shdma.h b/include/dt-bindings/dma/shdma.h
> new file mode 100644
> index 0000000..0c8fc9e
> --- /dev/null
> +++ b/include/dt-bindings/dma/shdma.h
> @@ -0,0 +1,45 @@
> +/* DMA binding definitions for SH-DMAC engines.
> + *
> + * Moved from sh_dma.h to share with device tree by Ben Dooks.
> + * Orignal code from:
> + *   shdma.h: Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> + *   shdma-arm.h: Copyright (C) 2013 Renesas Electronics, Inc.

   Hm, you're adding the new code, not moving it, as it seems from this patch...

[...]

WBR, Sergei

Re: [PATCH 3/9] ARM: shmobile: r8a7790: add dmac0 dmac1 nodes

[Geert Uytterhoeven]

Hi Ben,

On Mon, Apr 7, 2014 at 10:07 PM, Ben Dooks <ben.dooks@codethink.co.uk> wrote:
> Add nodes for the SYS-DMA controllers, SYS-DMAC0 and SYS-DMAC1. These
> both share the same device sources, so are wrapped in the shdma-mux

Do you mean device REsources?

> node to allow both to be used.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 8/9] DMA: shdma: initial of common code

[Shevchenko, Andriy]

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Re: [PATCH 8/9] DMA: shdma: initial of common code

[Ben Dooks]

On 08/04/14 09:04, Shevchenko, Andriy wrote:
> On Mon, 2014-04-07 at 21:07 +0100, Ben Dooks wrote:
>> Add support for building shdma internal data from the device tree to allow
>> converting the driver to be device tree enabled.
>>
>> It includes a helper for the of case to build the internal data used to
>> select and filter out the DMA channels from the ID information in the
>> device tree. Also updates the documentation for the DT case.
>
>
> Few minor comments below.
>
>> --- a/drivers/dma/sh/shdma-of.c
>> +++ b/drivers/dma/sh/shdma-of.c
>
>
>> @@ -40,6 +71,109 @@ static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
>>   	return chan;
>>   }
>>
>> +const struct sh_dmae_pdata *
>> +sh_dma_probe_of(struct platform_device *pdev, const struct of_device_id *ofmatch)
>> +{
>> +	const struct device_node *np = pdev->dev.of_node;
>> +	const struct sh_dmae_of_info *ofinf;
>> +	struct device *dev = &pdev->dev;
>> +	struct sh_dmae_pdata *pdata;
>> +	struct sh_dmae_channel *chan;
>> +	struct property *prop;
>> +	u32 nr_chan;
>> +	unsigned ch;
>> +	int ret;
>> +	int len;
>> +
>> +	if (!ofmatch)
>> +		return NULL;
>> +
>> +	ofinf = ofmatch->data;
>> +
>> +	pdata = devm_kzalloc(dev, sizeof(struct sh_dmae_pdata), GFP_KERNEL);
>
> sizeof(*pdata) ?

I will think on this one.

>> +	if (!pdata) {
>> +		dev_err(dev, "failed to make platform data\n");
>> +		return NULL;
>> +	}
>> +
>> +	*pdata = *ofinf->pdata_template;	/* copy in template first */
>> +
>> +	ret = of_property_read_u32(np, "dma-channels", &nr_chan);
>> +	if (ret < 0) {
>> +		dev_err(dev, "failed to get number of channels\n");
>> +		return NULL;
>> +	}
>> +
>> +	chan = devm_kzalloc(dev, nr_chan * sizeof(struct sh_dmae_channel),
>> +			    GFP_KERNEL);
>
> devm_kcalloc()


Thanks.


-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [Linux-kernel] [PATCH 2/9] ARM: shmobile: r8a7790: add dma defines for sys and audio dmacs

[Ben Hutchings]

On Mon, 2014-04-07 at 21:07 +0100, Ben Dooks wrote:
> Add the DMA resource IDs for the R8A7790 Audio and SYS DMA controllers
> for use when specifying DMA handles.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
>  include/dt-bindings/dma/r8a7790-dma.h | 223 ++++++++++++++++++++++++++++++++++
>  1 file changed, 223 insertions(+)
>  create mode 100644 include/dt-bindings/dma/r8a7790-dma.h
> 
> diff --git a/include/dt-bindings/dma/r8a7790-dma.h b/include/dt-bindings/dma/r8a7790-dma.h
> new file mode 100644
> index 0000000..7c52132
> --- /dev/null
> +++ b/include/dt-bindings/dma/r8a7790-dma.h
> @@ -0,0 +1,223 @@
> +/*
> + * R8A7790 System and Audio DMA channel resource identifiers
> + *
> + * Copyirght (c) 2014 Codethink Ltd.
[...]

Typo: 'Copyirght'

Ben.

Re: [Linux-kernel] [PATCH 2/9] ARM: shmobile: r8a7790: add dma defines for sys and audio dmacs

[Ben Dooks]

On 08/04/14 11:48, Ben Hutchings wrote:
> On Mon, 2014-04-07 at 21:07 +0100, Ben Dooks wrote:
>> Add the DMA resource IDs for the R8A7790 Audio and SYS DMA controllers
>> for use when specifying DMA handles.
>>
>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>> ---
>>   include/dt-bindings/dma/r8a7790-dma.h | 223 ++++++++++++++++++++++++++++++++++
>>   1 file changed, 223 insertions(+)
>>   create mode 100644 include/dt-bindings/dma/r8a7790-dma.h
>>
>> diff --git a/include/dt-bindings/dma/r8a7790-dma.h b/include/dt-bindings/dma/r8a7790-dma.h
>> new file mode 100644
>> index 0000000..7c52132
>> --- /dev/null
>> +++ b/include/dt-bindings/dma/r8a7790-dma.h
>> @@ -0,0 +1,223 @@
>> +/*
>> + * R8A7790 System and Audio DMA channel resource identifiers
>> + *
>> + * Copyirght (c) 2014 Codethink Ltd.
> [...]
>
> Typo: 'Copyirght'
>
Thanks, will fix.

-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [PATCH 2/9] ARM: shmobile: r8a7790: add dma defines for sys and audio dmacs

[Laurent Pinchart]

Hi Ben

Thank you for the patch.

On Monday 07 April 2014 21:07:02 Ben Dooks wrote:
> Add the DMA resource IDs for the R8A7790 Audio and SYS DMA controllers
> for use when specifying DMA handles.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
>  include/dt-bindings/dma/r8a7790-dma.h | 223 +++++++++++++++++++++++++++++++
>  1 file changed, 223 insertions(+)
>  create mode 100644 include/dt-bindings/dma/r8a7790-dma.h
> 
> diff --git a/include/dt-bindings/dma/r8a7790-dma.h
> b/include/dt-bindings/dma/r8a7790-dma.h new file mode 100644
> index 0000000..7c52132
> --- /dev/null
> +++ b/include/dt-bindings/dma/r8a7790-dma.h
> @@ -0,0 +1,223 @@
> +/*
> + * R8A7790 System and Audio DMA channel resource identifiers
> + *
> + * Copyirght (c) 2014 Codethink Ltd.
> + *	Ben Dooks <ben.dooks@codethink.co.uk>
> + *
> + * Licensed under GPLv2
> +*/
> +
> +/* System DMAC */
> +
> +#define R8A7790_DMA_SCIFA0_TX	(0x21)

Do we really need parentheses ? Also, doesn't the kernel favor lower-case hex 
values ?

> +#define R8A7790_DMA_SCIFA0_RX	(0x22)
> +#define R8A7790_DMA_SCIFA1_TX	(0x25)
> +#define R8A7790_DMA_SCIFA1_RX	(0x26)
> +#define R8A7790_DMA_SCIFA2_TX	(0x27)
> +#define R8A7790_DMA_SCIFA2_RX	(0x28)
> +
> +#define R8A7790_DMA_SCIFB0_TX	(0x3D)
> +#define R8A7790_DMA_SCIFB0_RX	(0x3E)
> +#define R8A7790_DMA_SCIFB1_TX	(0x19)
> +#define R8A7790_DMA_SCIFB1_RX	(0x1A)
> +#define R8A7790_DMA_SCIFB2_TX	(0x1D)
> +#define R8A7790_DMA_SCIFB2_RX	(0x1E)
> +
> +#define R8A7790_DMA_HSCIF0_TX	(0x39)
> +#define R8A7790_DMA_HSCIF0_RX	(0x3A)
> +#define R8A7790_DMA_HSCIF1_TX	(0x4D)
> +#define R8A7790_DMA_HSCIF1_RX	(0x4E)
> +
> +#define R8A7790_DMA_SCIF0_TX	(0x29)
> +#define R8A7790_DMA_SCIF0_RX	(0x2A)
> +#define R8A7790_DMA_SCIF1_TX	(0x2D)
> +#define R8A7790_DMA_SCIF1_RX	(0x2E)
> +
> +#define R8A7790_DMA_MSIOF0_TX	(0x81)
> +#define R8A7790_DMA_MSIOF0_RX	(0x82)
> +#define R8A7790_DMA_MSIOF1_TX	(0x85)
> +#define R8A7790_DMA_MSIOF1_RX	(0x86)
> +#define R8A7790_DMA_MSIOF2_TX	(0x41)
> +#define R8A7790_DMA_MSIOF2_RX	(0x42)
> +#define R8A7790_DMA_MSIOF3_TX	(0x45)
> +#define R8A7790_DMA_MSIOF3_RX	(0x46)
> +
> +#define R8A7790_DMA_QSPI_TX	(0x17)
> +#define R8A7790_DMA_QSPI_RX	(0x18)
> +
> +#define R8A7790_DMA_SIM_TX	(0xA1)
> +#define R8A7790_DMA_SIM_RX	(0xA2)
> +
> +#define R8A7790_DMA_IIC0_TX	(0x61)
> +#define R8A7790_DMA_IIC0_RX	(0x62)
> +#define R8A7790_DMA_IIC1_TX	(0x65)
> +#define R8A7790_DMA_IIC1_RX	(0x66)
> +#define R8A7790_DMA_IIC2_TX	(0x69)
> +#define R8A7790_DMA_IIC2_RX	(0x6A)
> +#define R8A7790_DMA_IIC3_TX	(0x77)
> +#define R8A7790_DMA_IIC3_RX	(0x78)
> +
> +#define R8A7790_DMA_SDHI0_TX	(0xCD)
> +#define R8A7790_DMA_SDHI0_RX	(0xCE)
> +#define R8A7790_DMA_SDHI1_TX	(0xC9)
> +#define R8A7790_DMA_SDHI1_RX	(0xCA)
> +#define R8A7790_DMA_SDHI2_TX	(0xC1)
> +#define R8A7790_DMA_SDHI2_RX	(0xC2)
> +#define R8A7790_DMA_SDHI2C2_TX	(0xC5)
> +#define R8A7790_DMA_SDHI2C2_RX	(0xC6)
> +#define R8A7790_DMA_SDHI3_TX	(0xD3)
> +#define R8A7790_DMA_SDHI3_RX	(0xD4)
> +#define R8A7790_DMA_SDHI3C2_TX	(0xDF)
> +#define R8A7790_DMA_SDHI3C2_RX	(0xDE)
> +
> +#define R8A7790_DMA_TPU0	(0xF1)
> +#define R8A7790_DMA_TSIF0	(0xEA)
> +#define R8A7790_DMA_TSIF1	(0xF0)
> +
> +#define R8A7790_DMA_AXISTATR	(0xA6)
> +#define R8A7790_DMA_AXISTATS0	(0xAC)
> +#define R8A7790_DMA_AXISTATS1	(0xAA)
> +#define R8A7790_DMA_AXISTATS2	(0xA8)
> +#define R8A7790_DMA_AXISTATS3	(0xA4)
> +
> +#define R8A7790_DMA_MMCIF0_TX	(0xD1)
> +#define R8A7790_DMA_MMCIF0_RX	(0xD2)
> +#define R8A7790_DMA_MMCIF1_TX	(0xE1)
> +#define R8A7790_DMA_MMCIF1_RX	(0xE2)
> +
> +/* Audio DMAC */
> +
> +#define R8A7790_DMA_DTCPC0_TX	(0xD7)
> +#define R8A7790_DMA_DTCPC0_RX	(0xD8)
> +#define R8A7790_DMA_DTCPC1_TX	(0xD9)
> +#define R8A7790_DMA_DTCPC1_RX	(0xDA)
> +#define R8A7790_DMA_DTCPP0_TX	(0xBF)
> +#define R8A7790_DMA_DTCPP0_RX	(0xC0)
> +#define R8A7790_DMA_DTCPP1_TX	(0xD5)
> +#define R8A7790_DMA_DTCPP1_RX	(0xD6)
> +
> +#define R8A7790_DMA_MLM0_TX	(0xDB)
> +#define R8A7790_DMA_MLM0_RX	(0xDC)
> +#define R8A7790_DMA_MLM1_TX	(0xE3)
> +#define R8A7790_DMA_MLM1_RX	(0xE4)
> +#define R8A7790_DMA_MLM2_TX	(0xE5)
> +#define R8A7790_DMA_MLM2_RX	(0xE6)
> +#define R8A7790_DMA_MLM3_TX	(0xE7)
> +#define R8A7790_DMA_MLM3_RX	(0xE8)
> +#define R8A7790_DMA_MLM4_TX	(0xF3)
> +#define R8A7790_DMA_MLM4_RX	(0xF4)
> +#define R8A7790_DMA_MLM5_TX	(0xF5)
> +#define R8A7790_DMA_MLM5_RX	(0xF6)
> +#define R8A7790_DMA_MLM6_TX	(0xF7)
> +#define R8A7790_DMA_MLM6_RX	(0xF8)
> +#define R8A7790_DMA_MLM7_TX	(0xF9)
> +#define R8A7790_DMA_MLM7_RX	(0xFA)
> +
> +#define R8A7790_DMA_SCU0	(0x85)
> +#define R8A7790_DMA_SCU1	(0x87)
> +#define R8A7790_DMA_SCU2	(0x89)
> +#define R8A7790_DMA_SCU3	(0x8B)
> +#define R8A7790_DMA_SCU4	(0x8D)
> +#define R8A7790_DMA_SCU5	(0x8F)
> +#define R8A7790_DMA_SCU6	(0x91)
> +#define R8A7790_DMA_SCU7	(0x93)
> +#define R8A7790_DMA_SCU8	(0x95)
> +#define R8A7790_DMA_SCU9	(0x97)
> +
> +#define R8A7790_DMA_SCUCMD0	(0xBC)
> +#define R8A7790_DMA_SCUCMD1	(0xBE)
> +
> +#define R8A7790_DMA_SCUOUT0	(0x9A)
> +#define R8A7790_DMA_SCUOUT1	(0x9C)
> +#define R8A7790_DMA_SCUOUT2	(0x9E)
> +#define R8A7790_DMA_SCUOUT3	(0xA0)
> +#define R8A7790_DMA_SCUOUT4	(0xB0)
> +#define R8A7790_DMA_SCUOUT5	(0xB2)
> +#define R8A7790_DMA_SCUOUT6	(0xB4)
> +#define R8A7790_DMA_SCUOUT7	(0xB6)
> +#define R8A7790_DMA_SCUOUT8	(0xB8)
> +#define R8A7790_DMA_SCUOUT9	(0xBA)
> +
> +#define R8A7790_DMA_SSCI00_TX	(0x15)
> +#define R8A7790_DMA_SSCI00_RX	(0x16)
> +#define R8A7790_DMA_SSCI01_TX	(0x35)
> +#define R8A7790_DMA_SSCI01_RX	(0x36)
> +#define R8A7790_DMA_SSCI02_TX	(0x37)
> +#define R8A7790_DMA_SSCI02_RX	(0x38)
> +#define R8A7790_DMA_SSCI03_TX	(0x47)
> +#define R8A7790_DMA_SSCI03_RX	(0x48)
> +
> +#define R8A7790_DMA_SSCI10_TX	(0x49)
> +#define R8A7790_DMA_SSCI10_RX	(0x4A)
> +#define R8A7790_DMA_SSCI11_TX	(0x4B)
> +#define R8A7790_DMA_SSCI11_RX	(0x4C)
> +#define R8A7790_DMA_SSCI12_TX	(0x57)
> +#define R8A7790_DMA_SSCI12_RX	(0x58)
> +#define R8A7790_DMA_SSCI13_TX	(0x59)
> +#define R8A7790_DMA_SSCI13_RX	(0x5A)
> +
> +#define R8A7790_DMA_SSCI20_TX	(0x63)
> +#define R8A7790_DMA_SSCI20_RX	(0x64)
> +#define R8A7790_DMA_SSCI21_TX	(0x67)
> +#define R8A7790_DMA_SSCI21_RX	(0x68)
> +#define R8A7790_DMA_SSCI22_TX	(0x6B)
> +#define R8A7790_DMA_SSCI22_RX	(0x6C)
> +#define R8A7790_DMA_SSCI23_TX	(0x6D)
> +#define R8A7790_DMA_SSCI23_RX	(0x6E)
> +
> +#define R8A7790_DMA_SSCI20_TX	(0x63)
> +#define R8A7790_DMA_SSCI20_RX	(0x64)
> +#define R8A7790_DMA_SSCI21_TX	(0x67)
> +#define R8A7790_DMA_SSCI21_RX	(0x68)
> +#define R8A7790_DMA_SSCI22_TX	(0x6B)
> +#define R8A7790_DMA_SSCI22_RX	(0x6C)
> +#define R8A7790_DMA_SSCI23_TX	(0x6D)
> +#define R8A7790_DMA_SSCI23_RX	(0x6E)
> +
> +#define R8A7790_DMA_SSCI3_TX	(0x6F)
> +#define R8A7790_DMA_SSCI3_RX	(0x70)
> +
> +#define R8A7790_DMA_SSCI4_TX	(0x71)
> +#define R8A7790_DMA_SSCI4_RX	(0x72)
> +
> +#define R8A7790_DMA_SSCI5_TX	(0x73)
> +#define R8A7790_DMA_SSCI5_RX	(0x74)
> +
> +#define R8A7790_DMA_SSCI6_TX	(0x75)
> +#define R8A7790_DMA_SSCI6_RX	(0x76)
> +
> +#define R8A7790_DMA_SSCI7_TX	(0x79)
> +#define R8A7790_DMA_SSCI7_RX	(0x7A)
> +
> +#define R8A7790_DMA_SSCI8_TX	(0x7B)
> +#define R8A7790_DMA_SSCI8_RX	(0x7C)
> +
> +#define R8A7790_DMA_SSCI90_TX	(0x7D)
> +#define R8A7790_DMA_SSCI90_RX	(0x7E)
> +#define R8A7790_DMA_SSCI91_TX	(0x7F)
> +#define R8A7790_DMA_SSCI91_RX	(0x80)
> +#define R8A7790_DMA_SSCI92_TX	(0x81)
> +#define R8A7790_DMA_SSCI92_RX	(0x82)
> +#define R8A7790_DMA_SSCI93_TX	(0x83)
> +#define R8A7790_DMA_SSCI93_RX	(0x84)
> +
> +#define R8A7790_DMA_SSIND0_TX	(0x01)
> +#define R8A7790_DMA_SSIND0_RX	(0x02)
> +#define R8A7790_DMA_SSIND1_TX	(0x03)
> +#define R8A7790_DMA_SSIND1_RX	(0x04)
> +#define R8A7790_DMA_SSIND2_TX	(0x05)
> +#define R8A7790_DMA_SSIND2_RX	(0x06)
> +#define R8A7790_DMA_SSIND3_TX	(0x07)
> +#define R8A7790_DMA_SSIND3_RX	(0x08)
> +#define R8A7790_DMA_SSIND4_TX	(0x09)
> +#define R8A7790_DMA_SSIND4_RX	(0x0A)
> +#define R8A7790_DMA_SSIND5_TX	(0x0B)
> +#define R8A7790_DMA_SSIND5_RX	(0x0C)
> +#define R8A7790_DMA_SSIND6_TX	(0x0D)
> +#define R8A7790_DMA_SSIND6_RX	(0x0E)
> +#define R8A7790_DMA_SSIND7_TX	(0x0F)
> +#define R8A7790_DMA_SSIND7_RX	(0x10)
> +#define R8A7790_DMA_SSIND8_TX	(0x11)
> +#define R8A7790_DMA_SSIND8_RX	(0x12)
> +#define R8A7790_DMA_SSIND9_TX	(0x13)
> +#define R8A7790_DMA_SSIND9_RX	(0x14)

-- 
Regards,

Laurent Pinchart

Re: [PATCH 8/9] DMA: shdma: initial of common code

[Laurent Pinchart]

Hi Ben,

thank you for the patch.

On Monday 07 April 2014 21:07:08 Ben Dooks wrote:
> Add support for building shdma internal data from the device tree to allow
> converting the driver to be device tree enabled.
> 
> It includes a helper for the of case to build the internal data used to
> select and filter out the DMA channels from the ID information in the
> device tree. Also updates the documentation for the DT case.
> 
> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> ---
>  Documentation/devicetree/bindings/dma/shdma.txt |  24 +++++
>  drivers/dma/sh/shdma-of.c                       | 134 +++++++++++++++++++++
>  drivers/dma/sh/shdma.h                          |  20 ++++
>  include/dt-bindings/dma/shdma.h                 |  45 ++++++++
>  4 files changed, 223 insertions(+)
>  create mode 100644 include/dt-bindings/dma/shdma.h
> 
> diff --git a/Documentation/devicetree/bindings/dma/shdma.txt
> b/Documentation/devicetree/bindings/dma/shdma.txt index 2a3f3b8..7d9e7bd
> 100644
> --- a/Documentation/devicetree/bindings/dma/shdma.txt
> +++ b/Documentation/devicetree/bindings/dma/shdma.txt
> @@ -15,6 +15,12 @@ Required properties:
>  - compatible:	should be "renesas,shdma-mux"
>  - #dma-cells:	should be <1>, see "dmas" property below
> 
> +New properites, required for renesas,dma-r8a7790.

s/properites/properties/

> +- reneasa,slaves: A list of DMA channel MID/RID and the configuration to

s/reneasa/renesas/

> +		go with them. These pairs are in the form of:
> +			< mid+rid configuration>

The description is pretty terse. Just reading it I don't know what slaves need 
to be listed, what an MID or RID is, how "mid+rid" combines the MID and RID 
exactly, and what configuration can be specified. I believe a more detailed 
description is needed.

> +
> +
>  Optional properties (currently unused):
>  - dma-channels:	number of DMA channels
>  - dma-requests:	number of DMA request signals
> @@ -25,6 +31,7 @@ Required properties:
>  - compatible:	should be of the form "renesas,shdma-<soc>", where <soc>
> should be replaced with the desired SoC model, e.g.
>  		"renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
> +		"renesas,dma-r8a7790" for the DMAC on the R8A7790.
> 
>  Example:
>  	dmac: dma-multiplexer@0 {
> @@ -70,6 +77,23 @@ Example:
>  		};
>  	};
> 
> +For r8a7790, the following is an example of using the reneasas,slaves to
> +configure the slave channels on the controller:
> +
> +	dma0: dma-mux@0 {
> +		compatible = "renesas,shdma-mux";
> +		#dma-cells = <1>;
> +		dma-channels = <20>;
> +		dma-requests = <256>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +
> +		renesas,slaves = <R8A7790_DMA_SDHI0_RX  CHCR_RX_256BIT>,
> +                                 <R8A7790_DMA_SDHI0_TX  CHCR_TX_256BIT>;

The MID/RID of slave devices are already specified in the "dmas" property of 
the slave devices DT nodes. Why does it need to be specified here as well ? Is 
the configuration hardware properties or software parameters ? In the later 
case shouldn't it be specified in the slave DT node instead ?

> +	}
> +
>  * DMA client
> 
>  Required properties:
> diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c
> index 06473a0..386fd9e 100644
> --- a/drivers/dma/sh/shdma-of.c
> +++ b/drivers/dma/sh/shdma-of.c
> @@ -3,12 +3,15 @@
>   *
>   * Copyright (C) 2013 Renesas Electronics Inc.
>   * Author: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> + * Copyright (c) 2014 Codethink Limited
> + *	Ben Dooks <ben.dooks@codethink.co.uk>
>   *
>   * This is free software; you can redistribute it and/or modify
>   * it under the terms of version 2 of the GNU General Public License as
>   * published by the Free Software Foundation.
>   */
> 
> +#include <linux/slab.h>
>  #include <linux/dmaengine.h>
>  #include <linux/module.h>
>  #include <linux/of.h>
> @@ -16,9 +19,37 @@
>  #include <linux/of_platform.h>
>  #include <linux/platform_device.h>
>  #include <linux/shdma-base.h>
> +#include <linux/sh_dma.h>
> +
> +#include <dt-bindings/dma/shdma.h>
> 
>  #define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
> 
> +#include "shdma-arm.h"
> +
> +static const unsigned int arm_dma_ts_shift[] = SH_DMAE_TS_SHIFT;
> +
> +static struct sh_dmae_pdata arm_dmae_info = {
> +	.ts_low_shift	= SHDMA_ARM_TS_LOW_SHIFT,
> +	.ts_low_mask	= SHDMA_ARM_TS_LOW_BIT << SHDMA_ARM_TS_LOW_SHIFT,
> +	.ts_high_shift	= SHDMA_ARM_TS_HI_SHIFT,
> +	.ts_high_mask	= SHDMA_ARM_TS_HI_BIT << SHDMA_ARM_TS_HI_SHIFT,
> +	.ts_shift	= arm_dma_ts_shift,
> +	.ts_shift_num	= ARRAY_SIZE(arm_dma_ts_shift),
> +	.dmaor_init	= DMAOR_DME,
> +	.chclr_present	= 1,
> +	.chclr_bitwise	= 1,
> +};
> +
> +struct sh_dmae_of_info shdma_arm_info = {
> +	.pdata_template	= &arm_dmae_info,
> +	.channel_offset	= 0x8000-0x20,
> +	.channel_stride	= 0x80,
> +	.offset		= 0x0,
> +	.dmars		= 0x40,
> +	.chclr_offset	= 0x80,
> +};
> +
>  static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec,
>  				       struct of_dma *ofdma)
>  {
> @@ -40,6 +71,109 @@ static struct dma_chan *shdma_of_xlate(struct
> of_phandle_args *dma_spec, return chan;
>  }
> 
> +const struct sh_dmae_pdata *
> +sh_dma_probe_of(struct platform_device *pdev, const struct of_device_id
> *ofmatch) +{
> +	const struct device_node *np = pdev->dev.of_node;
> +	const struct sh_dmae_of_info *ofinf;
> +	struct device *dev = &pdev->dev;
> +	struct sh_dmae_pdata *pdata;
> +	struct sh_dmae_channel *chan;
> +	struct property *prop;
> +	u32 nr_chan;
> +	unsigned ch;
> +	int ret;
> +	int len;
> +
> +	if (!ofmatch)
> +		return NULL;
> +
> +	ofinf = ofmatch->data;
> +
> +	pdata = devm_kzalloc(dev, sizeof(struct sh_dmae_pdata), GFP_KERNEL);
> +	if (!pdata) {
> +		dev_err(dev, "failed to make platform data\n");
> +		return NULL;
> +	}
> +
> +	*pdata = *ofinf->pdata_template;	/* copy in template first */
> +
> +	ret = of_property_read_u32(np, "dma-channels", &nr_chan);
> +	if (ret < 0) {
> +		dev_err(dev, "failed to get number of channels\n");
> +		return NULL;
> +	}
> +
> +	chan = devm_kzalloc(dev, nr_chan * sizeof(struct sh_dmae_channel),
> +			    GFP_KERNEL);
> +	if (!chan) {
> +		dev_err(dev, "cannot allocate %d channels\n", nr_chan);
> +		return NULL;
> +	}
> +
> +	pdata->channel = chan;
> +	pdata->channel_num = nr_chan;
> +
> +	dev_dbg(dev, "%d dma channels allocated\n", nr_chan);
> +
> +	for (ch = 0; ch < nr_chan; ch++) {
> +		struct sh_dmae_channel *cp = chan + ch;
> +		u32 base = ofinf->channel_offset + ofinf->channel_stride * ch;
> +
> +		cp->offset = base + ofinf->offset;
> +		cp->dmars = base + ofinf->dmars;
> +		cp->chclr_bit = ch;
> +		cp->chclr_offset = ofinf->chclr_offset;
> +
> +		dev_dbg(dev, "ch %d: off %08x, dmars %08x, bit %d, off %d\n",
> +			ch, cp->offset, cp->dmars,
> +			cp->chclr_bit, cp->chclr_offset);
> +	}
> +
> +	/* look in current, or parent node for the slave mappings */
> +	prop = of_find_property(np, "renesas,slaves", &len);
> +	if (!prop)
> +		prop = of_find_property(np->parent, "renesas,slaves", &len);
> +
> +	if (prop) {
> +		struct sh_dmae_slave_config *slaves;
> +		int nr_slaves = len / (sizeof(u32) * 3);
> +		const __be32 *of_ptr;
> +		u32 of_idx;
> +
> +		slaves = devm_kzalloc(dev, sizeof(*slaves) * nr_slaves,
> +				      GFP_KERNEL);
> +		if (!slaves) {
> +			dev_err(dev, "cannot allocate %d slaves\n", nr_slaves);
> +			return NULL;
> +		}
> +
> +		pdata->slave = slaves;
> +		pdata->slave_num = nr_slaves;
> +		of_idx = 0;
> +		of_ptr = NULL;
> +
> +		dev_dbg(dev, "building %d slaves\n", nr_slaves);
> +
> +		for (; nr_slaves > 0; nr_slaves--, slaves++) {
> +			of_ptr= of_prop_next_u32(prop, of_ptr, &of_idx);
> +			slaves->mid_rid = be32_to_cpu(*of_ptr);
> +			slaves->slave_id = slaves->mid_rid;
> +
> +			of_ptr= of_prop_next_u32(prop, of_ptr, &of_idx);
> +			slaves->chcr = be32_to_cpu(*of_ptr);
> +
> +			dev_dbg(dev, "slave: id %02x, chcr %08x, addr %08x\n",
> +				slaves->mid_rid, slaves->chcr, slaves->addr);
> +		}
> +	} else {
> +		dev_warn(dev, "did not find any slave information\n");
> +	}
> +
> +	pdev->dev.platform_data = pdata;
> +	return pdata;
> +};
> +
>  static int shdma_of_probe(struct platform_device *pdev)
>  {
>  	const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev);
> diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h
> index 758a57b..0db8327 100644
> --- a/drivers/dma/sh/shdma.h
> +++ b/drivers/dma/sh/shdma.h
> @@ -56,6 +56,26 @@ struct sh_dmae_desc {
>  	struct shdma_desc shdma_desc;
>  };
> 
> +/*
> + * Template information for building shdma data, provided as part of the
> + * data field in the of_device_id structure. This is then used to build
> + * the platform data for the dma code.
> + */
> +struct sh_dmae_of_info {
> +	struct sh_dmae_pdata	*pdata_template;
> +	unsigned int		channel_offset;
> +	unsigned int		channel_stride;
> +	int			offset;
> +	int			dmars;
> +	int			chclr_offset;
> +	int			chclr_bit;
> +};
> +
> +extern struct sh_dmae_of_info shdma_arm_info;
> +
> +extern const struct sh_dmae_pdata *sh_dma_probe_of(struct platform_device
> *pdev, +						   const struct of_device_id *match);
> +
>  #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan,
> shdma_chan) #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
>  #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
> diff --git a/include/dt-bindings/dma/shdma.h
> b/include/dt-bindings/dma/shdma.h new file mode 100644
> index 0000000..0c8fc9e
> --- /dev/null
> +++ b/include/dt-bindings/dma/shdma.h
> @@ -0,0 +1,45 @@
> +/* DMA binding definitions for SH-DMAC engines.
> + *
> + * Moved from sh_dma.h to share with device tree by Ben Dooks.
> + * Orignal code from:
> + *   shdma.h: Copyright (C) 2010 Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> + *   shdma-arm.h: Copyright (C) 2013 Renesas
> Electronics, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#define SHDMA_DM_INC	0x00004000
> +#define SHDMA_DM_DEC	0x00008000
> +#define SHDMA_DM_FIX	0x0000c000
> +#define SHDMA_SM_INC	0x00001000
> +#define SHDMA_SM_DEC	0x00002000
> +#define SHDMA_SM_FIX	0x00003000
> +#define SHDMA_CHCR_DE	0x00000001
> +#define SHDMA_CHCR_TE	0x00000002
> +#define SHDMA_CHCR_IE	0x00000004
> +
> +/* ARM specific definitions */
> +
> +#define SHDMA_ARM_SZ_8BIT	(0)
> +#define SHDMA_ARM_SZ_16BIT	(1)
> +#define SHDMA_ARM_SZ_32BIT	(2)
> +#define SHDMA_ARM_SZ_64BIT	(7)
> +#define SHDMA_ARM_SZ_128BIT	(3)
> +#define SHDMA_ARM_SZ_256BIT	(4)
> +#define SHDMA_ARM_SZ_512BIT	(5)
> +
> +#define SHDMA_ARM_TS_LOW_BIT	(0x3)
> +#define SHDMA_ARM_TS_HI_BIT	(0xc)
> +
> +#define SHDMA_ARM_TS_LOW_SHIFT	(3)
> +#define SHDMA_ARM_TS_HI_SHIFT	(20 - 2)	/* 2 bits for shifted low TS */
> +
> +#define SHDMA_ARM_TS_INDEX2VAL(i) \
> +	((((i) & SHDMA_ARM_TS_LOW_BIT) << SHDMA_ARM_TS_LOW_SHIFT) |\
> +	 (((i) & SHDMA_ARM_TS_HI_BIT)  << SHDMA_ARM_TS_HI_SHIFT))
> +
> +#define SHDMA_ARM_CHCR_RX(size) (SHDMA_DM_INC | SHDMA_SM_FIX | 0x800 |
> SHDMA_ARM_TS_INDEX2VAL(size)) +#define SHDMA_ARM_CHCR_TX(size)
> (SHDMA_DM_FIX | SHDMA_SM_INC | 0x800 | SHDMA_ARM_TS_INDEX2VAL(size)) +

-- 
Regards,

Laurent Pinchart

Re: [PATCH 2/9] ARM: shmobile: r8a7790: add dma defines for sys and audio dmacs

[Ben Dooks]

On 08/04/14 14:22, Laurent Pinchart wrote:
> Hi Ben
>
> Thank you for the patch.
>
> On Monday 07 April 2014 21:07:02 Ben Dooks wrote:
>> Add the DMA resource IDs for the R8A7790 Audio and SYS DMA controllers
>> for use when specifying DMA handles.
>>
>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>> ---
>>   include/dt-bindings/dma/r8a7790-dma.h | 223 +++++++++++++++++++++++++++++++
>>   1 file changed, 223 insertions(+)
>>   create mode 100644 include/dt-bindings/dma/r8a7790-dma.h
>>
>> diff --git a/include/dt-bindings/dma/r8a7790-dma.h
>> b/include/dt-bindings/dma/r8a7790-dma.h new file mode 100644
>> index 0000000..7c52132
>> --- /dev/null
>> +++ b/include/dt-bindings/dma/r8a7790-dma.h
>> @@ -0,0 +1,223 @@
>> +/*
>> + * R8A7790 System and Audio DMA channel resource identifiers
>> + *
>> + * Copyirght (c) 2014 Codethink Ltd.
>> + *	Ben Dooks <ben.dooks@codethink.co.uk>
>> + *
>> + * Licensed under GPLv2
>> +*/
>> +
>> +/* System DMAC */
>> +
>> +#define R8A7790_DMA_SCIFA0_TX	(0x21)
>
> Do we really need parentheses ? Also, doesn't the kernel favor lower-case hex
> values ?

Parentheses are useful to stop accidental concatenation
so I like them and would prefer them to stay.

Not sure on the case for the hex constants.



-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [PATCH 3/9] ARM: shmobile: r8a7790: add dmac0 dmac1 nodes

[Ben Dooks]

On 07/04/14 22:05, Geert Uytterhoeven wrote:
> Hi Ben,
>
> On Mon, Apr 7, 2014 at 10:07 PM, Ben Dooks <ben.dooks@codethink.co.uk> wrote:
>> Add nodes for the SYS-DMA controllers, SYS-DMAC0 and SYS-DMAC1. These
>> both share the same device sources, so are wrapped in the shdma-mux
>
> Do you mean device REsources?
>
>> node to allow both to be used.

Thanks.

Looking at it, they share the same device muxes is a better way of
putting it as the parent node also says.


-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [PATCH 6/9] ARM: shmobile: r8a7790: add audio dmac node

[Ben Dooks]

On 07/04/14 21:39, Sergei Shtylyov wrote:
> Hello.
>
> On 04/08/2014 12:07 AM, Ben Dooks wrote:
>
>> Add initial audio dmac node and resources.
>
>> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
>> ---
>>   arch/arm/boot/dts/r8a7790.dtsi | 68
>> ++++++++++++++++++++++++++++++++++++++++++
>>   1 file changed, 68 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/r8a7790.dtsi
>> b/arch/arm/boot/dts/r8a7790.dtsi
>> index 2c8cbbd..6032783 100644
>> --- a/arch/arm/boot/dts/r8a7790.dtsi
>> +++ b/arch/arm/boot/dts/r8a7790.dtsi
>> @@ -176,6 +176,74 @@
>>           };
>>       };
>>
>> +    dma1: dma-mux@1 {
>> +        compatible = "renesas,shdma-mux";
>> +        #dma-cells = <1>;
>> +        dma-channels = <20>;
>> +        dma-requests = <256>;
>> +        #address-cells = <2>;
>> +        #size-cells = <2>;
>> +        ranges;
>> +
>> +        audiodma0: dmac@ec700000 {
>
>     According to the ePARR standard [1], the node name should be
> "dma-controller", not just "dmac".
>
>> +            compatible = "renesas,dma-r8a7790", "renesas,dma-arm";
>> +            clocks = <&mstp5_clks R8A7790_CLK_AUDIO_DMAC0>;
>> +            dma-channels = <13>;
>> +            status = "disabled";
>> +            reg = <0 0xec700020 0 0xffc0>;
>> +            interrupt-parent = <&gic>;
>
>     Shouldn't it be just inherited from the top level node?

Thanks, it should be in this case and forgot to remove it.


-- 
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

Re: [PATCH 2/9] ARM: shmobile: r8a7790: add dma defines for sys and audio dmacs

[Laurent Pinchart]

Hi Ben,

On Tuesday 08 April 2014 14:55:27 Ben Dooks wrote:
> On 08/04/14 14:22, Laurent Pinchart wrote:
> > Hi Ben
> > 
> > Thank you for the patch.
> > 
> > On Monday 07 April 2014 21:07:02 Ben Dooks wrote:
> >> Add the DMA resource IDs for the R8A7790 Audio and SYS DMA controllers
> >> for use when specifying DMA handles.
> >> 
> >> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
> >> ---
> >> 
> >>  include/dt-bindings/dma/r8a7790-dma.h | 223 +++++++++++++++++++++++++++
> >>  1 file changed, 223 insertions(+)
> >>  create mode 100644 include/dt-bindings/dma/r8a7790-dma.h
> >> 
> >> diff --git a/include/dt-bindings/dma/r8a7790-dma.h
> >> b/include/dt-bindings/dma/r8a7790-dma.h new file mode 100644
> >> index 0000000..7c52132
> >> --- /dev/null
> >> +++ b/include/dt-bindings/dma/r8a7790-dma.h
> >> @@ -0,0 +1,223 @@
> >> +/*
> >> + * R8A7790 System and Audio DMA channel resource identifiers
> >> + *
> >> + * Copyirght (c) 2014 Codethink Ltd.
> >> + *	Ben Dooks <ben.dooks@codethink.co.uk>
> >> + *
> >> + * Licensed under GPLv2
> >> +*/
> >> +
> >> +/* System DMAC */
> >> +
> >> +#define R8A7790_DMA_SCIFA0_TX	(0x21)
> > 
> > Do we really need parentheses ? Also, doesn't the kernel favor lower-case
> > hex values ?
> 
> Parentheses are useful to stop accidental concatenation so I like them and
> would prefer them to stay.

I'd say that if you write

R8A7790_DMA_SCIFA0_TX##R8A7790_DMA_SCIFA0_RX

in your .dts file you deserve concatenation :-)

I'm all in favor of parentheses in macro definitions for "complex" macros that 
involve operators for instance, but when the macro expands to a single token 
that's less useful (and not used in most kernel source files) 

> Not sure on the case for the hex constants.

It might just be me.

$ find include -type f -name \*.h -exec grep "^#define.*0x[0-9]*[a-f][0-9a-
f]*[^0-9a-fA-F]" {} \; | wc
   2237   16646  132688
$ find include -type f -name \*.h -exec grep "^#define.*0x[0-9]*[A-F][0-9A-
F]*[^0-9a-fA-F]" {} \; | wc
   2424   17768  159828

Close to a draw. For DT headers, however,

$ find include/dt-bindings/ -type f -name \*.h -exec grep 
"^#define.*0x[0-9]*[a-f][0-9a-f]*[^0-9a-fA-F]" {} \; | wc
     51     388    2870
$ find include/dt-bindings/ -type f -name \*.h -exec grep 
"^#define.*0x[0-9]*[A-F][0-9A-F]*[^0-9a-fA-F]" {} \; | wc
      0       0       0

That might not be very significant though.

-- 
Regards,

Laurent Pinchart