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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 2/2] ARM: shmobile: r8a7790: Wait for status on all MSTP clocks
Date: Thu, 31 Oct 2013 12:35:07 +0000	[thread overview]
Message-ID: <1742342.FabnQNQ2BC@avalon> (raw)
In-Reply-To: <1383066834-25956-3-git-send-email-laurent.pinchart+renesas@ideasonboard.com>

Hi Simon,

On Thursday 31 October 2013 14:36:06 Simon Horman wrote:
> On Tue, Oct 29, 2013 at 06:13:54PM +0100, Laurent Pinchart wrote:
> > From: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
> > 
> > When enabling a module clock by clearing its bit in the MSTP control
> > register, the CPG requires waiting for the status register to signal
> > that the clock has started. Failure to do so will result in returning
> > from the clk_enable() call with the clock potientially still disabled,
> > leading to various race conditions and difficult to debug errors.
> > 
> > Enable status wait for all MSTP clocks on the r8a7790.
> 
> Is this patch independent of patch 1 of this series?

Yes it is. The SH_CLK_MSTP32_STS macro is defined in patch 1/2.

> > Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com>
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  arch/arm/mach-shmobile/clock-r8a7790.c | 86 ++++++++++++++++-------------
> >  1 file changed, 47 insertions(+), 39 deletions(-)

-- 
Regards,

Laurent Pinchart


  parent reply	other threads:[~2013-10-31 12:35 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-29 17:13 [PATCH 2/2] ARM: shmobile: r8a7790: Wait for status on all MSTP clocks Laurent Pinchart
2013-10-31  5:36 ` Simon Horman
2013-10-31 12:35 ` Laurent Pinchart [this message]
2013-11-13 15:15 ` Laurent Pinchart
2013-11-14  4:14 ` Simon Horman

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