[PATCH 00/05] serial: sh-sci: Hardware flow control update

[PATCH 00/05] serial: sh-sci: Hardware flow control update

[Magnus Damm]

serial: sh-sci: Hardware flow control update

[PATCH 01/05] serial: sh-sci: Break out default CTS/RTS pin setup
[PATCH 02/05] serial: sh-sci: Fix default RTS handling
[PATCH 03/05] serial: sh-sci: Expose default CTS pin
[PATCH 04/05] serial: sh-sci: Add SCIFA/SCIFB CTS/RTS pin setup
[PATCH 05/05] serial: sh-sci: Expose SCIFA/SCIFB CTS pin

These patches are my first stab at improving CTS/RTS pin handling in
the SCIF driver. The goal for these patches is to improve the default
hardware flow control handling and also add CTS/RTS support for SCIFA/SCIFB.

The SCIF hardware does not provide any interrupt driven delta monitoring
of any modem control signals such as CTS. Instead the different SCIF types
tend to include "automatic" hardware handling of the CTS and RTS signals.

Things like CTS/RTS pin setup, RTS trigger level and FIFO size seem to
vary with each SCIF variant, but the actual harware flow control logic
should be the same if you trust the documentation. The hardware flow control
support can be enabled by setting the SCFCR.MCE bit in the hardware which
will enable the following behavior:

CTS: TX FIFO contents are sent as long as CTS remains asserted.
RTS: RTS is asserted as long as enough space remains in the RX FIFO.

Depending on SCIF variant it may be theoretically possible to enable hardware
handling of only one of the signals in the SCIF device. In other cases the pin
control hardware in the SoC may be used to disable handling of a certain pin.

Most embedded boards using SCIF tend to only hook up RX and TX signals while
some special cases like KZM9G have the SCIFA console port connected with CTS
and RTS signals available as well.

Getting support for CTS/RTS on a particular board involves the following:
- The SCIF variant on the SoC that has CTS/RTS support for the channel.
- The target board must enable all SCIF pins in the pin control hardware.
- The driver instance must be marked as CTS/RTS capable with SCIx_HAVE_RTSCTS.
- User space should signal that it wants to use CTS/RTS via CRTSCTS.
- In case CRTSCTS is not desired then the CTS/RTS pins need to be setup anyway.

At this point UPF_HARD_FLOW is not used by the driver.

Lightly tested with local SCIx_HAVE_RTSCTS enablement on the KZM9G board.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Built on top of renesas-devel-20141217-v3.18

 drivers/tty/serial/sh-sci.c |  147 +++++++++++++++++++++++++++++++++++++------
 include/linux/serial_sci.h  |    4 +
 2 files changed, 132 insertions(+), 19 deletions(-)

[PATCH 01/05] serial: sh-sci: Break out default CTS/RTS pin setup

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Break out CTS/RTS pin setup for the default case. We only
care about those pins in case SCIx_HAVE_RTSCTS is set.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 drivers/tty/serial/sh-sci.c |   45 +++++++++++++++++++++++++++++--------------
 1 file changed, 31 insertions(+), 14 deletions(-)

--- 0001/drivers/tty/serial/sh-sci.c
+++ work/drivers/tty/serial/sh-sci.c	2014-12-16 14:40:31.000000000 +0900
@@ -509,10 +509,29 @@ static void sci_poll_put_char(struct uar
 }
 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
 
-static void sci_init_pins(struct uart_port *port, unsigned int cflag)
+static void sci_init_pins_default(struct uart_port *port, bool hwflow_enabled)
 {
 	struct sci_port *s = to_sci_port(port);
 	struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
+	unsigned short status;
+
+	/* If no SCSPTR register exists then skip. Same if hardware flow
+	 * control has been enabled, in such case SCFCR.MCE will be set
+	 * and the SCSPTR configuration is assumed to be overridden.
+	 */
+	if (!reg->size || hwflow_enabled)
+		return;
+
+	status = serial_port_in(port, SCSPTR);
+	status &= ~SCSPTR_CTSIO;
+	status |= SCSPTR_RTSIO;
+	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
+}
+
+static void sci_init_pins(struct uart_port *port, unsigned int cflag)
+{
+	struct sci_port *s = to_sci_port(port);
+	bool hwflow_enabled = cflag & CRTSCTS;
 
 	/*
 	 * Use port-specific handler if provided.
@@ -522,22 +541,20 @@ static void sci_init_pins(struct uart_po
 		return;
 	}
 
-	/*
-	 * For the generic path SCSPTR is necessary. Bail out if that's
-	 * unavailable, too.
+	/* SCIF hardware with RTS/CTS support needs special setup below.
+	 *
+	 * Please note that if RTS/CTS is available for the hardware
+	 * platform depends on the particular SCIF channel on a certain
+	 * SoC, and how this channel has been hooked up on the actual board.
+	 *
+	 * If the RTS/CTS signals will be used or not depends on what user
+	 * space requests. In case RTS/CTS is available but not requested
+	 * by user space we still need to configure the pins somehow.
 	 */
-	if (!reg->size)
+	if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS))
 		return;
 
-	if ((s->cfg->capabilities & SCIx_HAVE_RTSCTS) &&
-	    ((!(cflag & CRTSCTS)))) {
-		unsigned short status;
-
-		status = serial_port_in(port, SCSPTR);
-		status &= ~SCSPTR_CTSIO;
-		status |= SCSPTR_RTSIO;
-		serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
-	}
+	sci_init_pins_default(port, hwflow_enabled);
 }
 
 static int sci_txfill(struct uart_port *port)

Re: [PATCH 01/05] serial: sh-sci: Break out default CTS/RTS pin setup

[Laurent Pinchart]

Hi Magnus,

Thank you for the patch.

On Wednesday 17 December 2014 21:52:46 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
> 
> Break out CTS/RTS pin setup for the default case. We only
> care about those pins in case SCIx_HAVE_RTSCTS is set.
> 
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
> 
>  drivers/tty/serial/sh-sci.c |   45 +++++++++++++++++++++++++++-------------
>  1 file changed, 31 insertions(+), 14 deletions(-)
> 
> --- 0001/drivers/tty/serial/sh-sci.c
> +++ work/drivers/tty/serial/sh-sci.c	2014-12-16 14:40:31.000000000 +0900
> @@ -509,10 +509,29 @@ static void sci_poll_put_char(struct uar
>  }
>  #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
> 
> -static void sci_init_pins(struct uart_port *port, unsigned int cflag)
> +static void sci_init_pins_default(struct uart_port *port, bool
> hwflow_enabled) {

What would you think about renaming the function to sci_init_ctsrts_default ? 
I find having both sci_init_pins and sci_init_pins_default a bit confusing.

>  	struct sci_port *s = to_sci_port(port);
>  	struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
> +	unsigned short status;
> +
> +	/* If no SCSPTR register exists then skip. Same if hardware flow
> +	 * control has been enabled, in such case SCFCR.MCE will be set
> +	 * and the SCSPTR configuration is assumed to be overridden.
> +	 */
> +	if (!reg->size || hwflow_enabled)
> +		return;
> +
> +	status = serial_port_in(port, SCSPTR);
> +	status &= ~SCSPTR_CTSIO;
> +	status |= SCSPTR_RTSIO;
> +	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
> +}
> +
> +static void sci_init_pins(struct uart_port *port, unsigned int cflag)
> +{
> +	struct sci_port *s = to_sci_port(port);
> +	bool hwflow_enabled = cflag & CRTSCTS;
> 
>  	/*
>  	 * Use port-specific handler if provided.
> @@ -522,22 +541,20 @@ static void sci_init_pins(struct uart_po
>  		return;
>  	}
> 
> -	/*
> -	 * For the generic path SCSPTR is necessary. Bail out if that's
> -	 * unavailable, too.
> +	/* SCIF hardware with RTS/CTS support needs special setup below.
> +	 *
> +	 * Please note that if RTS/CTS is available for the hardware
> +	 * platform depends on the particular SCIF channel on a certain
> +	 * SoC, and how this channel has been hooked up on the actual board.

How do you plan to convey that information to the driver in the DT case ? If 
I'm not mistaken the SCIx_HAVE_RTSCTS flag is only set through platform data 
at the moment. Do you have a list of which SCIF channels support RTS/CTS on 
which SoC ?

> +	 *
> +	 * If the RTS/CTS signals will be used or not depends on what user
> +	 * space requests. In case RTS/CTS is available but not requested
> +	 * by user space we still need to configure the pins somehow.
>  	 */
> -	if (!reg->size)
> +	if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS))
>  		return;
> 
> -	if ((s->cfg->capabilities & SCIx_HAVE_RTSCTS) &&
> -	    ((!(cflag & CRTSCTS)))) {
> -		unsigned short status;
> -
> -		status = serial_port_in(port, SCSPTR);
> -		status &= ~SCSPTR_CTSIO;
> -		status |= SCSPTR_RTSIO;
> -		serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
> -	}
> +	sci_init_pins_default(port, hwflow_enabled);
>  }
> 
>  static int sci_txfill(struct uart_port *port)

-- 
Regards,

Laurent Pinchart

Re: [PATCH 01/05] serial: sh-sci: Break out default CTS/RTS pin setup

[Magnus Damm]

Hi Laurent,

On Mon, Jan 5, 2015 at 12:25 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> Hi Magnus,
>
> Thank you for the patch.
>
> On Wednesday 17 December 2014 21:52:46 Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Break out CTS/RTS pin setup for the default case. We only
>> care about those pins in case SCIx_HAVE_RTSCTS is set.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>>  drivers/tty/serial/sh-sci.c |   45 +++++++++++++++++++++++++++-------------
>>  1 file changed, 31 insertions(+), 14 deletions(-)
>>
>> --- 0001/drivers/tty/serial/sh-sci.c
>> +++ work/drivers/tty/serial/sh-sci.c  2014-12-16 14:40:31.000000000 +0900
>> @@ -509,10 +509,29 @@ static void sci_poll_put_char(struct uar
>>  }
>>  #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
>>
>> -static void sci_init_pins(struct uart_port *port, unsigned int cflag)
>> +static void sci_init_pins_default(struct uart_port *port, bool
>> hwflow_enabled) {
>
> What would you think about renaming the function to sci_init_ctsrts_default ?
> I find having both sci_init_pins and sci_init_pins_default a bit confusing.

Thanks for your comments. I agree with you and I've changed the name
in V2 that I just posted.

>>       struct sci_port *s = to_sci_port(port);
>>       struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
>> +     unsigned short status;
>> +
>> +     /* If no SCSPTR register exists then skip. Same if hardware flow
>> +      * control has been enabled, in such case SCFCR.MCE will be set
>> +      * and the SCSPTR configuration is assumed to be overridden.
>> +      */
>> +     if (!reg->size || hwflow_enabled)
>> +             return;
>> +
>> +     status = serial_port_in(port, SCSPTR);
>> +     status &= ~SCSPTR_CTSIO;
>> +     status |= SCSPTR_RTSIO;
>> +     serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
>> +}
>> +
>> +static void sci_init_pins(struct uart_port *port, unsigned int cflag)
>> +{
>> +     struct sci_port *s = to_sci_port(port);
>> +     bool hwflow_enabled = cflag & CRTSCTS;
>>
>>       /*
>>        * Use port-specific handler if provided.
>> @@ -522,22 +541,20 @@ static void sci_init_pins(struct uart_po
>>               return;
>>       }
>>
>> -     /*
>> -      * For the generic path SCSPTR is necessary. Bail out if that's
>> -      * unavailable, too.
>> +     /* SCIF hardware with RTS/CTS support needs special setup below.
>> +      *
>> +      * Please note that if RTS/CTS is available for the hardware
>> +      * platform depends on the particular SCIF channel on a certain
>> +      * SoC, and how this channel has been hooked up on the actual board.
>
> How do you plan to convey that information to the driver in the DT case ? If
> I'm not mistaken the SCIx_HAVE_RTSCTS flag is only set through platform data
> at the moment. Do you have a list of which SCIF channels support RTS/CTS on
> which SoC ?

Good question. It seems that other drivers use the DT "ctsrts"
property to flag just this, and maybe it makes sense to simply use
such a property in the board DTS file to opt-in on modem control on a
board-basis.

Something similar is included in my prototype hack that I just posted:
[PATCH] sh73a0 KZM9G CTS/RTS prototype

Thanks for your help!

Cheers,

/ magnus

[PATCH 02/05] serial: sh-sci: Fix default RTS handling

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Fix the default SCIF handling in case CTS/RTS is available
on the target board but disabled by user space. Without
this patch the RTS output value is not set.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 drivers/tty/serial/sh-sci.c |    5 ++++-
 include/linux/serial_sci.h  |    1 +
 2 files changed, 5 insertions(+), 1 deletion(-)

--- 0004/drivers/tty/serial/sh-sci.c
+++ work/drivers/tty/serial/sh-sci.c	2014-12-16 14:31:53.000000000 +0900
@@ -522,9 +522,12 @@ static void sci_init_pins_default(struct
 	if (!reg->size || hwflow_enabled)
 		return;
 
+	/* Setup CTS/RTS in the case hardware flow is disabled by user space.
+	 * The CTS signal is setup as input and RTS as output with value 1.
+	 */
 	status = serial_port_in(port, SCSPTR);
 	status &= ~SCSPTR_CTSIO;
-	status |= SCSPTR_RTSIO;
+	status |= SCSPTR_RTSIO | SCSPTR_RTSDT;
 	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
 }
 
--- 0001/include/linux/serial_sci.h
+++ work/include/linux/serial_sci.h	2014-12-16 14:25:40.000000000 +0900
@@ -57,6 +57,7 @@
 
 /* SCSPTR (Serial Port Register), optional */
 #define SCSPTR_RTSIO	(1 << 7)	/* Serial Port RTS Pin Input/Output */
+#define SCSPTR_RTSDT	(1 << 6)	/* Serial Port RTS Pin Data */
 #define SCSPTR_CTSIO	(1 << 5)	/* Serial Port CTS Pin Input/Output */
 #define SCSPTR_SPB2IO	(1 << 1)	/* Serial Port Break Input/Output */
 #define SCSPTR_SPB2DT	(1 << 0)	/* Serial Port Break Data */

[PATCH 03/05] serial: sh-sci: Expose default CTS pin

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Expose the CTS pin to the ->get_mctrl() callback for the
default case. Without this patch the serial core can not
retrieve the CTS pin state from the SCIF driver.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 drivers/tty/serial/sh-sci.c |   20 +++++++++++++++++++-
 include/linux/serial_sci.h  |    1 +
 2 files changed, 20 insertions(+), 1 deletion(-)

--- 0021/drivers/tty/serial/sh-sci.c
+++ work/drivers/tty/serial/sh-sci.c	2014-12-17 18:44:31.000000000 +0900
@@ -509,6 +509,17 @@ static void sci_poll_put_char(struct uar
 }
 #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_SH_SCI_CONSOLE */
 
+static bool sci_cts_asserted_default(struct uart_port *port)
+{
+	struct sci_port *s = to_sci_port(port);
+	struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
+
+	if (reg->size)
+		return !(serial_port_in(port, SCSPTR) & SCSPTR_CTSDT);
+
+	return false;
+}
+
 static void sci_init_pins_default(struct uart_port *port, bool hwflow_enabled)
 {
 	struct sci_port *s = to_sci_port(port);
@@ -1227,11 +1238,18 @@ static void sci_set_mctrl(struct uart_po
 
 static unsigned int sci_get_mctrl(struct uart_port *port)
 {
+	struct sci_port *s = to_sci_port(port);
+	bool cts_asserted = false;
+
 	/*
 	 * CTS/RTS is handled in hardware when supported, while nothing
 	 * else is wired up. Keep it simple and simply assert DSR/CAR.
 	 */
-	return TIOCM_DSR | TIOCM_CAR;
+
+	if (s->cfg->capabilities & SCIx_HAVE_RTSCTS)
+		cts_asserted = sci_cts_asserted_default(port);
+
+	return TIOCM_DSR | TIOCM_CAR | (cts_asserted ? TIOCM_CTS : 0);
 }
 
 #ifdef CONFIG_SERIAL_SH_SCI_DMA
--- 0021/include/linux/serial_sci.h
+++ work/include/linux/serial_sci.h	2014-12-17 17:52:55.000000000 +0900
@@ -59,6 +59,7 @@
 #define SCSPTR_RTSIO	(1 << 7)	/* Serial Port RTS Pin Input/Output */
 #define SCSPTR_RTSDT	(1 << 6)	/* Serial Port RTS Pin Data */
 #define SCSPTR_CTSIO	(1 << 5)	/* Serial Port CTS Pin Input/Output */
+#define SCSPTR_CTSDT	(1 << 4)	/* Serial Port CTS Pin Data */
 #define SCSPTR_SPB2IO	(1 << 1)	/* Serial Port Break Input/Output */
 #define SCSPTR_SPB2DT	(1 << 0)	/* Serial Port Break Data */
 

[PATCH 04/05] serial: sh-sci: Add SCIFA/SCIFB CTS/RTS pin setup

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Add SCIFA/SCIFB pin setup code for CTS/RTS pins to handle
both cases of hardware flow control enabled or disabled.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 drivers/tty/serial/sh-sci.c |   60 ++++++++++++++++++++++++++++++++++++++++++-
 include/linux/serial_sci.h  |    2 +
 2 files changed, 61 insertions(+), 1 deletion(-)

--- 0006/drivers/tty/serial/sh-sci.c
+++ work/drivers/tty/serial/sh-sci.c	2014-12-16 16:10:18.000000000 +0900
@@ -168,6 +168,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= sci_reg_invalid,
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -188,6 +190,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= sci_reg_invalid,
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -207,6 +211,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= sci_reg_invalid,
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= { 0x30, 16 },
+		[SCPDR]		= { 0x34, 16 },
 	},
 
 	/*
@@ -226,6 +232,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= sci_reg_invalid,
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= { 0x30, 16 },
+		[SCPDR]		= { 0x34, 16 },
 	},
 
 	/*
@@ -246,6 +254,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= { 0x20, 16 },
 		[SCLSR]		= { 0x24, 16 },
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -265,6 +275,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= sci_reg_invalid,
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -284,6 +296,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= { 0x20, 16 },
 		[SCLSR]		= { 0x24, 16 },
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -303,6 +317,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= { 0x20, 16 },
 		[SCLSR]		= { 0x24, 16 },
 		[HSSRR]		= { 0x40, 16 },
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -323,6 +339,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= { 0x24, 16 },
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -343,6 +361,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= { 0x24, 16 },
 		[SCLSR]		= { 0x28, 16 },
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 
 	/*
@@ -363,6 +383,8 @@ static struct plat_sci_reg sci_regmap[SC
 		[SCSPTR]	= sci_reg_invalid,
 		[SCLSR]		= sci_reg_invalid,
 		[HSSRR]		= sci_reg_invalid,
+		[SCPCR]		= sci_reg_invalid,
+		[SCPDR]		= sci_reg_invalid,
 	},
 };
 
@@ -542,6 +564,34 @@ static void sci_init_pins_default(struct
 	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
 }
 
+static void sci_init_pins_scifab(struct uart_port *port, bool hwflow_enabled)
+{
+	unsigned short control, data;
+
+	/* SCIFA/SCIFB CTS/RTS pin configuration depends on user space.
+	 *
+	 * In case of CTS - (SCPDR.CTSD is always accessible):
+	 * - Hardware flow control enabled: "CTS pin function"
+	 * - Hardware flow control disabled: "Input port"
+	 *
+	 * In case of RTS:
+	 * - Hardware flow control enabled: "RTS pin function"
+	 * - Hardware flow control disabled: "Output port" with value 1
+	 */
+	control = serial_port_in(port, SCPCR);
+	data = serial_port_in(port, SCPDR);
+
+	if (hwflow_enabled) {
+		control &= ~(BIT(4) | BIT(3));
+	} else {
+		control |= BIT(4) | BIT(3);
+		data |= BIT(4);
+	}
+
+	serial_port_out(port, SCPDR, data);
+	serial_port_out(port, SCPCR, control);
+}
+
 static void sci_init_pins(struct uart_port *port, unsigned int cflag)
 {
 	struct sci_port *s = to_sci_port(port);
@@ -568,7 +618,15 @@ static void sci_init_pins(struct uart_po
 	if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS))
 		return;
 
-	sci_init_pins_default(port, hwflow_enabled);
+	switch (s->cfg->type) {
+	case PORT_SCIFA:
+	case PORT_SCIFB:
+		sci_init_pins_scifab(port, hwflow_enabled);
+		break;
+	default:
+		sci_init_pins_default(port, hwflow_enabled);
+	}
+
 }
 
 static int sci_txfill(struct uart_port *port)
--- 0006/include/linux/serial_sci.h
+++ work/include/linux/serial_sci.h	2014-12-16 16:10:18.000000000 +0900
@@ -102,6 +102,8 @@ enum {
 	SCRFDR,				/* Receive FIFO Data Count Register */
 	SCSPTR,				/* Serial Port Register */
 	HSSRR,				/* Sampling Rate Register */
+	SCPCR,				/* Serial Port Control Register */
+	SCPDR,				/* Serial Port Data Register */
 
 	SCIx_NR_REGS,
 };

Re: [PATCH 04/05] serial: sh-sci: Add SCIFA/SCIFB CTS/RTS pin setup

[Laurent Pinchart]

Hi Magnus,

Thank you for the patch.

On Wednesday 17 December 2014 21:53:15 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
> 
> Add SCIFA/SCIFB pin setup code for CTS/RTS pins to handle
> both cases of hardware flow control enabled or disabled.
> 
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
> 
>  drivers/tty/serial/sh-sci.c |   60 +++++++++++++++++++++++++++++++++++++++-
>  include/linux/serial_sci.h  |    2 +
>  2 files changed, 61 insertions(+), 1 deletion(-)
> 
> --- 0006/drivers/tty/serial/sh-sci.c
> +++ work/drivers/tty/serial/sh-sci.c	2014-12-16 16:10:18.000000000 +0900
> @@ -168,6 +168,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= sci_reg_invalid,
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -188,6 +190,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= sci_reg_invalid,
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -207,6 +211,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= sci_reg_invalid,
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= { 0x30, 16 },
> +		[SCPDR]		= { 0x34, 16 },
>  	},
> 
>  	/*
> @@ -226,6 +232,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= sci_reg_invalid,
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= { 0x30, 16 },
> +		[SCPDR]		= { 0x34, 16 },
>  	},
> 
>  	/*
> @@ -246,6 +254,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= { 0x20, 16 },
>  		[SCLSR]		= { 0x24, 16 },
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -265,6 +275,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= sci_reg_invalid,
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -284,6 +296,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= { 0x20, 16 },
>  		[SCLSR]		= { 0x24, 16 },
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -303,6 +317,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= { 0x20, 16 },
>  		[SCLSR]		= { 0x24, 16 },
>  		[HSSRR]		= { 0x40, 16 },
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -323,6 +339,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= { 0x24, 16 },
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -343,6 +361,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= { 0x24, 16 },
>  		[SCLSR]		= { 0x28, 16 },
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
> 
>  	/*
> @@ -363,6 +383,8 @@ static struct plat_sci_reg sci_regmap[SC
>  		[SCSPTR]	= sci_reg_invalid,
>  		[SCLSR]		= sci_reg_invalid,
>  		[HSSRR]		= sci_reg_invalid,
> +		[SCPCR]		= sci_reg_invalid,
> +		[SCPDR]		= sci_reg_invalid,
>  	},
>  };
> 
> @@ -542,6 +564,34 @@ static void sci_init_pins_default(struct
>  	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
>  }
> 
> +static void sci_init_pins_scifab(struct uart_port *port, bool
> hwflow_enabled)
> +{
> +	unsigned short control, data;
> +
> +	/* SCIFA/SCIFB CTS/RTS pin configuration depends on user space.
> +	 *
> +	 * In case of CTS - (SCPDR.CTSD is always accessible):
> +	 * - Hardware flow control enabled: "CTS pin function"
> +	 * - Hardware flow control disabled: "Input port"
> +	 *
> +	 * In case of RTS:
> +	 * - Hardware flow control enabled: "RTS pin function"
> +	 * - Hardware flow control disabled: "Output port" with value 1
> +	 */
> +	control = serial_port_in(port, SCPCR);
> +	data = serial_port_in(port, SCPDR);
> +
> +	if (hwflow_enabled) {
> +		control &= ~(BIT(4) | BIT(3));
> +	} else {
> +		control |= BIT(4) | BIT(3);

Could you please define SCPCR_RTSC and SCPCR_CTSC macros to replace BIT(3) and 
BIT(4) ?

> +		data |= BIT(4);

And SCPDR_RTSD here ?

> +	}
> +
> +	serial_port_out(port, SCPDR, data);
> +	serial_port_out(port, SCPCR, control);
> +}
> +
>  static void sci_init_pins(struct uart_port *port, unsigned int cflag)
>  {
>  	struct sci_port *s = to_sci_port(port);
> @@ -568,7 +618,15 @@ static void sci_init_pins(struct uart_po
>  	if (!(s->cfg->capabilities & SCIx_HAVE_RTSCTS))
>  		return;
> 
> -	sci_init_pins_default(port, hwflow_enabled);
> +	switch (s->cfg->type) {
> +	case PORT_SCIFA:
> +	case PORT_SCIFB:
> +		sci_init_pins_scifab(port, hwflow_enabled);
> +		break;
> +	default:
> +		sci_init_pins_default(port, hwflow_enabled);
> +	}
> +
>  }
> 
>  static int sci_txfill(struct uart_port *port)
> --- 0006/include/linux/serial_sci.h
> +++ work/include/linux/serial_sci.h	2014-12-16 16:10:18.000000000 +0900
> @@ -102,6 +102,8 @@ enum {
>  	SCRFDR,				/* Receive FIFO Data Count Register */
>  	SCSPTR,				/* Serial Port Register */
>  	HSSRR,				/* Sampling Rate Register */
> +	SCPCR,				/* Serial Port Control Register */
> +	SCPDR,				/* Serial Port Data Register */
> 
>  	SCIx_NR_REGS,
>  };

-- 
Regards,

Laurent Pinchart

Re: [PATCH 04/05] serial: sh-sci: Add SCIFA/SCIFB CTS/RTS pin setup

[Magnus Damm]

Hi Laurent,

On Sun, Jan 4, 2015 at 11:46 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> Hi Magnus,
>
> Thank you for the patch.
>
> On Wednesday 17 December 2014 21:53:15 Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Add SCIFA/SCIFB pin setup code for CTS/RTS pins to handle
>> both cases of hardware flow control enabled or disabled.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>>  drivers/tty/serial/sh-sci.c |   60 +++++++++++++++++++++++++++++++++++++++-
>>  include/linux/serial_sci.h  |    2 +
>>  2 files changed, 61 insertions(+), 1 deletion(-)
>>
>> --- 0006/drivers/tty/serial/sh-sci.c
>> +++ work/drivers/tty/serial/sh-sci.c  2014-12-16 16:10:18.000000000 +0900

>> +     control = serial_port_in(port, SCPCR);
>> +     data = serial_port_in(port, SCPDR);
>> +
>> +     if (hwflow_enabled) {
>> +             control &= ~(BIT(4) | BIT(3));
>> +     } else {
>> +             control |= BIT(4) | BIT(3);
>
> Could you please define SCPCR_RTSC and SCPCR_CTSC macros to replace BIT(3) and
> BIT(4) ?
>
>> +             data |= BIT(4);
>
> And SCPDR_RTSD here ?

Sure, that makes sense. I've included this update in V2. Sorry for
being a bit lazy in V1. =)

/ magnus

[PATCH 05/05] serial: sh-sci: Expose SCIFA/SCIFB CTS pin

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Expose CTS pin to serial core for the SCIFA/SCIFB case.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 drivers/tty/serial/sh-sci.c |   17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

--- 0023/drivers/tty/serial/sh-sci.c
+++ work/drivers/tty/serial/sh-sci.c	2014-12-17 18:46:44.000000000 +0900
@@ -564,6 +564,11 @@ static void sci_init_pins_default(struct
 	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
 }
 
+static bool sci_cts_asserted_scifab(struct uart_port *port)
+{
+	return !(serial_port_in(port, SCPDR) & BIT(3));
+}
+
 static void sci_init_pins_scifab(struct uart_port *port, bool hwflow_enabled)
 {
 	unsigned short control, data;
@@ -1304,8 +1309,16 @@ static unsigned int sci_get_mctrl(struct
 	 * else is wired up. Keep it simple and simply assert DSR/CAR.
 	 */
 
-	if (s->cfg->capabilities & SCIx_HAVE_RTSCTS)
-		cts_asserted = sci_cts_asserted_default(port);
+ 	if (s->cfg->capabilities & SCIx_HAVE_RTSCTS) {
+		switch (s->cfg->type) {
+		case PORT_SCIFA:
+		case PORT_SCIFB:
+			cts_asserted = sci_cts_asserted_scifab(port);
+			break;
+		default:
+			cts_asserted = sci_cts_asserted_default(port);
+		}
+ 	}
 
 	return TIOCM_DSR | TIOCM_CAR | (cts_asserted ? TIOCM_CTS : 0);
 }

Re: [PATCH 05/05] serial: sh-sci: Expose SCIFA/SCIFB CTS pin

[Laurent Pinchart]

Hi Magnus,

Thank you for the patch.

On Wednesday 17 December 2014 21:53:25 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
> 
> Expose CTS pin to serial core for the SCIFA/SCIFB case.
> 
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
> 
>  drivers/tty/serial/sh-sci.c |   17 +++++++++++++++--
>  1 file changed, 15 insertions(+), 2 deletions(-)
> 
> --- 0023/drivers/tty/serial/sh-sci.c
> +++ work/drivers/tty/serial/sh-sci.c	2014-12-17 18:46:44.000000000 +0900
> @@ -564,6 +564,11 @@ static void sci_init_pins_default(struct
>  	serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
>  }
> 
> +static bool sci_cts_asserted_scifab(struct uart_port *port)
> +{
> +	return !(serial_port_in(port, SCPDR) & BIT(3));

Could you please define SCPDR_CTSD to replace BIT(3) ?

> +}
> +
>  static void sci_init_pins_scifab(struct uart_port *port, bool
> hwflow_enabled) {
>  	unsigned short control, data;
> @@ -1304,8 +1309,16 @@ static unsigned int sci_get_mctrl(struct
>  	 * else is wired up. Keep it simple and simply assert DSR/CAR.
>  	 */
> 
> -	if (s->cfg->capabilities & SCIx_HAVE_RTSCTS)
> -		cts_asserted = sci_cts_asserted_default(port);
> + 	if (s->cfg->capabilities & SCIx_HAVE_RTSCTS) {
> +		switch (s->cfg->type) {
> +		case PORT_SCIFA:
> +		case PORT_SCIFB:
> +			cts_asserted = sci_cts_asserted_scifab(port);
> +			break;
> +		default:
> +			cts_asserted = sci_cts_asserted_default(port);
> +		}
> + 	}
> 
>  	return TIOCM_DSR | TIOCM_CAR | (cts_asserted ? TIOCM_CTS : 0);
>  }

-- 
Regards,

Laurent Pinchart

Re: [PATCH 05/05] serial: sh-sci: Expose SCIFA/SCIFB CTS pin

[Magnus Damm]

Hi Laurent,

On Sun, Jan 4, 2015 at 11:53 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> Hi Magnus,
>
> Thank you for the patch.
>
> On Wednesday 17 December 2014 21:53:25 Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Expose CTS pin to serial core for the SCIFA/SCIFB case.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> ---
>>
>>  drivers/tty/serial/sh-sci.c |   17 +++++++++++++++--
>>  1 file changed, 15 insertions(+), 2 deletions(-)
>>
>> --- 0023/drivers/tty/serial/sh-sci.c
>> +++ work/drivers/tty/serial/sh-sci.c  2014-12-17 18:46:44.000000000 +0900
>> @@ -564,6 +564,11 @@ static void sci_init_pins_default(struct
>>       serial_port_out(port, SCSPTR, status); /* Set RTS = 1 */
>>  }
>>
>> +static bool sci_cts_asserted_scifab(struct uart_port *port)
>> +{
>> +     return !(serial_port_in(port, SCPDR) & BIT(3));
>
> Could you please define SCPDR_CTSD to replace BIT(3) ?

Done in V2!

Thanks,

/ magnus