[PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Kuninori Morimoto]

o modify memory size
o change cache configuration to boot

Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
---
I change cache configuration 
because currect kernel can not use CONFIG_CACHE_WRITEBACK

 arch/sh/configs/ecovec24-romimage_defconfig |    6 +++---
 arch/sh/configs/ecovec24_defconfig          |    6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/sh/configs/ecovec24-romimage_defconfig b/arch/sh/configs/ecovec24-romimage_defconfig
index 0774924..9145fa3 100644
--- a/arch/sh/configs/ecovec24-romimage_defconfig
+++ b/arch/sh/configs/ecovec24-romimage_defconfig
@@ -203,7 +203,7 @@ CONFIG_MMU=y
 CONFIG_PAGE_OFFSET=0x80000000
 CONFIG_FORCE_MAX_ZONEORDER\x11
 CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_MEMORY_SIZE=0x10000000
 CONFIG_29BIT=y
 # CONFIG_X2TLB is not set
 CONFIG_VSYSCALL=y
@@ -237,8 +237,8 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR@96
 #
 # Cache configuration
 #
-CONFIG_CACHE_WRITEBACK=y
-# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_WRITEBACK is not set
+CONFIG_CACHE_WRITETHROUGH=y
 # CONFIG_CACHE_OFF is not set
 
 #
diff --git a/arch/sh/configs/ecovec24_defconfig b/arch/sh/configs/ecovec24_defconfig
index ac64697..6a20b87 100644
--- a/arch/sh/configs/ecovec24_defconfig
+++ b/arch/sh/configs/ecovec24_defconfig
@@ -204,7 +204,7 @@ CONFIG_MMU=y
 CONFIG_PAGE_OFFSET=0x80000000
 CONFIG_FORCE_MAX_ZONEORDER\x11
 CONFIG_MEMORY_START=0x08000000
-CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_MEMORY_SIZE=0x10000000
 CONFIG_29BIT=y
 # CONFIG_X2TLB is not set
 CONFIG_VSYSCALL=y
@@ -238,8 +238,8 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR@96
 #
 # Cache configuration
 #
-CONFIG_CACHE_WRITEBACK=y
-# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_WRITEBACK is not set
+CONFIG_CACHE_WRITETHROUGH=y
 # CONFIG_CACHE_OFF is not set
 
 #
-- 
1.6.3.3

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Paul Mundt]

On Fri, Nov 27, 2009 at 06:01:55PM +0900, Kuninori Morimoto wrote:
> o modify memory size
> o change cache configuration to boot
> 
> Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
> ---
> I change cache configuration 
> because currect kernel can not use CONFIG_CACHE_WRITEBACK
> 
Uhm, why not? Where is the bug report on this?

The memory change is fine, but if you've discovered a regression then
report it, rather than just turning off options until it goes away.

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Kuninori Morimoto]

Dear Paul

> > I change cache configuration 
> > because currect kernel can not use CONFIG_CACHE_WRITEBACK
> > 
> Uhm, why not? Where is the bug report on this?

Oops sorry.
I reported it but private mail...
2009/10/15 "Question about boot on EcoVec"

> what is wrong with "write back" / "copy back"?

If I use CONFIG_CACHE_WRITEBACK, it will hung up
when user-side "init" start

Best regards
--
Kuninori Morimoto
 

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Kuninori Morimoto]

Dear Paul

> > because currect kernel can not use CONFIG_CACHE_WRITEBACK
> >
> Uhm, why not? Where is the bug report on this?

Now I searched by git bisect
I tested on ms7724se / ecovec24

-------------------------
eb3118f652ea7751ecf6a7e467bb637895e3be3b is first bad commit
commit eb3118f652ea7751ecf6a7e467bb637895e3be3b
Author: Matt Fleming <matt@console-pimps.org>
Date:   Thu Oct 29 21:53:30 2009 +0000

sh: Do not apply virt_to_phys() to a physical address

The variable 'phys' already contains the physical address to flush. It
is not a virtual address and should not be passed to virt_to_phys().

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-------------------------

When I use this commit,
user-side init doesn't work on ms7724se.
 -> kernel side seems working, after that it say
------------
...
Looking up port of RPC 100003/2 on 192.168.10.77
Looking up port of RPC 100005/1 on 192.168.10.77
VFS: Mounted root (nfs filesystem) on device 0:12.
Freeing unused kernel memory: 104k freed
Kernel panic - not syncing: Attempted to kill init!
------------

And ecovec24 quite doesn't work.
 -> kernel size eigher.

Best regards
--
Kuninori Morimoto

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Matt Fleming]

On Mon, Nov 30, 2009 at 07:11:29PM +0900, Kuninori Morimoto wrote:
> 
> Dear Paul
> 
> > > because currect kernel can not use CONFIG_CACHE_WRITEBACK
> > >
> > Uhm, why not? Where is the bug report on this?
> 
> Now I searched by git bisect
> I tested on ms7724se / ecovec24
> 
> -------------------------
> eb3118f652ea7751ecf6a7e467bb637895e3be3b is first bad commit
> commit eb3118f652ea7751ecf6a7e467bb637895e3be3b
> Author: Matt Fleming <matt@console-pimps.org>
> Date:   Thu Oct 29 21:53:30 2009 +0000
> 
> sh: Do not apply virt_to_phys() to a physical address
> 

Could you apply this patch and post the backtrace?

diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 6bfd08d..8440b12 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -89,6 +89,8 @@ static inline void flush_cache_one(unsigned long start, unsigned long phys)
 {
 	unsigned long flags, exec_offset = 0;
 
+	WARN_ON(!(phys >= __MEMORY_START && phys < __MEMORY_START + __MEMORY_SIZE));
+
 	/*
 	 * All types of SH-4 require PC to be uncached to operate on the I-cache.
 	 * Some types of SH-4 require PC to be uncached to operate on the D-cache.

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Kuninori Morimoto]

Dear Matt

Thank you for your patch !

> Could you apply this patch and post the backtrace?

Hmm..
I applied your patch, but there are no WARN_ON output...
It still doesn't work.
I tested it on ms7724se / ecovec24
My current git commit is fd2cb0ce74e07babaf8c7bf96ef03c25d194e463
My .config have CONFIG_CACHE_WRITEBACK=y

Best regards
--
Kuninori Morimoto
 

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Matt Fleming]

On Tue, Dec 01, 2009 at 09:18:55AM +0900, Kuninori Morimoto wrote:
> 
> Dear Matt
> 
> Thank you for your patch !
> 
> > Could you apply this patch and post the backtrace?
> 
> Hmm..
> I applied your patch, but there are no WARN_ON output...
> It still doesn't work.
> I tested it on ms7724se / ecovec24
> My current git commit is fd2cb0ce74e07babaf8c7bf96ef03c25d194e463
> My .config have CONFIG_CACHE_WRITEBACK=y
> 

What size caches do the ms7724se and ecovec24 have?

Here's another patch. Currently, we always do associative writes to the
memory-mapped IC/OC arrays when flushing the cache. Associative writes
require us to use a virtual address (not a physical address) in the
"Tag" section of the data field (8.6.3 OC Address Array in the SH4-A
manual).

The problem with associate writes, however, is that when the translation
is performed on the value of the "Tag" field, if a TLB miss occurs we
don't get an exception. Nothing happens. It's possible to be in a
situation where userland data is in the cache, but because we're using
associative writes and if there's no TLB entry for the userland mapping,
we can't flush the data out of the cache.

Would you mind giving this patch a whirl? I don't really expect your
problems to go away, but it's worth trying. Also, be aware that commit
39ac11c1607f1d566e7cf885acd403fa4f07f8a2 is causing me some issues so
you might want to revert that while testing this patch.


diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 6bfd08d..0811358 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -117,14 +117,14 @@ static void sh4_flush_dcache_page(void *arg)
 	else
 #endif
 	{
-		unsigned long phys = page_to_phys(page);
+		unsigned long virt = (unsigned long)page_address(page);
 		unsigned long addr = CACHE_OC_ADDRESS_ARRAY;
 		int i, n;
 
 		/* Loop all the D-cache */
 		n = boot_cpu_data.dcache.n_aliases;
 		for (i = 0; i <= n; i++, addr += PAGE_SIZE)
-			flush_cache_one(addr, phys);
+			flush_cache_one(addr, virt);
 	}
 
 	wmb();
@@ -258,7 +258,7 @@ static void sh4_flush_cache_page(void *args)
 
 	if (pages_do_alias(address, phys))
 		flush_cache_one(CACHE_OC_ADDRESS_ARRAY |
-			(address & shm_align_mask), phys);
+			(address & shm_align_mask), address);
 
 	if (vma->vm_flags & VM_EXEC)
 		flush_icache_all();

Re: [PATCH] sh: mach-ecovec24: update ecovec24 defconfig

[Kuninori Morimoto]

Dear Matt

Thank you for your hard work !

> What size caches do the ms7724se and ecovec24 have?

ms7724se / ecovec24 are SH7724

------------------------
Table 8.1 Cache Features
------------------------

Item         Instruction Cache            Operand Cache
----------------------------------------------------------------
Capacity       32-Kbyte cache               32-Kbyte cache
Type           4-way set-associative,       4-way set-associative,
               virtual address              virtual address
               index/physical address tag   index/physical address tag
Line size      32 bytes                     32 bytes
Entries        256 entries/way              256 entries/way
Write method        -                       Copy-back/write-through selectable
Replacement    LRU (least-recently-used)    LRU (least-recently-used)

---------------------------
Table 8.2 Store Queue Features
---------------------------

Item            Store Queues
---------------------------
Capacity        32 bytes ^[$B!_^[(B 2
Addresses       H'E000 0000 to H'E3FF FFFF
Write           Store instruction (1-cycle write)
Write-back      Prefetch instruction (PREF instruction)
Access right    When MMU is disabled: Determined by SQMD bit in MMUCR
                When MMU is enabled: Determined by PR for each page



---------------------------
Table 9.1 Secondary Cache Features
---------------------------

Features            Secondary Cache
---------------------------------------
Capacity            256 Kbytes
Structure           4-way set associative, physical address index/physical address tag
Line size           32 bytes
Number of entries   2048 entries/way
Write system        Write through
Replacement method  Least-recently-used (LRU) algorithm
Operating clock     (CPU operating clock)/n (n = 1, 2, 3, 4, 6, or 8)

> Would you mind giving this patch a whirl?

sorry, "whirl" = "try" ?


If I try your patch, "Kernel panic" seems go away,
but I can not login.
---------------------
...
  Looking up port of RPC 100003/2 on 192.168.10.77
  Looking up port of RPC 100005/1 on 192.168.10.77
  VFS: Mounted root (nfs filesystem) on device 0:12.
  Freeing unused kernel memory: 108k freed
* Unaligned userspace access in "rcS" pid‡8 pc=0x2955d9fc ins=0x5111
* Sending SIGBUS to "rcS" due to unaligned access (PC 2955d9fc PR 295587c2)

  192.168.10.102 login: root
  Login incorrect
---------------------

I can see * lines sometimes


# I can got same result if I remove
# "l2_cache_init" from setup-sh7724.c