[PATCH] sh: clock-cpg div4 set_rate() shift fix

[PATCH] sh: clock-cpg div4 set_rate() shift fix

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Make sure the div4 bitfield is shifted according
to the enable_bit value in sh_clk_div4_set_rate().

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/sh/kernel/cpu/clock-cpg.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

--- 0001/arch/sh/kernel/cpu/clock-cpg.c
+++ work/arch/sh/kernel/cpu/clock-cpg.c	2010-02-19 16:21:09.000000000 +0900
@@ -192,8 +192,8 @@ static int sh_clk_div4_set_rate(struct c
 		return idx;
 
 	value = __raw_readl(clk->enable_reg);
-	value &= ~0xf;
-	value |= idx;
+	value &= ~(0xf << clk->enable_bit);
+	value |= (idx << clk->enable_bit);
 	__raw_writel(value, clk->enable_reg);
 
 	return 0;

Re: [PATCH] sh: clock-cpg div4 set_rate() shift fix

[Paul Mundt]

On Fri, Feb 19, 2010 at 06:12:00PM +0900, Magnus Damm wrote:
> Make sure the div4 bitfield is shifted according
> to the enable_bit value in sh_clk_div4_set_rate().

On Fri, Feb 19, 2010 at 06:22:25PM +0900, Magnus Damm wrote:
> This patch introduces struct clk_div4_table. The structure
> will be used to keep div4 specific data, and is with this
> patch replacing the struct clk_div_mult_table pointer arg
> used by the sh_clk_div4_register() functions.

On Fri, Feb 19, 2010 at 06:26:56PM +0900, Magnus Damm wrote:
> This patch adds a ->kick() callback to clk_div4_table
> and ties it into sh_clk_div4_set_rate(). A sh7724
> specific kick function is also added that updates the
> KICK bit whenever div4 clocks in FRQCRA and FRQCRB
> have been set. Allows us to set the VPU clock.

On Fri, Feb 19, 2010 at 06:33:47PM +0900, Magnus Damm wrote:
> Update the sh7724 processor code to always enable vpu_clk.
> 
> On the Ecovec board, set the vpu_clk to 166 Mhz.
> 
> The 166MHz setting results in a divide-by-6 setup for
> vpu_clk and improves the VPU performance compared to the
> power-on-reset/bootloader configuration.

All applied, thanks.