[PATCH 00/08] ARM: Dynamic IRQ demux support

[PATCH 00/08] ARM: Dynamic IRQ demux support

[Magnus Damm]

ARM: Dynamic IRQ demux support 

[PATCH 01/08] ARM: Move entry-header.S to asm/
[PATCH 02/08] ARM: Move macros from entry-armv.S
[PATCH 03/08] ARM: Make alignment_trap macro self-contained
[PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
[PATCH 05/08] ARM: Move the unwind header to entry-header.S
[PATCH 06/08] ARM: Add setup_irq_stubs() function
[PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
[PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile

These patches break out the IRQ demux code from entry-armv.S to
allow multiple IRQ demux instances to coexist. A registration 
function is also added that allows per-mach/plat code to chose
which IRQ demux instance to register at runtime.

Useful to support the upcoming single-kernel-binary-on-multiple-machines
_and_ for future SH-Mobile hardware support which will need to tie in
the GIC in the demux code for some processors.

The existing kernel behaviour remains unchanged as long as the kconfig
option CONFIG_DEFAULT_IRQ_DEMUX is set to Y.

A single IRQ demuxer instance (on UP) is written like this:

+#include <asm/entry-header.S>
+
+       .macro  get_irqnr_preamble, base, tmp
[blah]
+       .endm
+
+       .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
[bleh]
+       .endm
+
+       __irq_svc shmobile_common
+       __irq_usr shmobile_common

The per-mach IRQ setup code then registers whatever demuxing functions
it requires using:

+       setup_irq_stubs(__irq_usr_shmobile_common, __irq_svc_shmobile_common);

To strip down memory usage the kconfig option CONFIG_DEFAULT_IRQ_DEMUX
may be set to N to remove the default IRQ demux code. Most macros in
entry-macro.S will then become unused.

The macros disable_fiq and arch_ret_to_user are kept as-is for now.

Signed-off-by: Magnus Damm <damm@opensource.se>
---
 arch/arm/Kconfig                                  |    4 
 arch/arm/include/asm/entry-header.S               |  417 ++++++++++++++++++++-
 arch/arm/include/asm/traps.h                      |    1 
 arch/arm/kernel/entry-armv.S                      |  239 ------------
 arch/arm/kernel/entry-common.S                    |    4 
 arch/arm/kernel/entry-header.S                    |  181 ---------
 arch/arm/kernel/traps.c                           |   14 
 arch/arm/mach-shmobile/Makefile                   |    1 
 arch/arm/mach-shmobile/entry-irq-common.S         |   38 +
 arch/arm/mach-shmobile/include/mach/common.h      |    1 
 arch/arm/mach-shmobile/include/mach/entry-macro.S |   17 
 arch/arm/mach-shmobile/intc-sh7367.c              |    4 
 arch/arm/mach-shmobile/intc-sh7372.c              |    4 
 arch/arm/mach-shmobile/intc-sh7377.c              |    4 
 14 files changed, 506 insertions(+), 423 deletions(-)

[PATCH 01/08] ARM: Move entry-header.S to asm/

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

This patch moves the file arch/arm/kernel/entry-header.S
to arch/arm/include/asm/entry-header.S. The reason for
this move is to allow per-mach assembly IRQ demux code.

The #includes in entry-armv.S and entry-common.S are 
updated to reflect the new file location. The actual code
logic is untouched by this patch.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/include/asm/entry-header.S |  181 +++++++++++++++++++++++++++++++++++
 arch/arm/kernel/entry-armv.S        |    3 
 arch/arm/kernel/entry-common.S      |    3 
 arch/arm/kernel/entry-header.S      |  181 -----------------------------------
 4 files changed, 183 insertions(+), 185 deletions(-)

--- /dev/null
+++ work/arch/arm/include/asm/entry-header.S	2010-09-16 17:22:01.000000000 +0900
@@ -0,0 +1,181 @@
+#include <linux/init.h>
+#include <linux/linkage.h>
+
+#include <asm/assembler.h>
+#include <asm/asm-offsets.h>
+#include <asm/errno.h>
+#include <asm/thread_info.h>
+
+@ Bad Abort numbers
+@ -----------------
+@
+#define BAD_PREFETCH	0
+#define BAD_DATA	1
+#define BAD_ADDREXCPTN	2
+#define BAD_IRQ		3
+#define BAD_UNDEFINSTR	4
+
+@
+@ Most of the stack format comes from struct pt_regs, but with
+@ the addition of 8 bytes for storing syscall args 5 and 6.
+@ This _must_ remain a multiple of 8 for EABI.
+@
+#define S_OFF		8
+
+/* 
+ * The SWI code relies on the fact that R0 is at the bottom of the stack
+ * (due to slow/fast restore user regs).
+ */
+#if S_R0 != 0
+#error "Please fix"
+#endif
+
+	.macro	zero_fp
+#ifdef CONFIG_FRAME_POINTER
+	mov	fp, #0
+#endif
+	.endm
+
+	.macro	alignment_trap, rtemp
+#ifdef CONFIG_ALIGNMENT_TRAP
+	ldr	\rtemp, .LCcralign
+	ldr	\rtemp, [\rtemp]
+	mcr	p15, 0, \rtemp, c1, c0
+#endif
+	.endm
+
+	@
+	@ Store/load the USER SP and LR registers by switching to the SYS
+	@ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
+	@ available. Should only be called from SVC mode
+	@
+	.macro	store_user_sp_lr, rd, rtemp, offset = 0
+	mrs	\rtemp, cpsr
+	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
+	msr	cpsr_c, \rtemp			@ switch to the SYS mode
+
+	str	sp, [\rd, #\offset]		@ save sp_usr
+	str	lr, [\rd, #\offset + 4]		@ save lr_usr
+
+	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
+	msr	cpsr_c, \rtemp			@ switch back to the SVC mode
+	.endm
+
+	.macro	load_user_sp_lr, rd, rtemp, offset = 0
+	mrs	\rtemp, cpsr
+	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
+	msr	cpsr_c, \rtemp			@ switch to the SYS mode
+
+	ldr	sp, [\rd, #\offset]		@ load sp_usr
+	ldr	lr, [\rd, #\offset + 4]		@ load lr_usr
+
+	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
+	msr	cpsr_c, \rtemp			@ switch back to the SVC mode
+	.endm
+
+#ifndef CONFIG_THUMB2_KERNEL
+	.macro	svc_exit, rpsr
+	msr	spsr_cxsf, \rpsr
+#if defined(CONFIG_CPU_32v6K)
+	clrex					@ clear the exclusive monitor
+	ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
+#elif defined (CONFIG_CPU_V6)
+	ldr	r0, [sp]
+	strex	r1, r2, [sp]			@ clear the exclusive monitor
+	ldmib	sp, {r1 - pc}^			@ load r1 - pc, cpsr
+#else
+	ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
+#endif
+	.endm
+
+	.macro	restore_user_regs, fast = 0, offset = 0
+	ldr	r1, [sp, #\offset + S_PSR]	@ get calling cpsr
+	ldr	lr, [sp, #\offset + S_PC]!	@ get pc
+	msr	spsr_cxsf, r1			@ save in spsr_svc
+#if defined(CONFIG_CPU_32v6K)
+	clrex					@ clear the exclusive monitor
+#elif defined (CONFIG_CPU_V6)
+	strex	r1, r2, [sp]			@ clear the exclusive monitor
+#endif
+	.if	\fast
+	ldmdb	sp, {r1 - lr}^			@ get calling r1 - lr
+	.else
+	ldmdb	sp, {r0 - lr}^			@ get calling r0 - lr
+	.endif
+	mov	r0, r0				@ ARMv5T and earlier require a nop
+						@ after ldm {}^
+	add	sp, sp, #S_FRAME_SIZE - S_PC
+	movs	pc, lr				@ return & move spsr_svc into cpsr
+	.endm
+
+	.macro	get_thread_info, rd
+	mov	\rd, sp, lsr #13
+	mov	\rd, \rd, lsl #13
+	.endm
+
+	@
+	@ 32-bit wide "mov pc, reg"
+	@
+	.macro	movw_pc, reg
+	mov	pc, \reg
+	.endm
+#else	/* CONFIG_THUMB2_KERNEL */
+	.macro	svc_exit, rpsr
+	clrex					@ clear the exclusive monitor
+	ldr	r0, [sp, #S_SP]			@ top of the stack
+	ldr	r1, [sp, #S_PC]			@ return address
+	tst	r0, #4				@ orig stack 8-byte aligned?
+	stmdb	r0, {r1, \rpsr}			@ rfe context
+	ldmia	sp, {r0 - r12}
+	ldr	lr, [sp, #S_LR]
+	addeq	sp, sp, #S_FRAME_SIZE - 8	@ aligned
+	addne	sp, sp, #S_FRAME_SIZE - 4	@ not aligned
+	rfeia	sp!
+	.endm
+
+	.macro	restore_user_regs, fast = 0, offset = 0
+	clrex					@ clear the exclusive monitor
+	mov	r2, sp
+	load_user_sp_lr r2, r3, \offset + S_SP	@ calling sp, lr
+	ldr	r1, [sp, #\offset + S_PSR]	@ get calling cpsr
+	ldr	lr, [sp, #\offset + S_PC]	@ get pc
+	add	sp, sp, #\offset + S_SP
+	msr	spsr_cxsf, r1			@ save in spsr_svc
+	.if	\fast
+	ldmdb	sp, {r1 - r12}			@ get calling r1 - r12
+	.else
+	ldmdb	sp, {r0 - r12}			@ get calling r0 - r12
+	.endif
+	add	sp, sp, #S_FRAME_SIZE - S_SP
+	movs	pc, lr				@ return & move spsr_svc into cpsr
+	.endm
+
+	.macro	get_thread_info, rd
+	mov	\rd, sp
+	lsr	\rd, \rd, #13
+	mov	\rd, \rd, lsl #13
+	.endm
+
+	@
+	@ 32-bit wide "mov pc, reg"
+	@
+	.macro	movw_pc, reg
+	mov	pc, \reg
+	nop
+	.endm
+#endif	/* !CONFIG_THUMB2_KERNEL */
+
+/*
+ * These are the registers used in the syscall handler, and allow us to
+ * have in theory up to 7 arguments to a function - r0 to r6.
+ *
+ * r7 is reserved for the system call number for thumb mode.
+ *
+ * Note that tbl = why is intentional.
+ *
+ * We must set at least "tsk" and "why" when calling ret_with_reschedule.
+ */
+scno	.req	r7		@ syscall number
+tbl	.req	r8		@ syscall table pointer
+why	.req	r8		@ Linux syscall (!= 0)
+tsk	.req	r9		@ current thread_info
--- 0001/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-05 20:03:00.000000000 +0900
@@ -23,8 +23,7 @@
 #include <asm/unwind.h>
 #include <asm/unistd.h>
 #include <asm/tls.h>
-
-#include "entry-header.S"
+#include <asm/entry-header.S>
 
 /*
  * Interrupt handling.  Preserves r7, r8, r9
--- 0001/arch/arm/kernel/entry-common.S
+++ work/arch/arm/kernel/entry-common.S	2010-10-05 20:03:14.000000000 +0900
@@ -12,8 +12,7 @@
 #include <asm/ftrace.h>
 #include <mach/entry-macro.S>
 #include <asm/unwind.h>
-
-#include "entry-header.S"
+#include <asm/entry-header.S>
 
 
 	.align	5
--- 0001/arch/arm/kernel/entry-header.S
+++ /dev/null	2010-09-30 18:32:39.608254290 +0900
@@ -1,181 +0,0 @@
-#include <linux/init.h>
-#include <linux/linkage.h>
-
-#include <asm/assembler.h>
-#include <asm/asm-offsets.h>
-#include <asm/errno.h>
-#include <asm/thread_info.h>
-
-@ Bad Abort numbers
-@ -----------------
-@
-#define BAD_PREFETCH	0
-#define BAD_DATA	1
-#define BAD_ADDREXCPTN	2
-#define BAD_IRQ		3
-#define BAD_UNDEFINSTR	4
-
-@
-@ Most of the stack format comes from struct pt_regs, but with
-@ the addition of 8 bytes for storing syscall args 5 and 6.
-@ This _must_ remain a multiple of 8 for EABI.
-@
-#define S_OFF		8
-
-/* 
- * The SWI code relies on the fact that R0 is at the bottom of the stack
- * (due to slow/fast restore user regs).
- */
-#if S_R0 != 0
-#error "Please fix"
-#endif
-
-	.macro	zero_fp
-#ifdef CONFIG_FRAME_POINTER
-	mov	fp, #0
-#endif
-	.endm
-
-	.macro	alignment_trap, rtemp
-#ifdef CONFIG_ALIGNMENT_TRAP
-	ldr	\rtemp, .LCcralign
-	ldr	\rtemp, [\rtemp]
-	mcr	p15, 0, \rtemp, c1, c0
-#endif
-	.endm
-
-	@
-	@ Store/load the USER SP and LR registers by switching to the SYS
-	@ mode. Useful in Thumb-2 mode where "stm/ldm rd, {sp, lr}^" is not
-	@ available. Should only be called from SVC mode
-	@
-	.macro	store_user_sp_lr, rd, rtemp, offset = 0
-	mrs	\rtemp, cpsr
-	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
-	msr	cpsr_c, \rtemp			@ switch to the SYS mode
-
-	str	sp, [\rd, #\offset]		@ save sp_usr
-	str	lr, [\rd, #\offset + 4]		@ save lr_usr
-
-	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
-	msr	cpsr_c, \rtemp			@ switch back to the SVC mode
-	.endm
-
-	.macro	load_user_sp_lr, rd, rtemp, offset = 0
-	mrs	\rtemp, cpsr
-	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
-	msr	cpsr_c, \rtemp			@ switch to the SYS mode
-
-	ldr	sp, [\rd, #\offset]		@ load sp_usr
-	ldr	lr, [\rd, #\offset + 4]		@ load lr_usr
-
-	eor	\rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
-	msr	cpsr_c, \rtemp			@ switch back to the SVC mode
-	.endm
-
-#ifndef CONFIG_THUMB2_KERNEL
-	.macro	svc_exit, rpsr
-	msr	spsr_cxsf, \rpsr
-#if defined(CONFIG_CPU_32v6K)
-	clrex					@ clear the exclusive monitor
-	ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
-#elif defined (CONFIG_CPU_V6)
-	ldr	r0, [sp]
-	strex	r1, r2, [sp]			@ clear the exclusive monitor
-	ldmib	sp, {r1 - pc}^			@ load r1 - pc, cpsr
-#else
-	ldmia	sp, {r0 - pc}^			@ load r0 - pc, cpsr
-#endif
-	.endm
-
-	.macro	restore_user_regs, fast = 0, offset = 0
-	ldr	r1, [sp, #\offset + S_PSR]	@ get calling cpsr
-	ldr	lr, [sp, #\offset + S_PC]!	@ get pc
-	msr	spsr_cxsf, r1			@ save in spsr_svc
-#if defined(CONFIG_CPU_32v6K)
-	clrex					@ clear the exclusive monitor
-#elif defined (CONFIG_CPU_V6)
-	strex	r1, r2, [sp]			@ clear the exclusive monitor
-#endif
-	.if	\fast
-	ldmdb	sp, {r1 - lr}^			@ get calling r1 - lr
-	.else
-	ldmdb	sp, {r0 - lr}^			@ get calling r0 - lr
-	.endif
-	mov	r0, r0				@ ARMv5T and earlier require a nop
-						@ after ldm {}^
-	add	sp, sp, #S_FRAME_SIZE - S_PC
-	movs	pc, lr				@ return & move spsr_svc into cpsr
-	.endm
-
-	.macro	get_thread_info, rd
-	mov	\rd, sp, lsr #13
-	mov	\rd, \rd, lsl #13
-	.endm
-
-	@
-	@ 32-bit wide "mov pc, reg"
-	@
-	.macro	movw_pc, reg
-	mov	pc, \reg
-	.endm
-#else	/* CONFIG_THUMB2_KERNEL */
-	.macro	svc_exit, rpsr
-	clrex					@ clear the exclusive monitor
-	ldr	r0, [sp, #S_SP]			@ top of the stack
-	ldr	r1, [sp, #S_PC]			@ return address
-	tst	r0, #4				@ orig stack 8-byte aligned?
-	stmdb	r0, {r1, \rpsr}			@ rfe context
-	ldmia	sp, {r0 - r12}
-	ldr	lr, [sp, #S_LR]
-	addeq	sp, sp, #S_FRAME_SIZE - 8	@ aligned
-	addne	sp, sp, #S_FRAME_SIZE - 4	@ not aligned
-	rfeia	sp!
-	.endm
-
-	.macro	restore_user_regs, fast = 0, offset = 0
-	clrex					@ clear the exclusive monitor
-	mov	r2, sp
-	load_user_sp_lr r2, r3, \offset + S_SP	@ calling sp, lr
-	ldr	r1, [sp, #\offset + S_PSR]	@ get calling cpsr
-	ldr	lr, [sp, #\offset + S_PC]	@ get pc
-	add	sp, sp, #\offset + S_SP
-	msr	spsr_cxsf, r1			@ save in spsr_svc
-	.if	\fast
-	ldmdb	sp, {r1 - r12}			@ get calling r1 - r12
-	.else
-	ldmdb	sp, {r0 - r12}			@ get calling r0 - r12
-	.endif
-	add	sp, sp, #S_FRAME_SIZE - S_SP
-	movs	pc, lr				@ return & move spsr_svc into cpsr
-	.endm
-
-	.macro	get_thread_info, rd
-	mov	\rd, sp
-	lsr	\rd, \rd, #13
-	mov	\rd, \rd, lsl #13
-	.endm
-
-	@
-	@ 32-bit wide "mov pc, reg"
-	@
-	.macro	movw_pc, reg
-	mov	pc, \reg
-	nop
-	.endm
-#endif	/* !CONFIG_THUMB2_KERNEL */
-
-/*
- * These are the registers used in the syscall handler, and allow us to
- * have in theory up to 7 arguments to a function - r0 to r6.
- *
- * r7 is reserved for the system call number for thumb mode.
- *
- * Note that tbl = why is intentional.
- *
- * We must set at least "tsk" and "why" when calling ret_with_reschedule.
- */
-scno	.req	r7		@ syscall number
-tbl	.req	r8		@ syscall table pointer
-why	.req	r8		@ Linux syscall (!= 0)
-tsk	.req	r9		@ current thread_info

[PATCH 02/08] ARM: Move macros from entry-armv.S

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Move macros from entry-armv.S to entry-header.S.
Preparation work for converting the __irq_svc
and __irq_usr to macros. No code is changed,
but a few comments are modified.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/include/asm/entry-header.S |  151 +++++++++++++++++++++++++++++++++++
 arch/arm/kernel/entry-armv.S        |  141 --------------------------------
 2 files changed, 151 insertions(+), 141 deletions(-)

--- 0005/arch/arm/include/asm/entry-header.S
+++ work/arch/arm/include/asm/entry-header.S	2010-10-05 20:09:54.000000000 +0900
@@ -179,3 +179,154 @@ scno	.req	r7		@ syscall number
 tbl	.req	r8		@ syscall table pointer
 why	.req	r8		@ Linux syscall (!= 0)
 tsk	.req	r9		@ current thread_info
+
+/*
+ * Interrupt handling.  Preserves r7, r8, r9
+ */
+	.macro	irq_handler
+	get_irqnr_preamble r5, lr
+1:	get_irqnr_and_base r0, r6, r5, lr
+	movne	r1, sp
+	@
+	@ routine called with r0 = irq number, r1 = struct pt_regs *
+	@
+	adrne	lr, BSYM(1b)
+	bne	asm_do_IRQ
+
+#ifdef CONFIG_SMP
+	/*
+	 * XXX
+	 *
+	 * this macro assumes that irqstat (r6) and base (r5) are
+	 * preserved from get_irqnr_and_base above
+	 */
+	test_for_ipi r0, r6, r5, lr
+	movne	r0, sp
+	adrne	lr, BSYM(1b)
+	bne	do_IPI
+
+#ifdef CONFIG_LOCAL_TIMERS
+	test_for_ltirq r0, r6, r5, lr
+	movne	r0, sp
+	adrne	lr, BSYM(1b)
+	bne	do_local_timer
+#endif
+#endif
+
+	.endm
+
+#ifdef CONFIG_KPROBES
+	.section	.kprobes.text,"ax",%progbits
+#else
+	.text
+#endif
+
+/*
+ * SVC mode macros
+ */
+
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
+#define SPFIX(code...) code
+#else
+#define SPFIX(code...)
+#endif
+
+	.macro	svc_entry, stack_hole=0
+ UNWIND(.fnstart		)
+ UNWIND(.save {r0 - pc}		)
+	sub	sp, sp, #(S_FRAME_SIZE + \stack_hole - 4)
+#ifdef CONFIG_THUMB2_KERNEL
+ SPFIX(	str	r0, [sp]	)	@ temporarily saved
+ SPFIX(	mov	r0, sp		)
+ SPFIX(	tst	r0, #4		)	@ test original stack alignment
+ SPFIX(	ldr	r0, [sp]	)	@ restored
+#else
+ SPFIX(	tst	sp, #4		)
+#endif
+ SPFIX(	subeq	sp, sp, #4	)
+	stmia	sp, {r1 - r12}
+
+	ldmia	r0, {r1 - r3}
+	add	r5, sp, #S_SP - 4	@ here for interlock avoidance
+	mov	r4, #-1			@  ""  ""      ""       ""
+	add	r0, sp, #(S_FRAME_SIZE + \stack_hole - 4)
+ SPFIX(	addeq	r0, r0, #4	)
+	str	r1, [sp, #-4]!		@ save the "real" r0 copied
+					@ from the exception stack
+
+	mov	r1, lr
+
+	@
+	@ We are now ready to fill in the remaining blanks on the stack:
+	@
+	@  r0 - sp_svc
+	@  r1 - lr_svc
+	@  r2 - lr_<exception>, already fixed up for correct return/restart
+	@  r3 - spsr_<exception>
+	@  r4 - orig_r0 (see pt_regs definition in ptrace.h)
+	@
+	stmia	r5, {r0 - r4}
+	.endm
+
+/*
+ * User mode macros
+ *
+ * EABI note: sp_svc is always 64-bit aligned here, so should S_FRAME_SIZE
+ */
+
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) && (S_FRAME_SIZE & 7)
+#error "sizeof(struct pt_regs) must be a multiple of 8"
+#endif
+
+	.macro	usr_entry
+ UNWIND(.fnstart	)
+ UNWIND(.cantunwind	)	@ don't unwind the user space
+	sub	sp, sp, #S_FRAME_SIZE
+ ARM(	stmib	sp, {r1 - r12}	)
+ THUMB(	stmia	sp, {r0 - r12}	)
+
+	ldmia	r0, {r1 - r3}
+	add	r0, sp, #S_PC		@ here for interlock avoidance
+	mov	r4, #-1			@  ""  ""     ""        ""
+
+	str	r1, [sp]		@ save the "real" r0 copied
+					@ from the exception stack
+
+	@
+	@ We are now ready to fill in the remaining blanks on the stack:
+	@
+	@  r2 - lr_<exception>, already fixed up for correct return/restart
+	@  r3 - spsr_<exception>
+	@  r4 - orig_r0 (see pt_regs definition in ptrace.h)
+	@
+	@ Also, separately save sp_usr and lr_usr
+	@
+	stmia	r0, {r2 - r4}
+ ARM(	stmdb	r0, {sp, lr}^			)
+ THUMB(	store_user_sp_lr r0, r1, S_SP - S_PC	)
+
+	@
+	@ Enable the alignment trap while in kernel mode
+	@
+	alignment_trap r0
+
+	@
+	@ Clear FP to mark the first stack frame
+	@
+	zero_fp
+	.endm
+
+	.macro	kuser_cmpxchg_check
+#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
+#ifndef CONFIG_MMU
+#warning "NPTL on non MMU needs fixing"
+#else
+	@ Make sure our user space atomic helper is restarted
+	@ if it was interrupted in a critical region.  Here we
+	@ perform a quick test inline since it should be false
+	@ 99.9999% of the time.  The rest is done out of line.
+	cmp	r2, #TASK_SIZE
+	blhs	kuser_cmpxchg_fixup
+#endif
+#endif
+	.endm
--- 0005/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-05 20:10:56.000000000 +0900
@@ -26,47 +26,6 @@
 #include <asm/entry-header.S>
 
 /*
- * Interrupt handling.  Preserves r7, r8, r9
- */
-	.macro	irq_handler
-	get_irqnr_preamble r5, lr
-1:	get_irqnr_and_base r0, r6, r5, lr
-	movne	r1, sp
-	@
-	@ routine called with r0 = irq number, r1 = struct pt_regs *
-	@
-	adrne	lr, BSYM(1b)
-	bne	asm_do_IRQ
-
-#ifdef CONFIG_SMP
-	/*
-	 * XXX
-	 *
-	 * this macro assumes that irqstat (r6) and base (r5) are
-	 * preserved from get_irqnr_and_base above
-	 */
-	test_for_ipi r0, r6, r5, lr
-	movne	r0, sp
-	adrne	lr, BSYM(1b)
-	bne	do_IPI
-
-#ifdef CONFIG_LOCAL_TIMERS
-	test_for_ltirq r0, r6, r5, lr
-	movne	r0, sp
-	adrne	lr, BSYM(1b)
-	bne	do_local_timer
-#endif
-#endif
-
-	.endm
-
-#ifdef CONFIG_KPROBES
-	.section	.kprobes.text,"ax",%progbits
-#else
-	.text
-#endif
-
-/*
  * Invalid mode handlers
  */
 	.macro	inv_entry, reason
@@ -121,49 +80,6 @@ ENDPROC(__und_invalid)
  * SVC mode handlers
  */
 
-#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
-#define SPFIX(code...) code
-#else
-#define SPFIX(code...)
-#endif
-
-	.macro	svc_entry, stack_hole=0
- UNWIND(.fnstart		)
- UNWIND(.save {r0 - pc}		)
-	sub	sp, sp, #(S_FRAME_SIZE + \stack_hole - 4)
-#ifdef CONFIG_THUMB2_KERNEL
- SPFIX(	str	r0, [sp]	)	@ temporarily saved
- SPFIX(	mov	r0, sp		)
- SPFIX(	tst	r0, #4		)	@ test original stack alignment
- SPFIX(	ldr	r0, [sp]	)	@ restored
-#else
- SPFIX(	tst	sp, #4		)
-#endif
- SPFIX(	subeq	sp, sp, #4	)
-	stmia	sp, {r1 - r12}
-
-	ldmia	r0, {r1 - r3}
-	add	r5, sp, #S_SP - 4	@ here for interlock avoidance
-	mov	r4, #-1			@  ""  ""      ""       ""
-	add	r0, sp, #(S_FRAME_SIZE + \stack_hole - 4)
- SPFIX(	addeq	r0, r0, #4	)
-	str	r1, [sp, #-4]!		@ save the "real" r0 copied
-					@ from the exception stack
-
-	mov	r1, lr
-
-	@
-	@ We are now ready to fill in the remaining blanks on the stack:
-	@
-	@  r0 - sp_svc
-	@  r1 - lr_svc
-	@  r2 - lr_<exception>, already fixed up for correct return/restart
-	@  r3 - spsr_<exception>
-	@  r4 - orig_r0 (see pt_regs definition in ptrace.h)
-	@
-	stmia	r5, {r0 - r4}
-	.endm
-
 	.align	5
 __dabt_svc:
 	svc_entry
@@ -354,63 +270,6 @@ ENDPROC(__pabt_svc)
  * EABI note: sp_svc is always 64-bit aligned here, so should S_FRAME_SIZE
  */
 
-#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) && (S_FRAME_SIZE & 7)
-#error "sizeof(struct pt_regs) must be a multiple of 8"
-#endif
-
-	.macro	usr_entry
- UNWIND(.fnstart	)
- UNWIND(.cantunwind	)	@ don't unwind the user space
-	sub	sp, sp, #S_FRAME_SIZE
- ARM(	stmib	sp, {r1 - r12}	)
- THUMB(	stmia	sp, {r0 - r12}	)
-
-	ldmia	r0, {r1 - r3}
-	add	r0, sp, #S_PC		@ here for interlock avoidance
-	mov	r4, #-1			@  ""  ""     ""        ""
-
-	str	r1, [sp]		@ save the "real" r0 copied
-					@ from the exception stack
-
-	@
-	@ We are now ready to fill in the remaining blanks on the stack:
-	@
-	@  r2 - lr_<exception>, already fixed up for correct return/restart
-	@  r3 - spsr_<exception>
-	@  r4 - orig_r0 (see pt_regs definition in ptrace.h)
-	@
-	@ Also, separately save sp_usr and lr_usr
-	@
-	stmia	r0, {r2 - r4}
- ARM(	stmdb	r0, {sp, lr}^			)
- THUMB(	store_user_sp_lr r0, r1, S_SP - S_PC	)
-
-	@
-	@ Enable the alignment trap while in kernel mode
-	@
-	alignment_trap r0
-
-	@
-	@ Clear FP to mark the first stack frame
-	@
-	zero_fp
-	.endm
-
-	.macro	kuser_cmpxchg_check
-#if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG)
-#ifndef CONFIG_MMU
-#warning "NPTL on non MMU needs fixing"
-#else
-	@ Make sure our user space atomic helper is restarted
-	@ if it was interrupted in a critical region.  Here we
-	@ perform a quick test inline since it should be false
-	@ 99.9999% of the time.  The rest is done out of line.
-	cmp	r2, #TASK_SIZE
-	blhs	kuser_cmpxchg_fixup
-#endif
-#endif
-	.endm
-
 	.align	5
 __dabt_usr:
 	usr_entry

[PATCH 03/08] ARM: Make alignment_trap macro self-contained

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Remove the .LCcralign dependency from the aligment_trap
macro. Needed to create multiple __irq_usr instances.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/include/asm/entry-header.S |    6 +++++-
 arch/arm/kernel/entry-armv.S        |    2 --
 2 files changed, 5 insertions(+), 3 deletions(-)

--- 0003/arch/arm/include/asm/entry-header.S
+++ work/arch/arm/include/asm/entry-header.S	2010-10-06 15:06:16.000000000 +0900
@@ -38,9 +38,13 @@
 
 	.macro	alignment_trap, rtemp
 #ifdef CONFIG_ALIGNMENT_TRAP
-	ldr	\rtemp, .LCcralign
+	ldr	\rtemp, 1f
 	ldr	\rtemp, [\rtemp]
 	mcr	p15, 0, \rtemp, c1, c0
+	b	2f
+1:
+	.word	cr_alignment
+2:
 #endif
 	.endm
 
--- 0003/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-06 14:28:47.000000000 +0900
@@ -255,8 +255,6 @@ __pabt_svc:
 ENDPROC(__pabt_svc)
 
 	.align	5
-.LCcralign:
-	.word	cr_alignment
 #ifdef MULTI_DABORT
 .LCprocfns:
 	.word	processor

[PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Convert __irq_usr and __irq_svc to macros and
keep the existing code as default implementation.

The macros will keep global symbols with the
name prefexed with "__irq_svc_" and "__irq_usr_".

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/include/asm/entry-header.S |   78 +++++++++++++++++++++++++++++++++++
 arch/arm/kernel/entry-armv.S        |   77 +---------------------------------
 2 files changed, 82 insertions(+), 73 deletions(-)

--- 0004/arch/arm/include/asm/entry-header.S
+++ work/arch/arm/include/asm/entry-header.S	2010-10-06 15:07:50.000000000 +0900
@@ -334,3 +334,81 @@ tsk	.req	r9		@ current thread_info
 #endif
 #endif
 	.endm
+
+	.macro	__irq_svc, name
+	.align	5
+	.globl	__irq_svc_\name
+__irq_svc_\name:
+	svc_entry
+
+#ifdef CONFIG_TRACE_IRQFLAGS
+	bl	trace_hardirqs_off
+#endif
+#ifdef CONFIG_PREEMPT
+	get_thread_info tsk
+	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count
+	add	r7, r8, #1			@ increment it
+	str	r7, [tsk, #TI_PREEMPT]
+#endif
+
+	irq_handler
+#ifdef CONFIG_PREEMPT
+	str	r8, [tsk, #TI_PREEMPT]		@ restore preempt count
+	ldr	r0, [tsk, #TI_FLAGS]		@ get flags
+	teq	r8, #0				@ if preempt count != 0
+	movne	r0, #0				@ force flags to 0
+	tst	r0, #_TIF_NEED_RESCHED
+	blne	svc_preempt
+#endif
+	ldr	r4, [sp, #S_PSR]		@ irqs are already disabled
+#ifdef CONFIG_TRACE_IRQFLAGS
+	tst	r4, #PSR_I_BIT
+	bleq	trace_hardirqs_on
+#endif
+	svc_exit r4				@ return from exception
+ UNWIND(.fnend		)
+ENDPROC(__irq_svc_\name)
+
+	.ltorg
+
+#ifdef CONFIG_PREEMPT
+svc_preempt:
+	mov	r8, lr
+1:	bl	preempt_schedule_irq		@ irq en/disable is done inside
+	ldr	r0, [tsk, #TI_FLAGS]		@ get new tasks TI_FLAGS
+	tst	r0, #_TIF_NEED_RESCHED
+	moveq	pc, r8				@ go again
+	b	1b
+#endif
+	.endm
+
+	.macro	__irq_usr, name
+	.align	5
+	.globl	__irq_usr_\name
+__irq_usr_\name:
+	usr_entry
+	kuser_cmpxchg_check
+
+	get_thread_info tsk
+#ifdef CONFIG_PREEMPT
+	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count
+	add	r7, r8, #1			@ increment it
+	str	r7, [tsk, #TI_PREEMPT]
+#endif
+
+	irq_handler
+#ifdef CONFIG_PREEMPT
+	ldr	r0, [tsk, #TI_PREEMPT]
+	str	r8, [tsk, #TI_PREEMPT]
+	teq	r0, r7
+ ARM(	strne	r0, [r0, -r0]	)
+ THUMB(	movne	r0, #0		)
+ THUMB(	strne	r0, [r0]	)
+#endif
+
+	mov	why, #0
+	b	ret_to_user
+ UNWIND(.fnend		)
+ENDPROC(__irq_usr_\name)
+	.ltorg
+	.endm
--- 0004/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-06 15:07:23.000000000 +0900
@@ -128,49 +128,7 @@ __dabt_svc:
  UNWIND(.fnend		)
 ENDPROC(__dabt_svc)
 
-	.align	5
-__irq_svc:
-	svc_entry
-
-#ifdef CONFIG_TRACE_IRQFLAGS
-	bl	trace_hardirqs_off
-#endif
-#ifdef CONFIG_PREEMPT
-	get_thread_info tsk
-	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count
-	add	r7, r8, #1			@ increment it
-	str	r7, [tsk, #TI_PREEMPT]
-#endif
-
-	irq_handler
-#ifdef CONFIG_PREEMPT
-	str	r8, [tsk, #TI_PREEMPT]		@ restore preempt count
-	ldr	r0, [tsk, #TI_FLAGS]		@ get flags
-	teq	r8, #0				@ if preempt count != 0
-	movne	r0, #0				@ force flags to 0
-	tst	r0, #_TIF_NEED_RESCHED
-	blne	svc_preempt
-#endif
-	ldr	r4, [sp, #S_PSR]		@ irqs are already disabled
-#ifdef CONFIG_TRACE_IRQFLAGS
-	tst	r4, #PSR_I_BIT
-	bleq	trace_hardirqs_on
-#endif
-	svc_exit r4				@ return from exception
- UNWIND(.fnend		)
-ENDPROC(__irq_svc)
-
-	.ltorg
-
-#ifdef CONFIG_PREEMPT
-svc_preempt:
-	mov	r8, lr
-1:	bl	preempt_schedule_irq		@ irq en/disable is done inside
-	ldr	r0, [tsk, #TI_FLAGS]		@ get new tasks TI_FLAGS
-	tst	r0, #_TIF_NEED_RESCHED
-	moveq	pc, r8				@ go again
-	b	1b
-#endif
+	__irq_svc	default
 
 	.align	5
 __und_svc:
@@ -300,34 +258,7 @@ __dabt_usr:
  UNWIND(.fnend		)
 ENDPROC(__dabt_usr)
 
-	.align	5
-__irq_usr:
-	usr_entry
-	kuser_cmpxchg_check
-
-	get_thread_info tsk
-#ifdef CONFIG_PREEMPT
-	ldr	r8, [tsk, #TI_PREEMPT]		@ get preempt count
-	add	r7, r8, #1			@ increment it
-	str	r7, [tsk, #TI_PREEMPT]
-#endif
-
-	irq_handler
-#ifdef CONFIG_PREEMPT
-	ldr	r0, [tsk, #TI_PREEMPT]
-	str	r8, [tsk, #TI_PREEMPT]
-	teq	r0, r7
- ARM(	strne	r0, [r0, -r0]	)
- THUMB(	movne	r0, #0		)
- THUMB(	strne	r0, [r0]	)
-#endif
-
-	mov	why, #0
-	b	ret_to_user
- UNWIND(.fnend		)
-ENDPROC(__irq_usr)
-
-	.ltorg
+	__irq_usr	default
 
 	.align	5
 __und_usr:
@@ -952,10 +883,10 @@ __stubs_start:
  */
 	vector_stub	irq, IRQ_MODE, 4
 
-	.long	__irq_usr			@  0  (USR_26 / USR_32)
+	.long	__irq_usr_default		@  0  (USR_26 / USR_32)
 	.long	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
 	.long	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
-	.long	__irq_svc			@  3  (SVC_26 / SVC_32)
+	.long	__irq_svc_default		@  3  (SVC_26 / SVC_32)
 	.long	__irq_invalid			@  4
 	.long	__irq_invalid			@  5
 	.long	__irq_invalid			@  6

[PATCH 05/08] ARM: Move the unwind header to entry-header.S

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Include the unwind header in entry-header.S.

This way we save space in the IRQ demux file.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/include/asm/entry-header.S |    1 +
 arch/arm/kernel/entry-armv.S        |    1 -
 arch/arm/kernel/entry-common.S      |    1 -
 3 files changed, 1 insertion(+), 2 deletions(-)

--- 0005/arch/arm/include/asm/entry-header.S
+++ work/arch/arm/include/asm/entry-header.S	2010-10-06 14:30:10.000000000 +0900
@@ -5,6 +5,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/errno.h>
 #include <asm/thread_info.h>
+#include <asm/unwind.h>
 
 @ Bad Abort numbers
 @ -----------------
--- 0005/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-06 14:30:14.000000000 +0900
@@ -20,7 +20,6 @@
 #include <asm/vfpmacros.h>
 #include <mach/entry-macro.S>
 #include <asm/thread_notify.h>
-#include <asm/unwind.h>
 #include <asm/unistd.h>
 #include <asm/tls.h>
 #include <asm/entry-header.S>
--- 0002/arch/arm/kernel/entry-common.S
+++ work/arch/arm/kernel/entry-common.S	2010-10-06 14:30:20.000000000 +0900
@@ -11,7 +11,6 @@
 #include <asm/unistd.h>
 #include <asm/ftrace.h>
 #include <mach/entry-macro.S>
-#include <asm/unwind.h>
 #include <asm/entry-header.S>
 
 

[PATCH 06/08] ARM: Add setup_irq_stubs() function

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Add a setup_irq_stubs() function to allow registration
of per-mach/plat IRQ demux routines.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/include/asm/traps.h |    1 +
 arch/arm/kernel/entry-armv.S |    2 ++
 arch/arm/kernel/traps.c      |   14 ++++++++++++++
 3 files changed, 17 insertions(+)

--- 0001/arch/arm/include/asm/traps.h
+++ work/arch/arm/include/asm/traps.h	2010-10-05 20:26:18.000000000 +0900
@@ -24,6 +24,7 @@ static inline int in_exception_text(unsi
 	       ptr < (unsigned long)&__exception_text_end;
 }
 
+extern void __init setup_irq_stubs(void *irq_usr, void *irq_svr);
 extern void __init early_trap_init(void);
 extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame);
 
--- 0008/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-05 20:28:22.000000000 +0900
@@ -883,6 +883,8 @@ __stubs_start:
  */
 	vector_stub	irq, IRQ_MODE, 4
 
+	.globl	__stubs_irq
+__stubs_irq:
 	.long	__irq_usr_default		@  0  (USR_26 / USR_32)
 	.long	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
 	.long	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
--- 0001/arch/arm/kernel/traps.c
+++ work/arch/arm/kernel/traps.c	2010-10-05 20:27:11.000000000 +0900
@@ -757,6 +757,20 @@ static void __init kuser_get_tls_init(un
 		memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4);
 }
 
+void __init setup_irq_stubs(void *usr_handler, void *svc_handler)
+{
+	unsigned long vectors = CONFIG_VECTORS_BASE;
+	extern char __stubs_start[], __stubs_irq[];
+	void **stubs_ptr;
+
+	stubs_ptr = (void *)vectors + 0x200 + (__stubs_irq - __stubs_start);
+
+	stubs_ptr[0] = usr_handler;
+	stubs_ptr[3] = svc_handler;
+
+	flush_icache_range(vectors, vectors + PAGE_SIZE);
+}
+
 void __init early_trap_init(void)
 {
 	unsigned long vectors = CONFIG_VECTORS_BASE;

[PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Add a CONFIG_DEFAULT_IRQ_DEMUX to allow removing the
default IRQ demuxer from the ARM kernel. This will
reduce the memory footprint and also remove the need
for some of the macros in entry-macro.S.

In the case of CONFIG_DEFAULT_IRQ_DEMUX=n the default
IRQ demux code is omitted from the kernel and the per-
mach/plat demux code must then be registered using the
function setup_irq_stubs(). CONFIG_DEFAULT_IRQ_DEMUX=y
keeps the default IRQ demuxer code as-is in the kernel.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/Kconfig             |    3 +++
 arch/arm/kernel/entry-armv.S |   13 +++++++++++--
 2 files changed, 14 insertions(+), 2 deletions(-)

--- 0001/arch/arm/Kconfig
+++ work/arch/arm/Kconfig	2010-10-05 20:36:45.000000000 +0900
@@ -1337,6 +1337,9 @@ config SPARSE_IRQ
 	  number of off-chip IRQs will want to treat this as
 	  experimental until they have been independently verified.
 
+config DEFAULT_IRQ_DEMUX
+	def_bool y
+
 source "mm/Kconfig"
 
 config FORCE_MAX_ZONEORDER
--- 0009/arch/arm/kernel/entry-armv.S
+++ work/arch/arm/kernel/entry-armv.S	2010-10-05 20:34:16.000000000 +0900
@@ -128,8 +128,9 @@ __dabt_svc:
  UNWIND(.fnend		)
 ENDPROC(__dabt_svc)
 
+#ifdef CONFIG_DEFAULT_IRQ_DEMUX
 	__irq_svc	default
-
+#endif
 	.align	5
 __und_svc:
 #ifdef CONFIG_KPROBES
@@ -258,8 +259,9 @@ __dabt_usr:
  UNWIND(.fnend		)
 ENDPROC(__dabt_usr)
 
+#ifdef CONFIG_DEFAULT_IRQ_DEMUX
 	__irq_usr	default
-
+#endif
 	.align	5
 __und_usr:
 	usr_entry
@@ -885,10 +887,17 @@ __stubs_start:
 
 	.globl	__stubs_irq
 __stubs_irq:
+#ifdef CONFIG_DEFAULT_IRQ_DEMUX
 	.long	__irq_usr_default		@  0  (USR_26 / USR_32)
 	.long	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
 	.long	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
 	.long	__irq_svc_default		@  3  (SVC_26 / SVC_32)
+#else
+	.long	__irq_invalid			@  0  (USR_26 / USR_32)
+	.long	__irq_invalid			@  1  (FIQ_26 / FIQ_32)
+	.long	__irq_invalid			@  2  (IRQ_26 / IRQ_32)
+	.long	__irq_invalid			@  3  (SVC_26 / SVC_32)
+#endif
 	.long	__irq_invalid			@  4
 	.long	__irq_invalid			@  5
 	.long	__irq_invalid			@  6

[PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

This patch adds Dynamic IRQ demux support to the
SH-Mobile line of processors. The actual demux code
is implemented in entry-irq-common.S and each INTC
implementation is responsible for registering the
shared demux code using setup_irq_stubs().

Future processors will add a new a IRQ demux instance
and register that from the INTC implementation for
that particular processor.

Tested on sh7372 and AP4EVB.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/Kconfig                                  |    1 
 arch/arm/mach-shmobile/Makefile                   |    1 
 arch/arm/mach-shmobile/entry-irq-common.S         |   38 +++++++++++++++++++++
 arch/arm/mach-shmobile/include/mach/common.h      |    1 
 arch/arm/mach-shmobile/include/mach/entry-macro.S |   17 ---------
 arch/arm/mach-shmobile/intc-sh7367.c              |    4 ++
 arch/arm/mach-shmobile/intc-sh7372.c              |    4 ++
 arch/arm/mach-shmobile/intc-sh7377.c              |    4 ++
 8 files changed, 53 insertions(+), 17 deletions(-)

--- 0008/arch/arm/Kconfig
+++ work/arch/arm/Kconfig	2010-10-06 14:43:07.000000000 +0900
@@ -1377,6 +1377,7 @@ config SPARSE_IRQ
 	  experimental until they have been independently verified.
 
 config DEFAULT_IRQ_DEMUX
+	default n if ARCH_SHMOBILE
 	def_bool y
 
 source "mm/Kconfig"
--- 0001/arch/arm/mach-shmobile/Makefile
+++ work/arch/arm/mach-shmobile/Makefile	2010-10-06 14:36:27.000000000 +0900
@@ -4,6 +4,7 @@
 
 # Common objects
 obj-y				:= timer.o console.o clock.o pm_runtime.o
+obj-y				+= entry-irq-common.o
 
 # CPU objects
 obj-$(CONFIG_ARCH_SH7367)	+= setup-sh7367.o clock-sh7367.o intc-sh7367.o
--- /dev/null
+++ work/arch/arm/mach-shmobile/entry-irq-common.S	2010-10-06 14:38:29.000000000 +0900
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2010 Magnus Damm
+ * Copyright (C) 2008 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+#include <asm/entry-header.S>
+
+	.macro  get_irqnr_preamble, base, tmp
+	ldr     \base, =INTFLGA
+	.endm
+
+	.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+	ldr     \irqnr, [\base]
+	cmp	\irqnr, #0
+	beq	1000f
+	/* intevt to irq number */
+	lsr	\irqnr, \irqnr, #0x5
+	subs	\irqnr, \irqnr, #16
+
+1000:
+	.endm
+
+	__irq_svc shmobile_common
+	__irq_usr shmobile_common
--- 0001/arch/arm/mach-shmobile/include/mach/common.h
+++ work/arch/arm/mach-shmobile/include/mach/common.h	2010-10-06 14:39:29.000000000 +0900
@@ -5,6 +5,7 @@ extern struct sys_timer shmobile_timer;
 extern void shmobile_setup_console(void);
 struct clk;
 extern int clk_init(void);
+extern char __irq_usr_shmobile_common[], __irq_svc_shmobile_common[];
 
 extern void sh7367_init_irq(void);
 extern void sh7367_add_early_devices(void);
--- 0001/arch/arm/mach-shmobile/include/mach/entry-macro.S
+++ work/arch/arm/mach-shmobile/include/mach/entry-macro.S	2010-10-06 14:38:01.000000000 +0900
@@ -14,26 +14,9 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
-#include <mach/hardware.h>
-#include <mach/irqs.h>
 
 	.macro  disable_fiq
 	.endm
 
-	.macro  get_irqnr_preamble, base, tmp
-	ldr     \base, =INTFLGA
-	.endm
-
 	.macro  arch_ret_to_user, tmp1, tmp2
 	.endm
-
-	.macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-	ldr     \irqnr, [\base]
-	cmp	\irqnr, #0
-	beq	1000f
-	/* intevt to irq number */
-	lsr	\irqnr, \irqnr, #0x5
-	subs	\irqnr, \irqnr, #16
-
-1000:
-	.endm
--- 0001/arch/arm/mach-shmobile/intc-sh7367.c
+++ work/arch/arm/mach-shmobile/intc-sh7367.c	2010-10-06 14:44:20.000000000 +0900
@@ -24,6 +24,8 @@
 #include <linux/sh_intc.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/traps.h>
+#include <mach/common.h>
 
 enum {
 	UNUSED_INTCA = 0,
@@ -431,6 +433,8 @@ void __init sh7367_init_irq(void)
 {
 	void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
 
+	setup_irq_stubs(__irq_usr_shmobile_common, __irq_svc_shmobile_common);
+
 	register_intc_controller(&intca_desc);
 	register_intc_controller(&intcs_desc);
 
--- 0001/arch/arm/mach-shmobile/intc-sh7372.c
+++ work/arch/arm/mach-shmobile/intc-sh7372.c	2010-10-06 14:44:09.000000000 +0900
@@ -24,6 +24,8 @@
 #include <linux/sh_intc.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/traps.h>
+#include <mach/common.h>
 
 enum {
 	UNUSED_INTCA = 0,
@@ -580,6 +582,8 @@ void __init sh7372_init_irq(void)
 {
 	void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
 
+	setup_irq_stubs(__irq_usr_shmobile_common, __irq_svc_shmobile_common);
+
 	register_intc_controller(&intca_desc);
 	register_intc_controller(&intcs_desc);
 
--- 0001/arch/arm/mach-shmobile/intc-sh7377.c
+++ work/arch/arm/mach-shmobile/intc-sh7377.c	2010-10-06 14:44:28.000000000 +0900
@@ -24,6 +24,8 @@
 #include <linux/sh_intc.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
+#include <asm/traps.h>
+#include <mach/common.h>
 
 enum {
 	UNUSED_INTCA = 0,
@@ -637,6 +639,8 @@ void __init sh7377_init_irq(void)
 {
 	void __iomem *intevtsa = ioremap_nocache(INTEVTSA, PAGE_SIZE);
 
+	setup_irq_stubs(__irq_usr_shmobile_common, __irq_svc_shmobile_common);
+
 	register_intc_controller(&intca_desc);
 	register_intc_controller(&intcs_desc);
 

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Eric Miao]

On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
> ARM: Dynamic IRQ demux support
>
> [PATCH 01/08] ARM: Move entry-header.S to asm/
> [PATCH 02/08] ARM: Move macros from entry-armv.S
> [PATCH 03/08] ARM: Make alignment_trap macro self-contained
> [PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
> [PATCH 05/08] ARM: Move the unwind header to entry-header.S
> [PATCH 06/08] ARM: Add setup_irq_stubs() function
> [PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
> [PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile
>

Hi Magnus,

Just FYI, I had a patch months ago for this:

http://www.spinics.net/linux/lists/arm-kernel/msg92836.html

Do you think that's a simpler way to go?

> These patches break out the IRQ demux code from entry-armv.S to
> allow multiple IRQ demux instances to coexist. A registration
> function is also added that allows per-mach/plat code to chose
> which IRQ demux instance to register at runtime.
>
> Useful to support the upcoming single-kernel-binary-on-multiple-machines
> _and_ for future SH-Mobile hardware support which will need to tie in
> the GIC in the demux code for some processors.
>
> The existing kernel behaviour remains unchanged as long as the kconfig
> option CONFIG_DEFAULT_IRQ_DEMUX is set to Y.
>
> A single IRQ demuxer instance (on UP) is written like this:
>
> +#include <asm/entry-header.S>
> +
> +       .macro  get_irqnr_preamble, base, tmp
> [blah]
> +       .endm
> +
> +       .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
> [bleh]
> +       .endm
> +
> +       __irq_svc shmobile_common
> +       __irq_usr shmobile_common
>
> The per-mach IRQ setup code then registers whatever demuxing functions
> it requires using:
>
> +       setup_irq_stubs(__irq_usr_shmobile_common, __irq_svc_shmobile_common);
>
> To strip down memory usage the kconfig option CONFIG_DEFAULT_IRQ_DEMUX
> may be set to N to remove the default IRQ demux code. Most macros in
> entry-macro.S will then become unused.
>
> The macros disable_fiq and arch_ret_to_user are kept as-is for now.
>
> Signed-off-by: Magnus Damm <damm@opensource.se>
> ---
>  arch/arm/Kconfig                                  |    4
>  arch/arm/include/asm/entry-header.S               |  417 ++++++++++++++++++++-
>  arch/arm/include/asm/traps.h                      |    1
>  arch/arm/kernel/entry-armv.S                      |  239 ------------
>  arch/arm/kernel/entry-common.S                    |    4
>  arch/arm/kernel/entry-header.S                    |  181 ---------
>  arch/arm/kernel/traps.c                           |   14
>  arch/arm/mach-shmobile/Makefile                   |    1
>  arch/arm/mach-shmobile/entry-irq-common.S         |   38 +
>  arch/arm/mach-shmobile/include/mach/common.h      |    1
>  arch/arm/mach-shmobile/include/mach/entry-macro.S |   17
>  arch/arm/mach-shmobile/intc-sh7367.c              |    4
>  arch/arm/mach-shmobile/intc-sh7372.c              |    4
>  arch/arm/mach-shmobile/intc-sh7377.c              |    4
>  14 files changed, 506 insertions(+), 423 deletions(-)
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Grant Likely]

On Wed, Oct 6, 2010 at 7:06 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> ARM: Dynamic IRQ demux support
>>
>> [PATCH 01/08] ARM: Move entry-header.S to asm/
>> [PATCH 02/08] ARM: Move macros from entry-armv.S
>> [PATCH 03/08] ARM: Make alignment_trap macro self-contained
>> [PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
>> [PATCH 05/08] ARM: Move the unwind header to entry-header.S
>> [PATCH 06/08] ARM: Add setup_irq_stubs() function
>> [PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
>> [PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile
>>
>
> Hi Magnus,
>
> Just FYI, I had a patch months ago for this:
>
> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>
> Do you think that's a simpler way to go?

Speaking of which, what is the status of your patch?  I see you
reposted it on July 13, but I haven't seen any further feedback.

g.

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Eric Miao]

On Wed, Oct 6, 2010 at 10:58 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> On Wed, Oct 6, 2010 at 7:06 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> ARM: Dynamic IRQ demux support
>>>
>>> [PATCH 01/08] ARM: Move entry-header.S to asm/
>>> [PATCH 02/08] ARM: Move macros from entry-armv.S
>>> [PATCH 03/08] ARM: Make alignment_trap macro self-contained
>>> [PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
>>> [PATCH 05/08] ARM: Move the unwind header to entry-header.S
>>> [PATCH 06/08] ARM: Add setup_irq_stubs() function
>>> [PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
>>> [PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile
>>>
>>
>> Hi Magnus,
>>
>> Just FYI, I had a patch months ago for this:
>>
>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>>
>> Do you think that's a simpler way to go?
>
> Speaking of which, what is the status of your patch?  I see you
> reposted it on July 13, but I haven't seen any further feedback.
>

I should have posted it in Russell's patch tracking system, yet not
merged in last cycle.

Russell?

> g.
>

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Eric Miao]

On Wed, Oct 6, 2010 at 11:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> On Wed, Oct 6, 2010 at 10:58 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
>> On Wed, Oct 6, 2010 at 7:06 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>> ARM: Dynamic IRQ demux support
>>>>
>>>> [PATCH 01/08] ARM: Move entry-header.S to asm/
>>>> [PATCH 02/08] ARM: Move macros from entry-armv.S
>>>> [PATCH 03/08] ARM: Make alignment_trap macro self-contained
>>>> [PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
>>>> [PATCH 05/08] ARM: Move the unwind header to entry-header.S
>>>> [PATCH 06/08] ARM: Add setup_irq_stubs() function
>>>> [PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
>>>> [PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile
>>>>
>>>
>>> Hi Magnus,
>>>
>>> Just FYI, I had a patch months ago for this:
>>>
>>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>>>
>>> Do you think that's a simpler way to go?
>>
>> Speaking of which, what is the status of your patch?  I see you
>> reposted it on July 13, but I haven't seen any further feedback.
>>
>
> I should have posted it in Russell's patch tracking system, yet not
> merged in last cycle.
>
> Russell?

Got his wrong email address, now corrected and post again.

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Grant Likely]

On Wed, Oct 6, 2010 at 9:11 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
> On Wed, Oct 6, 2010 at 11:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
>> On Wed, Oct 6, 2010 at 10:58 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
>>> On Wed, Oct 6, 2010 at 7:06 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>>> ARM: Dynamic IRQ demux support
>>>>>
>>>>> [PATCH 01/08] ARM: Move entry-header.S to asm/
>>>>> [PATCH 02/08] ARM: Move macros from entry-armv.S
>>>>> [PATCH 03/08] ARM: Make alignment_trap macro self-contained
>>>>> [PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
>>>>> [PATCH 05/08] ARM: Move the unwind header to entry-header.S
>>>>> [PATCH 06/08] ARM: Add setup_irq_stubs() function
>>>>> [PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
>>>>> [PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile
>>>>>
>>>>
>>>> Hi Magnus,
>>>>
>>>> Just FYI, I had a patch months ago for this:
>>>>
>>>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>>>>
>>>> Do you think that's a simpler way to go?
>>>
>>> Speaking of which, what is the status of your patch?  I see you
>>> reposted it on July 13, but I haven't seen any further feedback.
>>>
>>
>> I should have posted it in Russell's patch tracking system, yet not
>> merged in last cycle.
>>
>> Russell?
>
> Got his wrong email address, now corrected and post again.

If you don't mind, please cc me when you repost.

Thanks,
g.

>



-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Eric Miao]

On Wed, Oct 6, 2010 at 11:26 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> On Wed, Oct 6, 2010 at 9:11 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
>> On Wed, Oct 6, 2010 at 11:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>> On Wed, Oct 6, 2010 at 10:58 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
>>>> On Wed, Oct 6, 2010 at 7:06 AM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>>>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>>>> ARM: Dynamic IRQ demux support
>>>>>>
>>>>>> [PATCH 01/08] ARM: Move entry-header.S to asm/
>>>>>> [PATCH 02/08] ARM: Move macros from entry-armv.S
>>>>>> [PATCH 03/08] ARM: Make alignment_trap macro self-contained
>>>>>> [PATCH 04/08] ARM: Convert __irq_svc and __usr_svc to macros
>>>>>> [PATCH 05/08] ARM: Move the unwind header to entry-header.S
>>>>>> [PATCH 06/08] ARM: Add setup_irq_stubs() function
>>>>>> [PATCH 07/08] ARM: Add CONFIG_DEFAULT_IRQ_DEMUX
>>>>>> [PATCH 08/08] ARM: Dynamic IRQ demux for SH-Mobile
>>>>>>
>>>>>
>>>>> Hi Magnus,
>>>>>
>>>>> Just FYI, I had a patch months ago for this:
>>>>>
>>>>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>>>>>
>>>>> Do you think that's a simpler way to go?
>>>>
>>>> Speaking of which, what is the status of your patch?  I see you
>>>> reposted it on July 13, but I haven't seen any further feedback.
>>>>
>>>
>>> I should have posted it in Russell's patch tracking system, yet not
>>> merged in last cycle.
>>>
>>> Russell?
>>
>> Got his wrong email address, now corrected and post again.
>
> If you don't mind, please cc me when you repost.

No problem.

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Magnus Damm]

Hi Eric,

On Wed, Oct 6, 2010 at 10:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> ARM: Dynamic IRQ demux support

> Just FYI, I had a patch months ago for this:
>
> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>
> Do you think that's a simpler way to go?

Thanks for the pointer. I wasn't aware of your patch, but the fact
that both of us came up with similar solutions to the same problem
clearly shows that there is a need for this feature.

Your patch is much less intrusive compared to what i came up with. I
like the simplicity. I guess it is natural that the simplicity comes
with a bit of overhead. I'm thinking of the extra branches and
whatever potential cache misses coming from the code and callback
being located in different cache lines compared to the rest of the
code in __irq_svc and __irq_usr.

My patches keeps the handlers in the same cache lines as before, but
this comes with the cost of more serious rearrangement of the code.
Also, my alignment_trap patch may decrease performance, not sure how
to deal with that in a good way.

I don't mind so much which patch that gets merged, but I'm a little
bit concerned about code duplication. My patch moves macros into a
header file that each demux instance can make use of to minimize the
amount of duplicated code. I'm not sure how you are planning on
implementing each demux instance. If possible I'd like to see the
irq_handler macro in a header file somewhere so we don't have to
duplicate that code.

On top of that I'd also like to break out the GIC demux code and put
it in a central location, but that's a separate issue.

Any thoughts? Shall I try to move the irq_handler macro to some header file?

Thanks,

/ magnus

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Eric Miao]

On Thu, Oct 7, 2010 at 2:39 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
> Hi Eric,
>
> On Wed, Oct 6, 2010 at 10:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>> ARM: Dynamic IRQ demux support
>
>> Just FYI, I had a patch months ago for this:
>>
>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>>
>> Do you think that's a simpler way to go?
>
> Thanks for the pointer. I wasn't aware of your patch, but the fact
> that both of us came up with similar solutions to the same problem
> clearly shows that there is a need for this feature.
>
> Your patch is much less intrusive compared to what i came up with. I
> like the simplicity. I guess it is natural that the simplicity comes
> with a bit of overhead. I'm thinking of the extra branches and
> whatever potential cache misses coming from the code and callback
> being located in different cache lines compared to the rest of the
> code in __irq_svc and __irq_usr.
>
> My patches keeps the handlers in the same cache lines as before, but
> this comes with the cost of more serious rearrangement of the code.
> Also, my alignment_trap patch may decrease performance, not sure how
> to deal with that in a good way.

Yeah, I was thinking of the performance degradation at that time as well.
What worried me most is actually the long jump. However, we do have
a long jump to asm_do_IRQ anyway.

And the optimizations like get_irqnr_preamble and get_irqnr_and_base
can be carried out in C code as well, or if that's tricky enough, inline
assembly code can also help.

>
> I don't mind so much which patch that gets merged, but I'm a little
> bit concerned about code duplication. My patch moves macros into a
> header file that each demux instance can make use of to minimize the
> amount of duplicated code. I'm not sure how you are planning on
> implementing each demux instance. If possible I'd like to see the
> irq_handler macro in a header file somewhere so we don't have to
> duplicate that code.

Machines will have to specify their IRQ demux handler, which could be
same among a group of machines which share common demux code, and
thus duplication can be avoided.

>
> On top of that I'd also like to break out the GIC demux code and put
> it in a central location, but that's a separate issue.

I think we can make a common function call for all the IRQ demux handler
for GIC then.

>
> Any thoughts? Shall I try to move the irq_handler macro to some header file?
>

Your patch is excellent, I don't mind either which gets in. What I'm a
bit concerned is the effort to keep up with the mostly optimized code.
I was thinking of a bit (not that much significant I guess) performance loss
when multiple IRQ demux handler is required for the sake of simplicity
and less intrusiveness, while still able to use the original optimized path
when that's not required (i.e. turning CONFIG_.... off).

Thoughts?

> Thanks,
>
> / magnus
>

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Magnus Damm]

On Fri, Oct 8, 2010 at 4:09 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> On Thu, Oct 7, 2010 at 2:39 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> On Wed, Oct 6, 2010 at 10:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
>>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
>>>> ARM: Dynamic IRQ demux support
>>
>>> Just FYI, I had a patch months ago for this:
>>>
>>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
>>>
>>> Do you think that's a simpler way to go?
>>
>> Thanks for the pointer. I wasn't aware of your patch, but the fact
>> that both of us came up with similar solutions to the same problem
>> clearly shows that there is a need for this feature.
>>
>> Your patch is much less intrusive compared to what i came up with. I
>> like the simplicity. I guess it is natural that the simplicity comes
>> with a bit of overhead. I'm thinking of the extra branches and
>> whatever potential cache misses coming from the code and callback
>> being located in different cache lines compared to the rest of the
>> code in __irq_svc and __irq_usr.
>>
>> My patches keeps the handlers in the same cache lines as before, but
>> this comes with the cost of more serious rearrangement of the code.
>> Also, my alignment_trap patch may decrease performance, not sure how
>> to deal with that in a good way.
>
> Yeah, I was thinking of the performance degradation at that time as well.
> What worried me most is actually the long jump. However, we do have
> a long jump to asm_do_IRQ anyway.
>
> And the optimizations like get_irqnr_preamble and get_irqnr_and_base
> can be carried out in C code as well, or if that's tricky enough, inline
> assembly code can also help.

Sure, I agree.

>> I don't mind so much which patch that gets merged, but I'm a little
>> bit concerned about code duplication. My patch moves macros into a
>> header file that each demux instance can make use of to minimize the
>> amount of duplicated code. I'm not sure how you are planning on
>> implementing each demux instance. If possible I'd like to see the
>> irq_handler macro in a header file somewhere so we don't have to
>> duplicate that code.
>
> Machines will have to specify their IRQ demux handler, which could be
> same among a group of machines which share common demux code, and
> thus duplication can be avoided.

Right, I agree. I'm thinking of SMP-specific interrupts for IPIs and
local timers that most likely want to be shared across multiple
machines. I can for instance imagine a wide range of Cortex-A9 based
SoCs that all need to deal with SMP interrupts.

>> On top of that I'd also like to break out the GIC demux code and put
>> it in a central location, but that's a separate issue.
>
> I think we can make a common function call for all the IRQ demux handler
> for GIC then.

Sure, as long as we can point out the SoC-specific base address then
we should be ok.

>> Any thoughts? Shall I try to move the irq_handler macro to some header file?
>>
>
> Your patch is excellent, I don't mind either which gets in. What I'm a
> bit concerned is the effort to keep up with the mostly optimized code.
> I was thinking of a bit (not that much significant I guess) performance loss
> when multiple IRQ demux handler is required for the sake of simplicity
> and less intrusiveness, while still able to use the original optimized path
> when that's not required (i.e. turning CONFIG_.... off).
>
> Thoughts?

I feel that the current abstraction with the macros in entry-macros.S
is pretty nice and familiar. I think your solution with abstracting at
the irq_handler level is simple from the mach-programmers point of
view, but it does come with some performance penalty. I'm also not so
sure how to deal with the code duplication. Like you say, the code
could be shared between machines, but exactly how I don't know.

Did you hear anything back from Russell? If he's ok with your patch
then problem solved. Perhaps it's already in the tracker? =)

If not, how about picking out the best part of our patches? I think my
main benefit is the performance - hooking in the per-mach handlers
below the vector_stub comes with little or no additional cost. Your
strength is the simplicity and the nice use of the machine_desc.
Perhaps we can put the __irq_usr and __irq_svc callbacks in struct
machine_desc?

Does anyone else care? =)

Cheers,

/ magnus

Re: [PATCH 00/08] ARM: Dynamic IRQ demux support

[Grant Likely]

On Thu, Oct 14, 2010 at 07:50:28PM +0900, Magnus Damm wrote:
> On Fri, Oct 8, 2010 at 4:09 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> > On Thu, Oct 7, 2010 at 2:39 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
> >> On Wed, Oct 6, 2010 at 10:06 PM, Eric Miao <eric.y.miao@gmail.com> wrote:
> >>> On Wed, Oct 6, 2010 at 3:17 PM, Magnus Damm <magnus.damm@gmail.com> wrote:
> >>>> ARM: Dynamic IRQ demux support
> >>
> >>> Just FYI, I had a patch months ago for this:
> >>>
> >>> http://www.spinics.net/linux/lists/arm-kernel/msg92836.html
> >>>
> >>> Do you think that's a simpler way to go?
> >>
> >> Thanks for the pointer. I wasn't aware of your patch, but the fact
> >> that both of us came up with similar solutions to the same problem
> >> clearly shows that there is a need for this feature.
> >>
> >> Your patch is much less intrusive compared to what i came up with. I
> >> like the simplicity. I guess it is natural that the simplicity comes
> >> with a bit of overhead. I'm thinking of the extra branches and
> >> whatever potential cache misses coming from the code and callback
> >> being located in different cache lines compared to the rest of the
> >> code in __irq_svc and __irq_usr.
> >>
> >> My patches keeps the handlers in the same cache lines as before, but
> >> this comes with the cost of more serious rearrangement of the code.
> >> Also, my alignment_trap patch may decrease performance, not sure how
> >> to deal with that in a good way.
> >
> > Yeah, I was thinking of the performance degradation at that time as well.
> > What worried me most is actually the long jump. However, we do have
> > a long jump to asm_do_IRQ anyway.
> >
> > And the optimizations like get_irqnr_preamble and get_irqnr_and_base
> > can be carried out in C code as well, or if that's tricky enough, inline
> > assembly code can also help.
> 
> Sure, I agree.
> 
> >> I don't mind so much which patch that gets merged, but I'm a little
> >> bit concerned about code duplication. My patch moves macros into a
> >> header file that each demux instance can make use of to minimize the
> >> amount of duplicated code. I'm not sure how you are planning on
> >> implementing each demux instance. If possible I'd like to see the
> >> irq_handler macro in a header file somewhere so we don't have to
> >> duplicate that code.
> >
> > Machines will have to specify their IRQ demux handler, which could be
> > same among a group of machines which share common demux code, and
> > thus duplication can be avoided.
> 
> Right, I agree. I'm thinking of SMP-specific interrupts for IPIs and
> local timers that most likely want to be shared across multiple
> machines. I can for instance imagine a wide range of Cortex-A9 based
> SoCs that all need to deal with SMP interrupts.
> 
> >> On top of that I'd also like to break out the GIC demux code and put
> >> it in a central location, but that's a separate issue.
> >
> > I think we can make a common function call for all the IRQ demux handler
> > for GIC then.
> 
> Sure, as long as we can point out the SoC-specific base address then
> we should be ok.
> 
> >> Any thoughts? Shall I try to move the irq_handler macro to some header file?
> >>
> >
> > Your patch is excellent, I don't mind either which gets in. What I'm a
> > bit concerned is the effort to keep up with the mostly optimized code.
> > I was thinking of a bit (not that much significant I guess) performance loss
> > when multiple IRQ demux handler is required for the sake of simplicity
> > and less intrusiveness, while still able to use the original optimized path
> > when that's not required (i.e. turning CONFIG_.... off).
> >
> > Thoughts?
> 
> I feel that the current abstraction with the macros in entry-macros.S
> is pretty nice and familiar. I think your solution with abstracting at
> the irq_handler level is simple from the mach-programmers point of
> view, but it does come with some performance penalty. I'm also not so
> sure how to deal with the code duplication. Like you say, the code
> could be shared between machines, but exactly how I don't know.
> 
> Did you hear anything back from Russell? If he's ok with your patch
> then problem solved. Perhaps it's already in the tracker? =)
> 
> If not, how about picking out the best part of our patches? I think my
> main benefit is the performance - hooking in the per-mach handlers
> below the vector_stub comes with little or no additional cost. Your
> strength is the simplicity and the nice use of the machine_desc.
> Perhaps we can put the __irq_usr and __irq_svc callbacks in struct
> machine_desc?
> 
> Does anyone else care? =)

I care, but I haven't been able to dig into the details.  The way
things are going, I probably won't be able to either until after Linux
Plumbers is over.

g.