[PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for KEYSC

[PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for KEYSC

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Fix the sh73a0 KEYSC clock control by adding MSTP403
to mstp_clks[]. Use KEYSC instead of KEYSC0 in comments.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/mach-shmobile/clock-sh73a0.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--- 0005/arch/arm/mach-shmobile/clock-sh73a0.c
+++ work/arch/arm/mach-shmobile/clock-sh73a0.c	2010-12-22 15:03:26.000000000 +0900
@@ -282,6 +282,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
 	[MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */
 	[MSTP410] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 10, 0), /* IIC4 */
+	[MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
 };
 
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
@@ -309,7 +310,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
 	CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
 	CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */
-	CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC0 */
+	CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
 };
 
 void __init sh73a0_clock_init(void)

Re: [PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for KEYSC

[Paul Mundt]

On Wed, Dec 22, 2010 at 03:14:05PM +0900, Magnus Damm wrote:
> Fix the sh73a0 KEYSC clock control by adding MSTP403
> to mstp_clks[]. Use KEYSC instead of KEYSC0 in comments.

On Wed, Dec 22, 2010 at 03:26:06PM +0900, Magnus Damm wrote:
> On SH-Mobile, Pull UP/Downs can be controlled independently
> from Function selectors (by lower nibble of PFCR).
> It means people may want to use GPIO_FN_xxx_PU/PD in addition
> to GPIO_IN_PU/PD which is currently supported.
> This patch adds pull-up version for some input signals on
> KEYSC, MMC, FSIA as well as SDHI1.

On Wed, Dec 22, 2010 at 03:30:19PM +0900, Magnus Damm wrote:
> Follow up to pfc-sh73a0.c's pull-up support.
> Change GPIO_FN_KEYINx to GPIO_FN_KEYINx_PU.

On Wed, Dec 22, 2010 at 03:35:30PM +0900, Magnus Damm wrote:
> Adding platform resources, PFC setting and release
> reset pin for eMMC on ag5evm.

Applied to rmobile-latest, thanks.

[PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for IrDA MSTP

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Fix a typo for the sh73a0 CPGA code dealing with the IrDA
hardware block on the AG5EVM board.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/mach-shmobile/clock-sh73a0.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- 0001/arch/arm/mach-shmobile/clock-sh73a0.c
+++ work/arch/arm/mach-shmobile/clock-sh73a0.c	2011-01-18 17:44:58.000000000 +0900
@@ -279,7 +279,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
 	[MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
 	[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
-	[MSTP325] = MSTP(&div4_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
+	[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
 	[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
 	[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
 	[MSTP411] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 11, 0), /* IIC3 */

[PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for FRQCRA M3

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Fix the M3 field offset for the FRQCRA register
in the sh73a0 CPGA. It should be 12, not 8.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/mach-shmobile/clock-sh73a0.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- 0004/arch/arm/mach-shmobile/clock-sh73a0.c
+++ work/arch/arm/mach-shmobile/clock-sh73a0.c	2011-01-18 17:49:22.000000000 +0900
@@ -212,7 +212,7 @@ enum { DIV4_I, DIV4_ZG, DIV4_M3, DIV4_B,
 static struct clk div4_clks[DIV4_NR] = {
 	[DIV4_I] = DIV4(FRQCRA, 20, 0xfff, CLK_ENABLE_ON_INIT),
 	[DIV4_ZG] = DIV4(FRQCRA, 16, 0xbff, CLK_ENABLE_ON_INIT),
-	[DIV4_M3] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
+	[DIV4_M3] = DIV4(FRQCRA, 12, 0xfff, CLK_ENABLE_ON_INIT),
 	[DIV4_B] = DIV4(FRQCRA, 8, 0xfff, CLK_ENABLE_ON_INIT),
 	[DIV4_M1] = DIV4(FRQCRA, 4, 0xfff, 0),
 	[DIV4_M2] = DIV4(FRQCRA, 0, 0xfff, 0),

Re: [PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for IrDA MSTP

[Paul Mundt]

On Tue, Jan 18, 2011 at 05:48:17PM +0900, Magnus Damm wrote:
> Fix a typo for the sh73a0 CPGA code dealing with the IrDA
> hardware block on the AG5EVM board.

On Tue, Jan 18, 2011 at 05:53:06PM +0900, Magnus Damm wrote:
> Fix the M3 field offset for the FRQCRA register
> in the sh73a0 CPGA. It should be 12, not 8.

Applied, thanks.

[PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for PLL CFG bit

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

PLL1 and PLL2 in the sh73a0 CPGA has a CFG bit that
must be taken into account to correctly calculate the
frequency.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 arch/arm/mach-shmobile/clock-sh73a0.c |   10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

--- 0001/arch/arm/mach-shmobile/clock-sh73a0.c
+++ work/arch/arm/mach-shmobile/clock-sh73a0.c	2011-01-20 15:23:06.000000000 +0900
@@ -118,8 +118,16 @@ static unsigned long pll_recalc(struct c
 {
 	unsigned long mult = 1;
 
-	if (__raw_readl(PLLECR) & (1 << clk->enable_bit))
+	if (__raw_readl(PLLECR) & (1 << clk->enable_bit)) {
 		mult = (((__raw_readl(clk->enable_reg) >> 24) & 0x3f) + 1);
+		/* handle CFG bit for PLL1 and PLL2 */
+		switch (clk->enable_bit) {
+		case 1:
+		case 2:
+			if (__raw_readl(clk->enable_reg) & (1 << 20))
+				mult *= 2;
+		}
+	}
 
 	return clk->parent->rate * mult;
 }

Re: [PATCH] ARM: mach-shmobile: sh73a0 CPGA fix for PLL CFG bit

[Paul Mundt]

On Thu, Jan 20, 2011 at 05:11:11PM +0900, Magnus Damm wrote:
> PLL1 and PLL2 in the sh73a0 CPGA has a CFG bit that
> must be taken into account to correctly calculate the
> frequency.

On Thu, Jan 20, 2011 at 05:41:03PM +0900, Magnus Damm wrote:
> Add platform data for MIPI-DSI and LCDC on the AG5EVM
> board. The sh73a0 clkdev bindings are also updated.

Applied, thanks.