[PATCH] drivers: sh: resume enabled clocks fix

[PATCH] drivers: sh: resume enabled clocks fix

[Magnus Damm]

From: Magnus Damm <damm@opensource.se>

Extend the SH / SH-Mobile ARM clock framework to only
resume clocks that has been enabled.

Without this fix divide-by-zero is triggering on sh7372
FSIDIV during system wide resume of Suspend-to-RAM.

Signed-off-by: Magnus Damm <damm@opensource.se>
---

 This is a rewrite of the patch recently posted as:
 "[PATCH] ARM: mach-shmobile: sh7372 divide-by-zero FSIDIV fix"

 drivers/sh/clk/core.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- 0001/drivers/sh/clk/core.c
+++ work/drivers/sh/clk/core.c	2011-06-13 13:32:10.000000000 +0900
@@ -635,7 +635,7 @@ static void clks_core_resume(void)
 	struct clk *clkp;
 
 	list_for_each_entry(clkp, &clock_list, node) {
-		if (likely(clkp->ops)) {
+		if (likely(clkp->usecount && clkp->ops)) {
 			unsigned long rate = clkp->rate;
 
 			if (likely(clkp->ops->set_parent))

Re: [PATCH] drivers: sh: resume enabled clocks fix

[Simon Horman]

On Mon, Jun 13, 2011 at 01:42:15PM +0900, Magnus Damm wrote:
> From: Magnus Damm <damm@opensource.se>
> 
> Extend the SH / SH-Mobile ARM clock framework to only
> resume clocks that has been enabled.
> 
> Without this fix divide-by-zero is triggering on sh7372
> FSIDIV during system wide resume of Suspend-to-RAM.
> 
> Signed-off-by: Magnus Damm <damm@opensource.se>
> ---
> 
>  This is a rewrite of the patch recently posted as:
>  "[PATCH] ARM: mach-shmobile: sh7372 divide-by-zero FSIDIV fix"
> 
>  drivers/sh/clk/core.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

I much prefer this to the approach that was in
"[PATCH] ARM: mach-shmobile: sh7372 divide-by-zero FSIDIV fix".

Reviewed-by: Simon Horman <horms@verge.net.au>

> 
> --- 0001/drivers/sh/clk/core.c
> +++ work/drivers/sh/clk/core.c	2011-06-13 13:32:10.000000000 +0900
> @@ -635,7 +635,7 @@ static void clks_core_resume(void)
>  	struct clk *clkp;
>  
>  	list_for_each_entry(clkp, &clock_list, node) {
> -		if (likely(clkp->ops)) {
> +		if (likely(clkp->usecount && clkp->ops)) {
>  			unsigned long rate = clkp->rate;
>  
>  			if (likely(clkp->ops->set_parent))
> --
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