[PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Kuninori Morimoto]

Hi Rafael
Cc Simon, Magnus

These are KZM9G SMP support patches

Kuninori Morimoto (2):
      mach-shmobile: sh73a0 SMP TWD boot regression fix
      ARM: mach-shmobile: kzm9g: enable SMP boot

These are based on Magnus's patches.
      mach-shmobile: Invalidate caches when booting secondary cores
      mach-shmobile: r8a7779 SMP TWD boot regression fix


Best regards
---
Kuninori Morimoto

Re: [PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Simon Horman]

On Thu, May 10, 2012 at 12:09:42AM -0700, Kuninori Morimoto wrote:
> 
> Hi Rafael
> Cc Simon, Magnus
> 
> These are KZM9G SMP support patches
> 
> Kuninori Morimoto (2):
>       mach-shmobile: sh73a0 SMP TWD boot regression fix
>       ARM: mach-shmobile: kzm9g: enable SMP boot
> 
> These are based on Magnus's patches.
>       mach-shmobile: Invalidate caches when booting secondary cores
>       mach-shmobile: r8a7779 SMP TWD boot regression fix

Hi Morimoto-san,

I am having a little trouble with SMP on the kzm9g.  I am using Rafael's
renesas/next branch (5658c94), which includes all the patches above. The
only local change I have is to add KZM-A9-GT to mach-types. Perhaps I need
some other patches?


Using the default config I do get a prompt, but I see the following along
the way, multiple times.

intc: Registered controller 'sh73a0-intcs' with 77 IRQs
intc: Registered controller 'sh73a0-intca-irq-pins' with 32 IRQs
intc: Registered controller 'sh73a0-pint0' with 32 IRQs
intc: Registered controller 'sh73a0-pint1' with 8 IRQs
------------[ cut here ]------------
WARNING: at arch/arm/mach-shmobile/intc-sh73a0.c:450 sh73a0_init_irq+0x10c/0x1d0()
Modules linked in:
Backtrace: 
[<c0012768>] (dump_backtrace+0x0/0x110) from [<c02cf524>] (dump_stack+0x18/0x1c) r7:00000009 r6:000001c2 r5:c0394620 r4:00000000
[<c02cf50c>] (dump_stack+0x0/0x1c) from [<c001c9f0>] (warn_slowpath_common+0x54/0x6c)
[<c001c99c>] (warn_slowpath_common+0x0/0x6c) from [<c001ca2c>] (warn_slowpath_null+0x24/0x2c) r9:412fc098 r8:c0350121 r7:00000000 r6:c03e7128 r5:00000320 r4:00000011
[<c001ca08>] (warn_slowpath_null+0x0/0x2c) from [<c0394620>] (sh73a0_init_irq+0x10c/0x1d0)
[<c0394514>] (sh73a0_init_irq+0x0/0x1d0) from [<c039061c>] (init_IRQ+0x1c/0x24)
[<c0390600>] (init_IRQ+0x0/0x24) from [<c038f828>] (start_kernel+0x198/0x2ac)
[<c038f690>] (start_kernel+0x0/0x2ac) from [<41008040>] (0x41008040) r8:4100406a r7:c03c1b24 r6:c03aaa44 r5:c03be47c r4:10c5387d
---[ end trace 1b75b31a2719ed1c ]---
------------[ cut here ]------------

Re: [PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Kuninori Morimoto]

Hi Simon, and Magnus

Thank you for checking, but...

> I am having a little trouble with SMP on the kzm9g.  I am using Rafael's
> renesas/next branch (5658c94), which includes all the patches above. The
> only local change I have is to add KZM-A9-GT to mach-types. Perhaps I need
> some other patches?
> 
> 
> Using the default config I do get a prompt, but I see the following along
> the way, multiple times.
> 
> intc: Registered controller 'sh73a0-intcs' with 77 IRQs
> intc: Registered controller 'sh73a0-intca-irq-pins' with 32 IRQs
> intc: Registered controller 'sh73a0-pint0' with 32 IRQs
> intc: Registered controller 'sh73a0-pint1' with 8 IRQs
> ------------[ cut here ]------------
> WARNING: at arch/arm/mach-shmobile/intc-sh73a0.c:450 sh73a0_init_irq+0x10c/0x1d0()
> Modules linked in:
> Backtrace: 
> [<c0012768>] (dump_backtrace+0x0/0x110) from [<c02cf524>] (dump_stack+0x18/0x1c) r7:00000009 r6:000001c2 r5:c0394620 r4:00000000
> [<c02cf50c>] (dump_stack+0x0/0x1c) from [<c001c9f0>] (warn_slowpath_common+0x54/0x6c)
> [<c001c99c>] (warn_slowpath_common+0x0/0x6c) from [<c001ca2c>] (warn_slowpath_null+0x24/0x2c) r9:412fc098 r8:c0350121 r7:00000000 r6:c03e7128 r5:00000320 r4:00000011
> [<c001ca08>] (warn_slowpath_null+0x0/0x2c) from [<c0394620>] (sh73a0_init_irq+0x10c/0x1d0)
> [<c0394514>] (sh73a0_init_irq+0x0/0x1d0) from [<c039061c>] (init_IRQ+0x1c/0x24)
> [<c0390600>] (init_IRQ+0x0/0x24) from [<c038f828>] (start_kernel+0x198/0x2ac)
> [<c038f690>] (start_kernel+0x0/0x2ac) from [<41008040>] (0x41008040) r8:4100406a r7:c03c1b24 r6:c03aaa44 r5:c03be47c r4:10c5387d
> ---[ end trace 1b75b31a2719ed1c ]---
> ------------[ cut here ]------------

This WARNING happen from this patch.

--------------------------------------------------
commit e2c31b3fdd48274e9deb450e21279e54dfa02ccd
Author: Magnus Damm <damm@opensource.se>
Date:   Tue Jan 17 20:10:49 2012 +0900

    ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix
--------------------------------------------------

It seems interrupt numbering issue.
intc_pint0_desc and IRQ17 - IRQ31 are using same irq number.
Magnus, how to solve this issue ?

Best regards
---
Kuninori Morimoto

Re: [PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Magnus Damm]

On Tue, May 15, 2012 at 10:33 AM, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
>
> Hi Simon, and Magnus
>
> Thank you for checking, but...
>
>> I am having a little trouble with SMP on the kzm9g.  I am using Rafael's
>> renesas/next branch (5658c94), which includes all the patches above. The
>> only local change I have is to add KZM-A9-GT to mach-types. Perhaps I need
>> some other patches?
>>
>>
>> Using the default config I do get a prompt, but I see the following along
>> the way, multiple times.
>>
>> intc: Registered controller 'sh73a0-intcs' with 77 IRQs
>> intc: Registered controller 'sh73a0-intca-irq-pins' with 32 IRQs
>> intc: Registered controller 'sh73a0-pint0' with 32 IRQs
>> intc: Registered controller 'sh73a0-pint1' with 8 IRQs
>> ------------[ cut here ]------------
>> WARNING: at arch/arm/mach-shmobile/intc-sh73a0.c:450 sh73a0_init_irq+0x10c/0x1d0()
>> Modules linked in:
>> Backtrace:
>> [<c0012768>] (dump_backtrace+0x0/0x110) from [<c02cf524>] (dump_stack+0x18/0x1c) r7:00000009 r6:000001c2 r5:c0394620 r4:00000000
>> [<c02cf50c>] (dump_stack+0x0/0x1c) from [<c001c9f0>] (warn_slowpath_common+0x54/0x6c)
>> [<c001c99c>] (warn_slowpath_common+0x0/0x6c) from [<c001ca2c>] (warn_slowpath_null+0x24/0x2c) r9:412fc098 r8:c0350121 r7:00000000 r6:c03e7128 r5:00000320 r4:00000011
>> [<c001ca08>] (warn_slowpath_null+0x0/0x2c) from [<c0394620>] (sh73a0_init_irq+0x10c/0x1d0)
>> [<c0394514>] (sh73a0_init_irq+0x0/0x1d0) from [<c039061c>] (init_IRQ+0x1c/0x24)
>> [<c0390600>] (init_IRQ+0x0/0x24) from [<c038f828>] (start_kernel+0x198/0x2ac)
>> [<c038f690>] (start_kernel+0x0/0x2ac) from [<41008040>] (0x41008040) r8:4100406a r7:c03c1b24 r6:c03aaa44 r5:c03be47c r4:10c5387d
>> ---[ end trace 1b75b31a2719ed1c ]---
>> ------------[ cut here ]------------
>
> This WARNING happen from this patch.
>
> --------------------------------------------------
> commit e2c31b3fdd48274e9deb450e21279e54dfa02ccd
> Author: Magnus Damm <damm@opensource.se>
> Date:   Tue Jan 17 20:10:49 2012 +0900
>
>    ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix
> --------------------------------------------------
>
> It seems interrupt numbering issue.
> intc_pint0_desc and IRQ17 - IRQ31 are using same irq number.
> Magnus, how to solve this issue ?

I'm not sure which way is best right now, but can you please try to
fix it yourself? Take a piece of paper, write down the IRQ ranges that
are being used by Linux. If there are any collision then please try to
use some unused area.

Thank you!

/ magnus

Re: [PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Kuninori Morimoto]

Hi Magnus, Simon

> > --------------------------------------------------
> > commit e2c31b3fdd48274e9deb450e21279e54dfa02ccd
> > Author: Magnus Damm <damm@opensource.se>
> > Date:   Tue Jan 17 20:10:49 2012 +0900
> >
> >    ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix
> > --------------------------------------------------
> >
> > It seems interrupt numbering issue.
> > intc_pint0_desc and IRQ17 - IRQ31 are using same irq number.
> > Magnus, how to solve this issue ?
> 
> I'm not sure which way is best right now, but can you please try to
> fix it yourself? Take a piece of paper, write down the IRQ ranges that
> are being used by Linux. If there are any collision then please try to
> use some unused area.

I checked again this issue

At first, below patch modify INTCS_VECT_BASE from 0x2200 to 0x3400.
Then, IRQ16-IRQ31 interrupt number will be 800.

--------------------------------------------------------
commit 1ee8299a9ec1ce5137a044c7768293007b9a3267
Author: Magnus Damm <damm@opensource.se>
Date:   Wed Mar 28 19:22:54 2012 +0900

    ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
    
    Update mach-shmobile to use 0x3400 as INTCS_VECT_BASE.
--------------------------------------------------------

And, below patch modify PINT IRQ base nuber from 768 to 800.
Then, conflict happen around 800.

--------------------------------------------------------
commit 0df1a838d678fc6ab49f983a19e905f6a42297a0
Author: Magnus Damm <damm@opensource.se>
Date:   Tue Jan 17 20:05:40 2012 +0900

    ARM: mach-shmobile: sh73a0 PINT IRQ base fix
    
    Bump up the sh73a0 PINT IRQ base from 768 to 800 to avoid
    collision with INTCS vectors for IRQ16->IRQ32 at 0x3xxx.
--------------------------------------------------------

If I revert 1ee8299a9ec1ce5137a044c7768293007b9a3267 commit,
or, if I added this patch, it start works without WARNING.

---------------------------
diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobi
index ac75857..a418518 100644
--- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
@@ -519,7 +519,7 @@ enum {
 };
 
 /* PINT interrupts are located at Linux IRQ 800 and up */
-#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
-#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
+#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
+#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
 
 #endif /* __ASM_SH73A0_H__ */
---------------------------


Best regards
---
Kuninori Morimoto

Re: [PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Rafael J. Wysocki]

On Tuesday, May 15, 2012, Kuninori Morimoto wrote:
> 
> Hi Magnus, Simon
> 
> > > --------------------------------------------------
> > > commit e2c31b3fdd48274e9deb450e21279e54dfa02ccd
> > > Author: Magnus Damm <damm@opensource.se>
> > > Date:   Tue Jan 17 20:10:49 2012 +0900
> > >
> > >    ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix
> > > --------------------------------------------------
> > >
> > > It seems interrupt numbering issue.
> > > intc_pint0_desc and IRQ17 - IRQ31 are using same irq number.
> > > Magnus, how to solve this issue ?
> > 
> > I'm not sure which way is best right now, but can you please try to
> > fix it yourself? Take a piece of paper, write down the IRQ ranges that
> > are being used by Linux. If there are any collision then please try to
> > use some unused area.
> 
> I checked again this issue
> 
> At first, below patch modify INTCS_VECT_BASE from 0x2200 to 0x3400.
> Then, IRQ16-IRQ31 interrupt number will be 800.
> 
> --------------------------------------------------------
> commit 1ee8299a9ec1ce5137a044c7768293007b9a3267
> Author: Magnus Damm <damm@opensource.se>
> Date:   Wed Mar 28 19:22:54 2012 +0900
> 
>     ARM: mach-shmobile: Use 0x3400 as INTCS vector offset
>     
>     Update mach-shmobile to use 0x3400 as INTCS_VECT_BASE.
> --------------------------------------------------------
> 
> And, below patch modify PINT IRQ base nuber from 768 to 800.
> Then, conflict happen around 800.
> 
> --------------------------------------------------------
> commit 0df1a838d678fc6ab49f983a19e905f6a42297a0
> Author: Magnus Damm <damm@opensource.se>
> Date:   Tue Jan 17 20:05:40 2012 +0900
> 
>     ARM: mach-shmobile: sh73a0 PINT IRQ base fix
>     
>     Bump up the sh73a0 PINT IRQ base from 768 to 800 to avoid
>     collision with INTCS vectors for IRQ16->IRQ32 at 0x3xxx.
> --------------------------------------------------------
> 
> If I revert 1ee8299a9ec1ce5137a044c7768293007b9a3267 commit,
> or, if I added this patch, it start works without WARNING.

Can you repost the patch below with a changelog, please?

Rafael


> ---------------------------
> diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobi
> index ac75857..a418518 100644
> --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
> +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
> @@ -519,7 +519,7 @@ enum {
>  };
>  
>  /* PINT interrupts are located at Linux IRQ 800 and up */
> -#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
> -#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
> +#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
> +#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
>  
>  #endif /* __ASM_SH73A0_H__ */
> ---------------------------
> 
> 
> Best regards
> ---
> Kuninori Morimoto
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> 
> 

Re: [PATCH 0/2] ARM: mach-shmobile: KZM9G SMP support

[Magnus Damm]

Hi Morimoto-san,

On Tue, May 15, 2012 at 6:25 PM, Kuninori Morimoto
<kuninori.morimoto.gx@renesas.com> wrote:
>
> Hi Magnus, Simon
>
>> > --------------------------------------------------
>> > commit e2c31b3fdd48274e9deb450e21279e54dfa02ccd
>> > Author: Magnus Damm <damm@opensource.se>
>> > Date:   Tue Jan 17 20:10:49 2012 +0900
>> >
>> >    ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix
>> > --------------------------------------------------
>> >
>> > It seems interrupt numbering issue.
>> > intc_pint0_desc and IRQ17 - IRQ31 are using same irq number.
>> > Magnus, how to solve this issue ?
>>
>> I'm not sure which way is best right now, but can you please try to
>> fix it yourself? Take a piece of paper, write down the IRQ ranges that
>> are being used by Linux. If there are any collision then please try to
>> use some unused area.
>
> I checked again this issue

Thank you!

> At first, below patch modify INTCS_VECT_BASE from 0x2200 to 0x3400.
> Then, IRQ16-IRQ31 interrupt number will be 800.
>
> --------------------------------------------------------
> commit 1ee8299a9ec1ce5137a044c7768293007b9a3267
> Author: Magnus Damm <damm@opensource.se>
> Date:   Wed Mar 28 19:22:54 2012 +0900
>
>    ARM: mach-shmobile: Use 0x3400 as INTCS vector offset

Ok, this patch is included in linux-next. It is most likely the cause
of the problem.

> And, below patch modify PINT IRQ base nuber from 768 to 800.
> Then, conflict happen around 800.
>
> --------------------------------------------------------
> commit 0df1a838d678fc6ab49f983a19e905f6a42297a0
> Author: Magnus Damm <damm@opensource.se>
> Date:   Tue Jan 17 20:05:40 2012 +0900
>
>    ARM: mach-shmobile: sh73a0 PINT IRQ base fix

I agree with your observation.

> If I revert 1ee8299a9ec1ce5137a044c7768293007b9a3267 commit,
> or, if I added this patch, it start works without WARNING.
>
> ---------------------------
> diff --git a/arch/arm/mach-shmobile/include/mach/sh73a0.h b/arch/arm/mach-shmobi
> index ac75857..a418518 100644
> --- a/arch/arm/mach-shmobile/include/mach/sh73a0.h
> +++ b/arch/arm/mach-shmobile/include/mach/sh73a0.h
> @@ -519,7 +519,7 @@ enum {
>  };
>
>  /* PINT interrupts are located at Linux IRQ 800 and up */
> -#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
> -#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
> +#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
> +#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)

So the patch "ARM: mach-shmobile: Use 0x3400 as INTCS vector offset"
moves up INTCS from 0x2200 to 0x3400. It is interesting that you
decide to move the PINT interrupts down instead of up, but perhaps you
are hitting the ceiling.

By the way, did you find the special sh73a0 IRQ handling code using
INTCS_VECT_RELOC() in intc-sh73a0.c? It is using 0x3400 + 0x1000 as
base.

In general I'm fine with your change since you say that you've tested
the code, but please remember to also adjust the comment so it stays
in sync with the code.

Can you please update and send a new patch to the mailing list?

Thank you!

/ magnus