From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andi Kleen Date: Mon, 13 Aug 2012 16:27:53 +0000 Subject: Re: [PATCH v2 4/6] x86: Add clear_page_nocache Message-Id: <20120813162753.GM2644@tassilo.jf.intel.com> List-Id: References: <1344524583-1096-1-git-send-email-kirill.shutemov@linux.intel.com> <1344524583-1096-5-git-send-email-kirill.shutemov@linux.intel.com> <5023F1BC0200007800093EF0@nat28.tlf.novell.com> <20120813114334.GA21855@otc-wbsnb-06> In-Reply-To: <20120813114334.GA21855@otc-wbsnb-06> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: "Kirill A. Shutemov" Cc: Jan Beulich , Andy Lutomirski , Robert Richter , Johannes Weiner , Hugh Dickins , Alex Shi , KAMEZAWA Hiroyuki , x86@kernel.org, linux-mm@kvack.org, Thomas Gleixner , Andrew Morton , linux-mips@linux-mips.org, Tim Chen , linuxppc-dev@lists.ozlabs.org, Andrea Arcangeli , Ingo Molnar , Mel Gorman , linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, "H. Peter Anvin" > Moving 64 bytes per cycle is faster on Sandy Bridge, but slower on > Westmere. Any preference? ;) You have to be careful with these benchmarks. - You need to make sure the data is cache cold, cache hot is misleading. - The numbers can change if you have multiple CPUs doing this in parallel. -Andi