From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Date: Tue, 11 Dec 2012 17:47:05 +0000 Subject: Re: [RFC PATCH v2 3/5] ARM: kernel: update cpu_suspend code to use cache LoUIS operations Message-Id: <20121211174705.GL16759@mudshark.cambridge.arm.com> List-Id: References: <1347986135-17979-1-git-send-email-lorenzo.pieralisi@arm.com> <1347986135-17979-4-git-send-email-lorenzo.pieralisi@arm.com> <20120919134658.GA2111@linaro.org> <20120920102514.GD4588@e102568-lin.cambridge.arm.com> <20120920110439.GB2117@linaro.org> <20121211163313.GG16759@mudshark.cambridge.arm.com> <20121211163843.GH16759@mudshark.cambridge.arm.com> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-arm-kernel@lists.infradead.org On Tue, Dec 11, 2012 at 05:07:35PM +0000, Guennadi Liakhovetski wrote: > Hi Will > > On Tue, 11 Dec 2012, Will Deacon wrote: > > > On Tue, Dec 11, 2012 at 04:33:13PM +0000, Will Deacon wrote: > > > On Tue, Dec 11, 2012 at 04:07:56PM +0000, Guennadi Liakhovetski wrote: > > > > Git bisect identified this patch, in the mainline as > > > > > > > > commit dbee0c6fb4c1269b2dfc8b0b7a29907ea7fed560 > > > > Author: Lorenzo Pieralisi > > > > Date: Fri Sep 7 11:06:57 2012 +0530 > > > > > > > > ARM: kernel: update cpu_suspend code to use cache LoUIS operations > > > > > > > > as the culprit of the broken wake up from STR on mackerel, based on an > > > > sh7372 A8 SoC. .config attached. > > > > > > My guess is that because Cortex-A8 does not implement the MP extensions, > > > the LoUIS field of the CLIDR reads as zero, and the cache isn't flushed at > > > all (I can see an early exit in v7_flush_dcache_louis). > > > > > > Lorenzo -- how is this supposed to work for uniprocessor CPUs? > > > > Bah, forgot to ask you if the following patch helps... > > Yes, it does. Cracking, can I add you tested-by please? Will