From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Horman Date: Thu, 14 Feb 2013 04:20:29 +0000 Subject: Re: [PATCH] ARM: shmobile: r8a7779: Correct TMU clock support again Message-Id: <20130214042027.GD6036@verge.net.au> List-Id: References: <1360813381-3416-1-git-send-email-horms+renesas@verge.net.au> <87a9r7v8xd.wl%kuninori.morimoto.gx@renesas.com> <878v6rv8ij.wl%kuninori.morimoto.gx@renesas.com> In-Reply-To: <878v6rv8ij.wl%kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-arm-kernel@lists.infradead.org On Wed, Feb 13, 2013 at 08:12:24PM -0800, Kuninori Morimoto wrote: > > Hi Magnus, Simon > > Thank you for your explain > > > >> --- a/arch/arm/mach-shmobile/clock-r8a7779.c > > >> +++ b/arch/arm/mach-shmobile/clock-r8a7779.c > > >> @@ -161,7 +161,7 @@ static struct clk_lookup lookups[] = { > > >> CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */ > > >> CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */ > > >> CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ > > >> - CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ > > >> + CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */ > > >> CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP014]), /* TMU02 */ > > >> CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */ > > >> CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */ > > > > > > Really ??? > > > Is MSTP value of TMU01 same as TMU00 ? > > > > Usually, the TMU channels are bundled together. So TMU00 may be for > > channel 0->3 and TMU01 for 4->6. > > This means that current TMU02 numbering seems doubtful too ? > How about just rever 58079fa7d54a0929d304054ee759187a2ccd3cdf ? Perhaps that is a good idea. The original motivation for this patch was to add the TMU02 line. And "fixing" TMU01 was an afterthought. However, I am also now doubtful about the correctness of the TMU02 line and thus the usefulness of the original patch.