* [PATCH 1/3] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
2013-06-20 13:08 [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Simon Horman
@ 2013-06-20 13:08 ` Simon Horman
2013-06-20 13:08 ` [PATCH 2/3] ARM: shmobile: sh73a0: remove "0x" prefix from DT node names Simon Horman
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2013-06-20 13:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Most Renesas irqpin controllers have 4-bit sense fields, however, some
have different widths. This patch adds a DT binding to optionally
specify such non-standard values.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../bindings/interrupt-controller/renesas,intc-irqpin.txt | 14 ++++++++++++++
drivers/irqchip/irq-renesas-intc-irqpin.c | 4 ++++
2 files changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
new file mode 100644
index 0000000..66fcaf5
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
@@ -0,0 +1,14 @@
+DT bindings for the R-/SH-Mobile irqpin controller
+
+Required properties:
+
+- compatible: has to be "renesas,intc-irqpin"
+- #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in
+ interrupts.txt in this directory
+
+Optional properties:
+
+- any properties, listed in interrupts.txt, and any standard resource allocation
+ properties
+- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
+ if different from the default 4 bits
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index 5a68e5a..4aca1b2 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -18,6 +18,7 @@
*/
#include <linux/init.h>
+#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
@@ -349,6 +350,9 @@ static int intc_irqpin_probe(struct platform_device *pdev)
/* deal with driver instance configuration */
if (pdata)
memcpy(&p->config, pdata, sizeof(*pdata));
+ else
+ of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
+ &p->config.sense_bitfield_width);
if (!p->config.sense_bitfield_width)
p->config.sense_bitfield_width = 4; /* default to 4 bits */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 2/3] ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
2013-06-20 13:08 [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Simon Horman
2013-06-20 13:08 ` [PATCH 1/3] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width Simon Horman
@ 2013-06-20 13:08 ` Simon Horman
2013-06-20 13:08 ` [PATCH 3/3] ARM: shmobile: irqpin: add a DT property to enable masking on parent Simon Horman
` (2 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2013-06-20 13:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
The convention for Device Tree node names is <device>@<hex-address>, where
the part after '@' shouldn't contain the "0x" prefix. Fix the sh73a0.dtsi
DT names.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/sh73a0.dtsi | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index ec40bf7..b977502 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -119,7 +119,7 @@
0 32 0x4>;
};
- i2c0: i2c@0xe6820000 {
+ i2c0: i2c@e6820000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@@ -131,7 +131,7 @@
0 170 0x4>;
};
- i2c1: i2c@0xe6822000 {
+ i2c1: i2c@e6822000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@@ -143,7 +143,7 @@
0 54 0x4>;
};
- i2c2: i2c@0xe6824000 {
+ i2c2: i2c@e6824000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@@ -155,7 +155,7 @@
0 174 0x4>;
};
- i2c3: i2c@0xe6826000 {
+ i2c3: i2c@e6826000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@@ -167,7 +167,7 @@
0 186 0x4>;
};
- i2c4: i2c@0xe6828000 {
+ i2c4: i2c@e6828000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,rmobile-iic";
@@ -179,7 +179,7 @@
0 190 0x4>;
};
- mmcif: mmcif@0x10010000 {
+ mmcif: mmcif@e6bd0000 {
compatible = "renesas,sh-mmcif";
reg = <0xe6bd0000 0x100>;
interrupt-parent = <&gic>;
@@ -189,7 +189,7 @@
status = "disabled";
};
- sdhi0: sdhi@0xee100000 {
+ sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a7740-sdhi";
reg = <0xee100000 0x100>;
interrupt-parent = <&gic>;
@@ -201,7 +201,7 @@
};
/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
- sdhi1: sdhi@0xee120000 {
+ sdhi1: sdhi@ee120000 {
compatible = "renesas,r8a7740-sdhi";
reg = <0xee120000 0x100>;
interrupt-parent = <&gic>;
@@ -212,7 +212,7 @@
status = "disabled";
};
- sdhi2: sdhi@0xee140000 {
+ sdhi2: sdhi@ee140000 {
compatible = "renesas,r8a7740-sdhi";
reg = <0xee140000 0x100>;
interrupt-parent = <&gic>;
--
1.8.2.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/3] ARM: shmobile: irqpin: add a DT property to enable masking on parent
2013-06-20 13:08 [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Simon Horman
2013-06-20 13:08 ` [PATCH 1/3] irqchip: renesas-intc-irqpin: DT binding for sense bitfield width Simon Horman
2013-06-20 13:08 ` [PATCH 2/3] ARM: shmobile: sh73a0: remove "0x" prefix from DT node names Simon Horman
@ 2013-06-20 13:08 ` Simon Horman
2013-06-21 13:29 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Arnd Bergmann
2013-10-01 2:39 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
4 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2013-06-20 13:08 UTC (permalink / raw)
To: linux-arm-kernel
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
To disable spurious interrupts, that get triggered on certain hardware, the
irqpin driver masks them on the parent interrupt controller. To specify
such broken devices a .control_parent parameter can be provided in the
platform data. In the DT case we need a property, to do the same.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../bindings/interrupt-controller/renesas,intc-irqpin.txt | 2 ++
drivers/irqchip/irq-renesas-intc-irqpin.c | 7 +++++--
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
index 66fcaf5..1f8b0c5 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,intc-irqpin.txt
@@ -12,3 +12,5 @@ Optional properties:
properties
- sense-bitfield-width: width of a single sense bitfield in the SENSE register,
if different from the default 4 bits
+- control-parent: disable and enable interrupts on the parent interrupt
+ controller, needed for some broken implementations
diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index 4aca1b2..82cec63 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -348,11 +348,14 @@ static int intc_irqpin_probe(struct platform_device *pdev)
}
/* deal with driver instance configuration */
- if (pdata)
+ if (pdata) {
memcpy(&p->config, pdata, sizeof(*pdata));
- else
+ } else {
of_property_read_u32(pdev->dev.of_node, "sense-bitfield-width",
&p->config.sense_bitfield_width);
+ p->config.control_parent = of_property_read_bool(pdev->dev.of_node,
+ "control-parent");
+ }
if (!p->config.sense_bitfield_width)
p->config.sense_bitfield_width = 4; /* default to 4 bits */
--
1.8.2.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2
2013-06-20 13:08 [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Simon Horman
` (2 preceding siblings ...)
2013-06-20 13:08 ` [PATCH 3/3] ARM: shmobile: irqpin: add a DT property to enable masking on parent Simon Horman
@ 2013-06-21 13:29 ` Arnd Bergmann
2013-10-01 2:39 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
4 siblings, 0 replies; 11+ messages in thread
From: Arnd Bergmann @ 2013-06-21 13:29 UTC (permalink / raw)
To: linux-arm-kernel
On Thursday 20 June 2013, Simon Horman wrote:
> This pull request is based on renesas-dt-for-v3.11 which you have
> previously pulled.
>
> The following changes since commit 24603f3caf07f5f65aa17ed7851ad4741595cf6a:
>
> ARM: shmobile: marzen-reference: add irqpin support in DT (2013-06-04 18:05:59 +0900)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt2-for-v3.11
>
> for you to fetch changes up to c4fa4946f177ae214523586cd794ac18d34b1430:
>
> ARM: shmobile: irqpin: add a DT property to enable masking on parent (2013-06-19 21:27:31 +0900)
>
Pulled into next/dt, thanks!
I think I have taken all your pull requests now, please let me know
if I missed something.
Arnd
^ permalink raw reply [flat|nested] 11+ messages in thread* [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13
2013-06-20 13:08 [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Simon Horman
` (3 preceding siblings ...)
2013-06-21 13:29 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.11 #2 Arnd Bergmann
@ 2013-10-01 2:39 ` Simon Horman
2013-10-01 2:39 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes Simon Horman
` (2 more replies)
4 siblings, 3 replies; 11+ messages in thread
From: Simon Horman @ 2013-10-01 2:39 UTC (permalink / raw)
To: linux-arm-kernel
Hi Kevin, Olof and Arnd,
please consider these Renesas ARM-based SoC DT updates for v3.13.
This pull-request is based on v3.12-rc1.
The following changes since commit 272b98c6455f00884f0350f775c5342358ebb73f:
Linux 3.12-rc1 (2013-09-16 16:17:51 -0400)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v3.13
for you to fetch changes up to 3da4c3039907b655e1758835d57b914a73ff7f5a:
ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI (2013-09-19 14:37:35 -0700)
----------------------------------------------------------------
Renesas ARM-based SoC DT updates for v3.13
* Add CPU cores to DTSI of r8a7790 SoC
* Add MMCIF and SDHI DT nodes for reference DTS of ape6evm board
----------------------------------------------------------------
Guennadi Liakhovetski (1):
ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes
Magnus Damm (2):
ARM: shmobile: Add r8a7790 CA15 CPU cores
ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
arch/arm/boot/dts/r8a7790.dtsi | 49 +++++++++++++++++
2 files changed, 121 insertions(+)
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes
2013-10-01 2:39 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
@ 2013-10-01 2:39 ` Simon Horman
2014-12-02 8:37 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add ethernet controller to DT Ulrich Hecht
2014-12-02 17:42 ` Geert Uytterhoeven
2013-10-01 2:39 ` [PATCH 3/3] ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI Simon Horman
2013-10-01 4:08 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
2 siblings, 2 replies; 11+ messages in thread
From: Simon Horman @ 2013-10-01 2:39 UTC (permalink / raw)
To: linux-arm-kernel
From: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
This patch adds MMCIF0, SDHI0 and SDHI1 DT nodes and a fixed voltage
reglator for them to the ape6evm-reference platform.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
index f444624..2b49b05 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
@@ -10,6 +10,7 @@
/dts-v1/;
/include/ "r8a73a4.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "APE6EVM";
@@ -24,6 +25,34 @@
reg = <0 0x40000000 0 0x40000000>;
};
+ vcc_mmc0: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "MMC0 Vcc";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-always-on;
+ };
+
+ vcc_sdhi0: regulator@1 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpio = <&pfc 76 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ /* Common 3.3V rail, used by several devices on APE6EVM */
+ ape6evm_fixed_3v3: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
lbsc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -62,4 +91,47 @@
renesas,groups = "scifa0_data";
renesas,function = "scifa0";
};
+
+ mmc0_pins: mmcif {
+ renesas,groups = "mmc0_data8", "mmc0_ctrl";
+ renesas,function = "mmc0";
+ };
+
+ sdhi0_pins: sdhi0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+ renesas,function = "sdhi0";
+ };
+
+ sdhi1_pins: sdhi1 {
+ renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
+ renesas,function = "sdhi1";
+ };
+};
+
+&mmcif0 {
+ vmmc-supply = <&vcc_mmc0>;
+ bus-width = <8>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ status = "okay";
+};
+
+&sdhi0 {
+ vmmc-supply = <&vcc_sdhi0>;
+ bus-width = <4>;
+ toshiba,mmc-wrprotect-disable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhi0_pins>;
+ status = "okay";
+};
+
+&sdhi1 {
+ vmmc-supply = <&ape6evm_fixed_3v3>;
+ bus-width = <4>;
+ broken-cd;
+ toshiba,mmc-wrprotect-disable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdhi1_pins>;
+ status = "okay";
};
--
1.8.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 1/3] ARM: shmobile: ape6evm-reference: add ethernet controller to DT
2013-10-01 2:39 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes Simon Horman
@ 2014-12-02 8:37 ` Ulrich Hecht
2014-12-02 17:42 ` Geert Uytterhoeven
1 sibling, 0 replies; 11+ messages in thread
From: Ulrich Hecht @ 2014-12-02 8:37 UTC (permalink / raw)
To: linux-sh
Describes the SMSC LAN9220 chip. It is not currently enabled because a suitable
mechanism for activating its clock (zb) is yet to be developed.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
---
arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
index 84e05f7..a218c26 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
@@ -68,6 +68,19 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0x80000000>;
+
+ ethernet@8000000 {
+ compatible = "smsc,lan9220", "smsc,lan9115";
+ reg = <0x08000000 0x1000>;
+ interrupt-parent = <&irqc1>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+ phy-mode = "mii";
+ reg-io-width = <4>;
+ smsc,irq-active-high;
+ smsc,irq-push-pull;
+ vddvario-supply = <&ape6evm_fixed_3v3>;
+ vdd33a-supply = <&ape6evm_fixed_3v3>;
+ };
};
};
--
1.8.4.5
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH 1/3] ARM: shmobile: ape6evm-reference: add ethernet controller to DT
2013-10-01 2:39 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes Simon Horman
2014-12-02 8:37 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add ethernet controller to DT Ulrich Hecht
@ 2014-12-02 17:42 ` Geert Uytterhoeven
1 sibling, 0 replies; 11+ messages in thread
From: Geert Uytterhoeven @ 2014-12-02 17:42 UTC (permalink / raw)
To: linux-sh
Hi Ulrich,
On Tue, Dec 2, 2014 at 9:37 AM, Ulrich Hecht
<ulrich.hecht+renesas@gmail.com> wrote:
> Describes the SMSC LAN9220 chip. It is not currently enabled because a suitable
> mechanism for activating its clock (zb) is yet to be developed.
Have you tried the mechanism from "[PATCH RFC 0/3] Add "Simple" / Renesas Bus
State Controller Driver" (https://lkml.org/lkml/2014/11/24/661)?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 3/3] ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI
2013-10-01 2:39 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
2013-10-01 2:39 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes Simon Horman
@ 2013-10-01 2:39 ` Simon Horman
2013-10-01 4:08 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
2 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2013-10-01 2:39 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm@opensource.se>
Add r8a7790 Cortex-A7 CPU information to DTSI.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7790.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 388f49f..a0cfb661 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -45,6 +45,34 @@
reg = <3>;
clock-frequency = <1300000000>;
};
+
+ cpu4: cpu@4 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x100>;
+ clock-frequency = <780000000>;
+ };
+
+ cpu5: cpu@5 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x101>;
+ clock-frequency = <780000000>;
+ };
+
+ cpu6: cpu@6 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x102>;
+ clock-frequency = <780000000>;
+ };
+
+ cpu7: cpu@7 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x103>;
+ clock-frequency = <780000000>;
+ };
};
gic: interrupt-controller@f1001000 {
--
1.8.4
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13
2013-10-01 2:39 ` [GIT PULL 0/3] Renesas ARM-based SoC DT updates for v3.13 Simon Horman
2013-10-01 2:39 ` [PATCH 1/3] ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes Simon Horman
2013-10-01 2:39 ` [PATCH 3/3] ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI Simon Horman
@ 2013-10-01 4:08 ` Simon Horman
2 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2013-10-01 4:08 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Oct 01, 2013 at 11:39:15AM +0900, Simon Horman wrote:
> Hi Kevin, Olof and Arnd,
>
> please consider these Renesas ARM-based SoC DT updates for v3.13.
>
> This pull-request is based on v3.12-rc1.
>
>
> The following changes since commit 272b98c6455f00884f0350f775c5342358ebb73f:
>
> Linux 3.12-rc1 (2013-09-16 16:17:51 -0400)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v3.13
Please ignore this, I will repost a corrected pull-request shortly.
>
> for you to fetch changes up to 3da4c3039907b655e1758835d57b914a73ff7f5a:
>
> ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI (2013-09-19 14:37:35 -0700)
>
> ----------------------------------------------------------------
> Renesas ARM-based SoC DT updates for v3.13
>
> * Add CPU cores to DTSI of r8a7790 SoC
> * Add MMCIF and SDHI DT nodes for reference DTS of ape6evm board
>
> ----------------------------------------------------------------
> Guennadi Liakhovetski (1):
> ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes
>
> Magnus Damm (2):
> ARM: shmobile: Add r8a7790 CA15 CPU cores
> ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI
>
> arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts | 72 +++++++++++++++++++++++++
> arch/arm/boot/dts/r8a7790.dtsi | 49 +++++++++++++++++
> 2 files changed, 121 insertions(+)
>
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