From: Magnus Damm <magnus.damm@gmail.com>
To: linux-kernel@vger.kernel.org
Cc: linux-sh@vger.kernel.org, linus.walleij@linaro.org,
wsa@the-dreams.de, horms@verge.net.au,
laurent.pinchart@ideasonboard.com,
Magnus Damm <magnus.damm@gmail.com>
Subject: [PATCH 01/03] pinctrl: sh-pfc: r7s72100 SCIF2 port3 support
Date: Wed, 27 Nov 2013 08:06:21 +0000 [thread overview]
Message-ID: <20131127080621.18384.85008.sendpatchset@w520> (raw)
In-Reply-To: <20131127080606.18384.45103.sendpatchset@w520>
From: Magnus Damm <damm@opensource.se>
Add support for SCIF2 port3 pin functions SCK, TXD and RXD to the
r7s72100 PINCTRL code. There are two possible pins that can be used
for TXD (Port 3 Pin 0 Function 6 and Port 3 Pin 1 Function 4) and
because of that are the data pins broken out in separate TXD and RXD.
This format is similar to other sh-pfc code, but a following patch
converts this to less verbose and less readable code.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/pinctrl/sh-pfc/pfc-r7s72100.c | 41 +++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
--- 0002/drivers/pinctrl/sh-pfc/pfc-r7s72100.c
+++ work/drivers/pinctrl/sh-pfc/pfc-r7s72100.c 2013-11-27 15:22:16.000000000 +0900
@@ -103,10 +103,51 @@ static struct sh_pfc_pin pinmux_pins[] _P_ALL(_P_GPIO),
};
+/* - SCIF2 ------------------------------------------------------------------ */
+static const unsigned int scif2_txd_p3_0_pins[] = {
+ /* TX */
+ RZ_PORT_PIN(3, 0),
+};
+static const unsigned int scif2_txd_p3_0_mux[] = {
+ P_3_0_MARK_FN6,
+};
+static const unsigned int scif2_txd_p3_1_pins[] = {
+ /* TX */
+ RZ_PORT_PIN(3, 1),
+};
+static const unsigned int scif2_txd_p3_1_mux[] = {
+ P_3_1_MARK_FN4,
+};
+static const unsigned int scif2_rxd_p3_2_pins[] = {
+ /* RX */
+ RZ_PORT_PIN(3, 2),
+};
+static const unsigned int scif2_rxd_p3_2_mux[] = {
+ P_3_2_MARK_FN4,
+};
+static const unsigned int scif2_clk_p3_0_pins[] = {
+ /* SCK */
+ RZ_PORT_PIN(3, 0),
+};
+static const unsigned int scif2_clk_p3_0_mux[] = {
+ P_3_0_MARK_FN4,
+};
+
static const struct sh_pfc_pin_group pinmux_groups[] = {
+ SH_PFC_PIN_GROUP(scif2_txd_p3_0),
+ SH_PFC_PIN_GROUP(scif2_txd_p3_1),
+ SH_PFC_PIN_GROUP(scif2_rxd_p3_2),
+ SH_PFC_PIN_GROUP(scif2_clk_p3_0),
};
+static const char * const scif2_groups[] = {
+ "scif2_txd_p3_0",
+ "scif2_txd_p3_1",
+ "scif2_rxd_p3_2",
+ "scif2_clk_p3_0",
+};
static const struct sh_pfc_function pinmux_functions[] = {
+ SH_PFC_FUNCTION(scif2),
};
#define PFC_REG(idx, name, reg) \
next prev parent reply other threads:[~2013-11-27 8:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-27 8:06 [PATCH 00/03] pinctrl: sh-pfc: r7s72100 SCIF2 support Magnus Damm
2013-11-27 8:06 ` Magnus Damm [this message]
2013-11-27 10:56 ` [PATCH 01/03] pinctrl: sh-pfc: r7s72100 SCIF2 port3 support Laurent Pinchart
2013-11-29 10:29 ` Linus Walleij
2013-11-29 13:53 ` Laurent Pinchart
2013-11-27 8:06 ` [PATCH 02/03] pinctrl: sh-pfc: r7s72100 SCIF2 macro conversion Magnus Damm
2013-11-27 11:02 ` Laurent Pinchart
2013-11-27 8:06 ` [PATCH 03/03] pinctrl: sh-pfc: r7s72100 SCIF2 port4, 6 and 8 support Magnus Damm
2013-12-03 9:36 ` Linus Walleij
2013-12-03 12:18 ` Simon Horman
2013-12-04 1:09 ` Laurent Pinchart
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