From: Felipe Balbi <balbi@ti.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 3/4] usb: renesas_usbhs: fix the timing of dcp_control_transfer_done
Date: Wed, 10 Sep 2014 13:50:28 +0000 [thread overview]
Message-ID: <20140910135028.GF667@saruman.home> (raw)
In-Reply-To: <53F72602.3010704@renesas.com>
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On Wed, Sep 10, 2014 at 07:34:05PM +0900, Yoshihiro Shimoda wrote:
> According to the datasheet, this driver should clear the INTSTS0.CTRT
> bit before this controller detects the next stage transition. Otherwise,
> the driver may not be able to clear the bit after the controller went to
> the next stage transition. After that, the driver will not be able to
> clear the INTSTS0.VALID, and a usb control transfer will not finish
> finally.
>
> If we use the testusb tool, it is easy to reproduce this issue:
>
> # testusb -a -t 10
>
> Since the previous code handled a data stage and a status stage in
> the usbhsf_pio_try_push(), it may not clear the INTSTS0.CTRT at the
> right timing.
> So, this patch changes the timing of usbhs_dcp_control_transfer_done()
> to the usbhsg_irq_ctrl_stage().
>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
which commit does this fix ? Do we need to Cc stable ?
--
balbi
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prev parent reply other threads:[~2014-09-10 13:50 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-22 11:14 [PATCH 3/4] usb: renesas_usbhs: fix the condition of is_done in usbhsf_dma_push_done Yoshihiro Shimoda
2014-09-10 10:34 ` [PATCH 3/4] usb: renesas_usbhs: fix the timing of dcp_control_transfer_done Yoshihiro Shimoda
2014-09-10 13:50 ` Felipe Balbi [this message]
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