From: Simon Horman <horms@verge.net.au>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 1/2] ARM: shmobile: r8a7740 legacy: Correct IIC0 parent clock
Date: Wed, 12 Nov 2014 00:34:23 +0000 [thread overview]
Message-ID: <20141112003423.GB30454@verge.net.au> (raw)
In-Reply-To: <1415181874-21549-1-git-send-email-geert+renesas@glider.be>
On Mon, Nov 10, 2014 at 09:52:38AM +0900, Simon Horman wrote:
> On Wed, Nov 05, 2014 at 11:04:33AM +0100, Geert Uytterhoeven wrote:
> > According to the datasheet, the operating clock for IIC0 is the HPP
> > (RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same
> > speed (50 Mhz).
> >
> > This is consistent with IIC0 being located in the A4R PM domain, and
> > IIC1 in the A3SP PM domain.
>
> Thanks, I have queued this up.
Hi Geert,
As this appears to be a bug fix I would like to accompany this patch with
some text describing when the problem was introduced and what its effects
are. In short a rough guide to if it should be applied to -stable. To that
end I prepared the following which I would appreciate your feedback on.
* ARM: shmobile: r8a7740 legacy: Correct IIC0 parent clock
This problem appears to have been introduced when IIC0 support was
added to the r8a7740 by 6831f3a9184a1c540 ("ARM: mach-shmobile: r8a7740:
add i2c support") in v3.2.
I am not aware of any run-time effect of this problem
>
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > ---
> > arch/arm/mach-shmobile/clock-r8a7740.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
> > index dbb0ab283e2fe91f..9cac8247c72b6e45 100644
> > --- a/arch/arm/mach-shmobile/clock-r8a7740.c
> > +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
> > @@ -470,7 +470,7 @@ static struct clk mstp_clks[MSTP_NR] = {
> > [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S], SMSTPCR1, 27, 0), /* CEU20 */
> > [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
> > [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
> > - [MSTP116] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
> > + [MSTP116] = SH_CLK_MSTP32(&div4_clks[DIV4_HPP], SMSTPCR1, 16, 0), /* IIC0 */
> > [MSTP111] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 11, 0), /* TMU1 */
> > [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
> >
> > --
> > 1.9.1
> >
> --
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next prev parent reply other threads:[~2014-11-12 0:34 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-05 10:04 [PATCH 1/2] ARM: shmobile: r8a7740 legacy: Correct IIC0 parent clock Geert Uytterhoeven
2014-11-10 0:52 ` Simon Horman
2014-11-12 0:34 ` Simon Horman [this message]
2014-11-12 2:27 ` Simon Horman
2014-11-12 9:06 ` Geert Uytterhoeven
2014-11-12 9:10 ` Simon Horman
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