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From: Simon Horman <horms@verge.net.au>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 2/2] ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock
Date: Wed, 12 Nov 2014 00:57:02 +0000	[thread overview]
Message-ID: <20141112005701.GA11597@verge.net.au> (raw)
In-Reply-To: <1415181874-21549-2-git-send-email-geert+renesas@glider.be>

On Mon, Nov 10, 2014 at 09:57:46AM +0900, Simon Horman wrote:
> On Wed, Nov 05, 2014 at 11:04:34AM +0100, Geert Uytterhoeven wrote:
> > According to the datasheet, the operating clock for IIC0 is the HPP
> > (RT Peri) clock, not the SUB (Peri) clock. Both clocks run at the same
> > speed (50 Mhz).
> > 
> > This is consistent with IIC0 being located in the A4R PM domain, and
> > IIC1 in the A3SP PM domain.
> 
> Thanks, I have queued this up.

Hi Geert,

As this appears to be a bug fix I would like to accompany this patch with
some text describing when the problem was introduced and what its effects
are. In short a rough guide to if it should be applied to -stable. To that
end I prepared the following which I would appreciate your feedback on.

* ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock  

  This problem was introduced when clock support was added DT for the
  r8a7740 by d9ffd583bf345e2ea ("ARM: shmobile: r8a7740: add SoC clocks to
  DTS") in v3.17.

  I am not aware of any run-time effect of this problem.

  parent reply	other threads:[~2014-11-12  0:57 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-11-05 10:04 [PATCH 2/2] ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock Geert Uytterhoeven
2014-11-10  0:57 ` Simon Horman
2014-11-12  0:57 ` Simon Horman [this message]
2014-11-12  2:25 ` Simon Horman
2014-11-12  9:09 ` Geert Uytterhoeven
2014-11-12 11:04 ` Geert Uytterhoeven
  -- strict thread matches above, loose matches on Subject: below --
2014-11-13  1:20 [GIT PULL] Renesas ARM Based SoC DT Fixes for v3.18 Simon Horman
2014-11-13  1:20 ` [PATCH 2/2] ARM: shmobile: r8a7740 dtsi: Correct IIC0 parent clock Simon Horman

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