From: David Miller <davem@davemloft.net>
To: nobuhiro.iwamatsu.yj@renesas.com
Cc: netdev@vger.kernel.org, yoshihiro.shimoda.uh@renesas.com,
linux-sh@vger.kernel.org, geert@linux-m68k.org
Subject: Re: [PATCH v2] sh_eth: Fix access to TRSCER register
Date: Fri, 09 Jan 2015 04:07:30 +0000 [thread overview]
Message-ID: <20150108.200730.2161513801937723015.davem@davemloft.net> (raw)
In-Reply-To: <1420698307-3707-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Date: Thu, 8 Jan 2015 15:25:07 +0900
> TRSCER register is configured differently by SoCs. TRSCER of R-Car Gen2 is
> RINT8 bit only valid, other bits are reserved bits. This removes access to
> TRSCER register reserve bit by adding variable trscer_err_mask to
> sh_eth_cpu_data structure, set the register information to each SoCs.
>
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Applied.
prev parent reply other threads:[~2015-01-09 4:07 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-08 6:25 [PATCH v2] sh_eth: Fix access to TRSCER register Nobuhiro Iwamatsu
2015-01-08 11:57 ` Geert Uytterhoeven
2015-01-09 4:07 ` David Miller [this message]
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