From mboxrd@z Thu Jan 1 00:00:00 1970 From: Magnus Damm Date: Wed, 28 Jan 2015 12:46:45 +0000 Subject: [PATCH v2] ARM: shmobile: r8a73a4: Instantiate GIC from C board code in legacy builds Message-Id: <20150128124645.21199.99590.sendpatchset@little-apple> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: linux-sh@vger.kernel.org From: Magnus Damm As of commit 9a1091ef0017c40a ("irqchip: gic: Support hierarchy irq domain."), the APE6EVM legacy board support is known to be broken. The IRQ numbers of the GIC are now virtual, and no longer match the hardcoded hardware IRQ numbers in the legacy platform board code. To fix this issue specific to non-muliplatform r8a73a4 and APE6EVM: 1) Instantiate the GIC from platform board code and also 2) Skip over the DT arch timer as well as 3) Force delay setup based on DT CPU frequency With these 3 fixes in place interrupts on APE6EVM are now unbroken. Partially based on legacy GIC fix by Geert Uytterhoeven, thanks to him for the initial work. Signed-off-by: Magnus Damm --- Suitable as a fix for v3.19-rc6. Initially developed on top of v3.19-rc6 but also seems to apply cleanly to the renesas git repo with tag renesas-devel-20150128-v3.19-rc6. arch/arm/mach-shmobile/board-ape6evm.c | 20 ++++++++++++++++++++ arch/arm/mach-shmobile/timer.c | 7 +++++++ 2 files changed, 27 insertions(+) --- 0001/arch/arm/mach-shmobile/board-ape6evm.c +++ work/arch/arm/mach-shmobile/board-ape6evm.c 2015-01-28 21:31:40.635267889 +0900 @@ -18,6 +18,8 @@ #include #include #include +#include +#include #include #include #include @@ -273,6 +275,22 @@ static void __init ape6evm_add_standard_ sizeof(ape6evm_leds_pdata)); } +static void __init ape6evm_legacy_init_time(void) +{ + /* Do not invoke DT-based timers via clocksource_of_init() */ +} + +static void __init ape6evm_legacy_init_irq(void) +{ + void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000); + void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000); + + gic_init(0, 29, gic_dist_base, gic_cpu_base); + + /* Do not invoke DT-based interrupt code via irqchip_init() */ +} + + static const char *ape6evm_boards_compat_dt[] __initdata = { "renesas,ape6evm", NULL, @@ -280,7 +298,9 @@ static const char *ape6evm_boards_compat DT_MACHINE_START(APE6EVM_DT, "ape6evm") .init_early = shmobile_init_delay, + .init_irq = ape6evm_legacy_init_irq, .init_machine = ape6evm_add_standard_devices, .init_late = shmobile_init_late, .dt_compat = ape6evm_boards_compat_dt, + .init_time = ape6evm_legacy_init_time, MACHINE_END --- 0001/arch/arm/mach-shmobile/timer.c +++ work/arch/arm/mach-shmobile/timer.c 2015-01-28 21:19:39.455270480 +0900 @@ -70,6 +70,13 @@ void __init shmobile_init_delay(void) if (!max_freq) return; +#ifdef CONFIG_ARCH_SHMOBILE_LEGACY + /* Non-multiplatform r8a73a4 SoC cannot use arch timer due + * to GIC being initialized from C and arch timer via DT */ + if (of_machine_is_compatible("renesas,r8a73a4")) + has_arch_timer = false; +#endif + if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) { if (is_a7_a8_a9) shmobile_setup_delay_hz(max_freq, 1, 3);