Re: [PATCH/RFC] serial: sh-sci: Add R-Car SCIF DMA receive support

[Wolfram Sang <wsa@the-dreams.de>]

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On Wed, May 13, 2015 at 11:18:59AM +0200, Geert Uytterhoeven wrote:
> Hi Kaneko-san,
> 
> On Fri, May 1, 2015 at 7:11 PM, Yoshihiro Kaneko <ykaneko0929@gmail.com> wrote:
> > From: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> >
> > Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
> > Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> > Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
> 
> Thank you for your patch! I will give it a try...
> 
> It would be nice to have some more information in the patch description.
> E.g. what it's doing, and why it's needed.

Yes, description is really needed.

From looking at the code I recognize a few things. Reminder: I was investigating
this issue last year and we spoke about it in Montpellier.

A quote from back then:

"Once I submit the RX descriptor, I don't get any irq anymore (which the
driver needs to detect timeouts). Before that, I got them.

SCIFA has a bit (SCSCR_RDRQE) to select if the interrupt should go to
the CPU or DMAC and the driver handles this correctly, so DMA works
again.

Plain SCIF does not have such a bit. The documentation has a chapter
"SCIF Interrupt Sources and the DMAC" (chapter 51.4 here in v0.9) which
is a little vague to me. But from what I understand, I should get an irq
along with the DMAC transferring data. The implementation of this driver
shows that earlier SH hardware worked this way. However, I don't get
interrupts, so the timeout mechanism fails. DMA works partly, you can
receive in 32 bytes chunks only."

So, I assume the third sg list with 1 byte in size is for dealing with
this issue.

Regards,

   Wolfram


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