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From: "Michael Büsch" <m@bues.ch>
To: linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Ilia Mirkin <imirkin@alum.mit.edu>
Subject: [PATCH] m32r: Fix clearing of thread info fault code
Date: Thu, 18 Jun 2015 18:45:18 +0000	[thread overview]
Message-ID: <20150618204518.02c852e0@wiggum> (raw)

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The expression (~0 >> x) will always yield all-ones, because the right
shift is an arithmetic right shift that will always shift ones in.
Hence the old fault code bits will not be cleared before being ORed
with the new fault code.

Fix this by forcing a logical right shift instead of an arithmetic
right shift by using an unsigned long constant.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Michael Buesch <m@bues.ch>

---

The code also assumes sizeof(ti->flags) == 4. But that probably is ok for this arch.

This patch is untested, because I do not have the hardware.


Index: linux/arch/m32r/include/asm/thread_info.h
===================================================================
--- linux.orig/arch/m32r/include/asm/thread_info.h
+++ linux/arch/m32r/include/asm/thread_info.h
@@ -77,7 +77,7 @@ static inline struct thread_info *curren
 static inline void set_thread_fault_code(unsigned int val)
 {
 	struct thread_info *ti = current_thread_info();
-	ti->flags = (ti->flags & (~0 >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
+	ti->flags = (ti->flags & (~0UL >> (32 - TI_FLAG_FAULT_CODE_SHIFT)))
 		| (val << TI_FLAG_FAULT_CODE_SHIFT);
 }
 

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             reply	other threads:[~2015-06-18 18:45 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-18 18:45 Michael Büsch [this message]
2015-11-19 20:12 ` [PATCH] m32r: Fix clearing of thread info fault code Michael Büsch
2015-11-19 20:13 ` Michael Büsch
2015-11-19 23:08   ` Andrew Morton
2015-11-21 15:55     ` Michael Büsch

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