[PATCH v3 00/04] Renesas R-Car Gen3 CPG support V3

[PATCH v3 00/04] Renesas R-Car Gen3 CPG support V3

[Magnus Damm]

Renesas R-Car Gen3 CPG support V3

[PATCH v3 01/04] clk: shmobile: Get rid of CONFIG_ARCH_SHMOBILE_MULTI
[PATCH v3 02/04] clk: shmobile: Make MSTP clock-output-names optional
[PATCH v3 03/04] clk: shmobile: Add Renesas R-Car Gen3 CPG support
[PATCH v3 04/04] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support

This series is the first attempt to take the CCF code from the single patch:
"[PATCH 1/9] clk: shmobile: add Renesas R-Car Gen3 CPG support"
to a full series of various CCF related updates related to R-Car Gen3.

In this series patch 1 and 2 get rid of CONFIG_ARCH_SHMOBILE_MULTI kconfig
bits and converts the MSTP CCF driver to not rely on clock-output-names. The
latter may need a bit more work.

Patch 3 and 4 introduce an updated R-Car Gen3 CPG driver where I have reworked
the code to not depend on clock-output-names instead of using strings simply
rely on RCAR_GEN3_CLK_xxx. Those must match the ABI defined in SoC specific
indicies such as the ones included in r8a7795-clock.h.

Patch 3 most likely needs to be reworked further to incorporate earlier
feedback from CCF maintainers.

Comments are very welcome!

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Written to be picked up independently from other R-Car Gen3 patches.

 Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt |   31 +
 drivers/clk/Makefile                                                     |    2 
 drivers/clk/shmobile/Makefile                                            |   23 
 drivers/clk/shmobile/clk-mstp.c                                          |   15 
 drivers/clk/shmobile/clk-rcar-gen3.c                                     |  254 ++++++++++
 5 files changed, 304 insertions(+), 21 deletions(-)

[PATCH v3 01/04] clk: shmobile: Get rid of CONFIG_ARCH_SHMOBILE_MULTI

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Shmobile is all multiplatform these days, so get rid of the
reference to CONFIG_ARCH_SHMOBILE_MULTI. Also instead of always
enabling DIV6 and MSTP adjust the Makefile to enable DIV6 and
MSTP depending on if they are included in the SoC or not.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

 Changes since V2:
 - Fixed patch subject typo CONFIG_SHMOBILE_MULTI -> CONFIG_ARCH_SHMOBILE_MULTI

 Changes since V1:
 - dropped DIV6 from R-Car Gen1 variants - thanks Geert!

 drivers/clk/Makefile          |    2 +-
 drivers/clk/shmobile/Makefile |   22 ++++++++++------------
 2 files changed, 11 insertions(+), 13 deletions(-)

--- 0001/drivers/clk/Makefile
+++ work/drivers/clk/Makefile	2015-08-26 16:39:50.052366518 +0900
@@ -66,7 +66,7 @@ obj-$(CONFIG_COMMON_CLK_PXA)		+= pxa/
 obj-$(CONFIG_COMMON_CLK_QCOM)		+= qcom/
 obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
 obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
-obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= shmobile/
+obj-$(CONFIG_ARCH_SHMOBILE)		+= shmobile/
 obj-$(CONFIG_ARCH_SIRF)			+= sirf/
 obj-$(CONFIG_ARCH_SOCFPGA)		+= socfpga/
 obj-$(CONFIG_PLAT_SPEAR)		+= spear/
--- 0001/drivers/clk/shmobile/Makefile
+++ work/drivers/clk/shmobile/Makefile	2015-08-26 16:40:04.832366518 +0900
@@ -1,13 +1,11 @@
 obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
-obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
-obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o
-obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o
-obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
-obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
-obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o
-obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o
-obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-mstp.o
+obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o clk-mstp.o
+obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o clk-mstp.o
+obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o clk-mstp.o
+obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o clk-mstp.o clk-div6.o

Re: [PATCH v3 01/04] clk: shmobile: Get rid of CONFIG_ARCH_SHMOBILE_MULTI

[Laurent Pinchart]

Hi Magnus,

Thank you for the patch.

On Friday 28 August 2015 18:16:02 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
> 
> Shmobile is all multiplatform these days, so get rid of the
> reference to CONFIG_ARCH_SHMOBILE_MULTI. Also instead of always
> enabling DIV6 and MSTP adjust the Makefile to enable DIV6 and
> MSTP depending on if they are included in the SoC or not.
> 
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>

Assuming you have verified that adding the same object file several times to 
obj-y won't cause any issue,

Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
> 
>  Changes since V2:
>  - Fixed patch subject typo CONFIG_SHMOBILE_MULTI ->
> CONFIG_ARCH_SHMOBILE_MULTI
> 
>  Changes since V1:
>  - dropped DIV6 from R-Car Gen1 variants - thanks Geert!
> 
>  drivers/clk/Makefile          |    2 +-
>  drivers/clk/shmobile/Makefile |   22 ++++++++++------------
>  2 files changed, 11 insertions(+), 13 deletions(-)
> 
> --- 0001/drivers/clk/Makefile
> +++ work/drivers/clk/Makefile	2015-08-26 16:39:50.052366518 +0900
> @@ -66,7 +66,7 @@ obj-$(CONFIG_COMMON_CLK_PXA)		+= pxa/
>  obj-$(CONFIG_COMMON_CLK_QCOM)		+= qcom/
>  obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
>  obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
> -obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= shmobile/
> +obj-$(CONFIG_ARCH_SHMOBILE)		+= shmobile/
>  obj-$(CONFIG_ARCH_SIRF)			+= sirf/
>  obj-$(CONFIG_ARCH_SOCFPGA)		+= socfpga/
>  obj-$(CONFIG_PLAT_SPEAR)		+= spear/
> --- 0001/drivers/clk/shmobile/Makefile
> +++ work/drivers/clk/shmobile/Makefile	2015-08-26 16:40:04.832366518 +0900
> @@ -1,13 +1,11 @@
>  obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
> -obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
> -obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o
> -obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o
> -obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
> -obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
> -obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
> -obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
> -obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o
> -obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o
> -obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o
> -obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o
> -obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-mstp.o
> +obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o clk-mstp.o
> +obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-mstp.o clk-div6.o
> +obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-mstp.o clk-div6.o
> +obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o clk-mstp.o
> +obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o clk-mstp.o
> +obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
> +obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
> +obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
> +obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
> +obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o clk-mstp.o clk-div6.o

-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 01/04] clk: shmobile: Get rid of CONFIG_ARCH_SHMOBILE_MULTI

[Magnus Damm]

Hi Laurent,

On Sat, Aug 29, 2015 at 4:59 AM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
> Hi Magnus,
>
> Thank you for the patch.
>
> On Friday 28 August 2015 18:16:02 Magnus Damm wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Shmobile is all multiplatform these days, so get rid of the
>> reference to CONFIG_ARCH_SHMOBILE_MULTI. Also instead of always
>> enabling DIV6 and MSTP adjust the Makefile to enable DIV6 and
>> MSTP depending on if they are included in the SoC or not.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Assuming you have verified that adding the same object file several times to
> obj-y won't cause any issue,

Yeah. A good example of such (mis)use is in arch/arm/mach-shmobile/Kconfig.
I've also built 32-bit shmobile_defconfig and 64-bit defconfig without issues.

> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Thanks!

/ magnus

[PATCH v3 02/04] clk: shmobile: Make MSTP clock-output-names optional

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

This patch updates the MSTP driver to make the "clock-output-names"
DT property optional instead of mandatory. In case the DT property
is omitted then the function clk_register_clkdev() is skipped.

The default for new SoCs is to not use "clock-output-names".

This version of the patch is kind of early, so please handle with care.
So far the patch has only been tested with a single MSTP clock. =)

Not-Yet-Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 drivers/clk/shmobile/clk-mstp.c |   15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

--- 0001/drivers/clk/shmobile/clk-mstp.c
+++ work/drivers/clk/shmobile/clk-mstp.c	2015-08-28 15:03:28.002366518 +0900
@@ -198,15 +198,12 @@ static void __init cpg_mstp_clocks_init(
 
 	for (i = 0; i < MSTP_MAX_CLOCKS; ++i) {
 		const char *parent_name;
-		const char *name;
+		const char *name = NULL;
 		u32 clkidx;
 		int ret;
 
-		/* Skip clocks with no name. */
 		ret = of_property_read_string_index(np, "clock-output-names",
 						    i, &name);
-		if (ret < 0 || strlen(name) = 0)
-			continue;
 
 		parent_name = of_clk_get_parent_name(np, i);
 		ret = of_property_read_u32_index(np, idxname, i, &clkidx);
@@ -214,12 +211,13 @@ static void __init cpg_mstp_clocks_init(
 			break;
 
 		if (clkidx >= MSTP_MAX_CLOCKS) {
-			pr_err("%s: invalid clock %s %s index %u)\n",
-			       __func__, np->name, name, clkidx);
+			pr_err("%s: invalid clock %s index %u)\n",
+			       __func__, np->name, clkidx);
 			continue;
 		}
 
-		clks[clkidx] = cpg_mstp_clock_register(name, parent_name,
+		clks[clkidx] = cpg_mstp_clock_register(name ? name : np->name,
+						       parent_name,
 						       clkidx, group);
 		if (!IS_ERR(clks[clkidx])) {
 			group->data.clk_num = max(group->data.clk_num,
@@ -232,7 +230,8 @@ static void __init cpg_mstp_clocks_init(
 			 * FIXME: Remove this when all devices that require a
 			 * clock will be instantiated from DT.
 			 */
-			clk_register_clkdev(clks[clkidx], name, NULL);
+			if (name) /* only if clock-output-names is provided */
+				clk_register_clkdev(clks[clkidx], name, NULL);
 		} else {
 			pr_err("%s: failed to register %s %s clock (%ld)\n",
 			       __func__, np->name, name, PTR_ERR(clks[clkidx]));

Re: [PATCH v3 02/04] clk: shmobile: Make MSTP clock-output-names optional

[Laurent Pinchart]

Hi Magnus,

Thank you for the patch.

On Friday 28 August 2015 18:16:13 Magnus Damm wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
> 
> This patch updates the MSTP driver to make the "clock-output-names"
> DT property optional instead of mandatory. In case the DT property
> is omitted then the function clk_register_clkdev() is skipped.
> 
> The default for new SoCs is to not use "clock-output-names".
> 
> This version of the patch is kind of early, so please handle with care.
> So far the patch has only been tested with a single MSTP clock. =)
> 
> Not-Yet-Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---
> 
>  drivers/clk/shmobile/clk-mstp.c |   15 +++++++--------
>  1 file changed, 7 insertions(+), 8 deletions(-)
> 
> --- 0001/drivers/clk/shmobile/clk-mstp.c
> +++ work/drivers/clk/shmobile/clk-mstp.c	2015-08-28 15:03:28.002366518 
+0900
> @@ -198,15 +198,12 @@ static void __init cpg_mstp_clocks_init(
> 
>  	for (i = 0; i < MSTP_MAX_CLOCKS; ++i) {
>  		const char *parent_name;
> -		const char *name;
> +		const char *name = NULL;
>  		u32 clkidx;
>  		int ret;
> 
> -		/* Skip clocks with no name. */
>  		ret = of_property_read_string_index(np, "clock-output-names",
>  						    i, &name);

I think we can remove this completely.

> -		if (ret < 0 || strlen(name) = 0)
> -			continue;
> 
>  		parent_name = of_clk_get_parent_name(np, i);
>  		ret = of_property_read_u32_index(np, idxname, i, &clkidx);
> @@ -214,12 +211,13 @@ static void __init cpg_mstp_clocks_init(
>  			break;
> 
>  		if (clkidx >= MSTP_MAX_CLOCKS) {
> -			pr_err("%s: invalid clock %s %s index %u)\n",
> -			       __func__, np->name, name, clkidx);
> +			pr_err("%s: invalid clock %s index %u)\n",
> +			       __func__, np->name, clkidx);
>  			continue;
>  		}
> 
> -		clks[clkidx] = cpg_mstp_clock_register(name, parent_name,
> +		clks[clkidx] = cpg_mstp_clock_register(name ? name : np->name,

This would result in several clocks being registered with the same name. I 
would instead construct the name with sprintf(name, "%s.%u", np->name, 
clkidx).

> +						       parent_name,
>  						       clkidx, group);
>  		if (!IS_ERR(clks[clkidx])) {
>  			group->data.clk_num = max(group->data.clk_num,
> @@ -232,7 +230,8 @@ static void __init cpg_mstp_clocks_init(
>  			 * FIXME: Remove this when all devices that require a
>  			 * clock will be instantiated from DT.
>  			 */
> -			clk_register_clkdev(clks[clkidx], name, NULL);
> +			if (name) /* only if clock-output-names is provided */
> +				clk_register_clkdev(clks[clkidx], name, NULL);

Better than that, as all our devices are now instantiated from DT, we can 
remove the clk_register_clkdev() call completely as well as the FIXME comment.

>  		} else {
>  			pr_err("%s: failed to register %s %s clock (%ld)\n",
>  			       __func__, np->name, name, PTR_ERR(clks[clkidx]));

name can be NULL here, I'd use "%s.%u", np->name, clkidx.

-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 02/04] clk: shmobile: Make MSTP clock-output-names optional

[Geert Uytterhoeven]

On Fri, Aug 28, 2015 at 9:37 PM, Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>> @@ -214,12 +211,13 @@ static void __init cpg_mstp_clocks_init(
>>                       break;
>>
>>               if (clkidx >= MSTP_MAX_CLOCKS) {
>> -                     pr_err("%s: invalid clock %s %s index %u)\n",
>> -                            __func__, np->name, name, clkidx);
>> +                     pr_err("%s: invalid clock %s index %u)\n",
>> +                            __func__, np->name, clkidx);
>>                       continue;
>>               }
>>
>> -             clks[clkidx] = cpg_mstp_clock_register(name, parent_name,
>> +             clks[clkidx] = cpg_mstp_clock_register(name ? name : np->name,
>
> This would result in several clocks being registered with the same name. I

Indeed.

> would instead construct the name with sprintf(name, "%s.%u", np->name,
> clkidx).

Not using clock-output-names makes the clock's names and
/sys/kernel/debug/clk/clk_summary a bit harder to understand, though.

>> +                                                    parent_name,
>>                                                      clkidx, group);
>>               if (!IS_ERR(clks[clkidx])) {
>>                       group->data.clk_num = max(group->data.clk_num,
>> @@ -232,7 +230,8 @@ static void __init cpg_mstp_clocks_init(
>>                        * FIXME: Remove this when all devices that require a
>>                        * clock will be instantiated from DT.
>>                        */
>> -                     clk_register_clkdev(clks[clkidx], name, NULL);
>> +                     if (name) /* only if clock-output-names is provided */
>> +                             clk_register_clkdev(clks[clkidx], name, NULL);
>
> Better than that, as all our devices are now instantiated from DT, we can
> remove the clk_register_clkdev() call completely as well as the FIXME comment.

Unfortunately we cannot remove this yet, as board staging (e.g. Armadillo
LCDC) depends on it (been there, done that).

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v3 03/04] clk: shmobile: Add Renesas R-Car Gen3 CPG support

[Magnus Damm]

From: Gaku Inami <gaku.inami.xw@bp.renesas.com>

This patch adds very initial CPG support.
R-Car Gen3 write function should use CPG write protection method
which is shared with MSTP driver. This patch has it but not used.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
---

 Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt |   31 +
 drivers/clk/shmobile/Makefile                                            |    1 
 drivers/clk/shmobile/clk-rcar-gen3.c                                     |  252 ++++++++++
 3 files changed, 284 insertions(+)

--- /dev/null
+++ work/Documentation/devicetree/bindings/clock/renesas,rcar-gen3-cpg-clocks.txt	2015-08-28 15:04:28.422366518 +0900
@@ -0,0 +1,31 @@
+* Renesas R-Car Gen3 Clock Pulse Generator (CPG)
+
+The CPG generates core clocks for the R-Car Gen3 SoCs. It includes three PLLs
+and several fixed ratio dividers.
+
+Required Properties:
+
+  - compatible: Must be one of
+    - "renesas,r8a7795-cpg-clocks" for the r8a7795 CPG
+    - "renesas,rcar-gen3-cpg-clocks" for the generic R-Car Gen3 CPG
+
+  - reg: Base address and length of the memory resource used by the CPG
+
+  - clocks: References to the parent clocks: first to the EXTAL clock
+  - #clock-cells: Must be 1
+  - clock-output-names: The names of the clocks. Supported clocks are
+    "main", "pll0", "pll1", "pll2", "pll3", "pll4"
+
+
+Example
+-------
+
+	cpg_clocks: cpg_clocks@e6150000 {
+		compatible = "renesas,r8a7795-cpg-clocks",
+			     "renesas,rcar-gen3-cpg-clocks";
+		reg = <0 0xe6150000 0 0x1000>;
+		clocks = <&extal_clk>;
+		#clock-cells = <1>;
+		clock-output-names = "main", "pll0", "pll1","pll2",
+				     "pll3", "pll4";
+	};
--- 0003/drivers/clk/shmobile/Makefile
+++ work/drivers/clk/shmobile/Makefile	2015-08-28 15:04:27.402366518 +0900
@@ -8,4 +8,5 @@ obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-
 obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
 obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
 obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7795)		+= clk-rcar-gen3.o clk-mstp.o clk-div6.o
 obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o clk-mstp.o clk-div6.o
--- /dev/null
+++ work/drivers/clk/shmobile/clk-rcar-gen3.c	2015-08-28 15:05:47.202366518 +0900
@@ -0,0 +1,252 @@
+/*
+ * rcar_gen3 Core CPG Clocks
+ *
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ *
+ * Based on rcar_gen2 Core CPG Clocks driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/clk/shmobile.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/math64.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/spinlock.h>
+
+#define RCAR_GEN3_CLK_MAIN	0
+#define RCAR_GEN3_CLK_PLL0	1
+#define RCAR_GEN3_CLK_PLL1	2
+#define RCAR_GEN3_CLK_PLL2	3
+#define RCAR_GEN3_CLK_PLL3	4
+#define RCAR_GEN3_CLK_PLL4	5
+
+static const char * const rcar_gen3_clk_names[] = {
+	[RCAR_GEN3_CLK_MAIN] = "main",
+	[RCAR_GEN3_CLK_PLL0] = "pll0",
+	[RCAR_GEN3_CLK_PLL1] = "pll1",
+	[RCAR_GEN3_CLK_PLL2] = "pll2",
+	[RCAR_GEN3_CLK_PLL3] = "pll3",
+	[RCAR_GEN3_CLK_PLL4] = "pll4",
+};
+
+struct rcar_gen3_cpg {
+	struct clk_onecell_data data;
+	spinlock_t lock;
+	void __iomem *reg;
+};
+
+#define CPG_PLL0CR	0x00d8
+#define CPG_PLL2CR	0x002c
+
+/*
+ * common function
+ */
+#define rcar_clk_readl(cpg, _reg) clk_readl(cpg->reg + _reg)
+
+/*
+ * Reset register definitions.
+ */
+#define MODEMR 0xe6160060
+
+static u32 rcar_gen3_read_mode_pins(void)
+{
+	static u32 mode;
+	static bool mode_valid;
+
+	if (!mode_valid) {
+		void __iomem *modemr = ioremap_nocache(MODEMR, 4);
+
+		BUG_ON(!modemr);
+		mode = ioread32(modemr);
+		iounmap(modemr);
+		mode_valid = true;
+	}
+
+	return mode;
+}
+
+/* -----------------------------------------------------------------------------
+ * CPG Clock Data
+ */
+
+/*
+ *   MD		EXTAL		PLL0	PLL1	PLL2	PLL3	PLL4
+ * 14 13 19 17	(MHz)		*1	*1	*1
+ *-------------------------------------------------------------------
+ * 0  0  0  0	16.66 x 1	x180/2	x192/2	x144/2	x192	x144
+ * 0  0  0  1	16.66 x 1	x180/2	x192/2	x144/2	x128	x144
+ * 0  0  1  0	Prohibited setting
+ * 0  0  1  1	16.66 x 1	x180/2	x192/2	x144/2	x192	x144
+ * 0  1  0  0	20    x 1	x150/2	x156/2	x120/2	x156	x120
+ * 0  1  0  1	20    x 1	x150/2	x156/2	x120/2	x106	x120
+ * 0  1  1  0	Prohibited setting
+ * 0  1  1  1	20    x 1	x150/2	x156/2	x120/2	x156	x120
+ * 1  0  0  0	25    x 1	x120/2	x128/2	x96/2	x128	x96
+ * 1  0  0  1	25    x 1	x120/2	x128/2	x96/2	x84	x96
+ * 1  0  1  0	Prohibited setting
+ * 1  0  1  1	25    x 1	x120/2	x128/2	x96/2	x128	x96
+ * 1  1  0  0	33.33 / 2	x180/2	x192/2	x144/2	x192	x144
+ * 1  1  0  1	33.33 / 2	x180/2	x192/2	x144/2	x128	x144
+ * 1  1  1  0	Prohibited setting
+ * 1  1  1  1	33.33 / 2	x180/2	x192/2	x144/2	x192	x144
+ *
+ * *1 : datasheet indicates VCO output (PLLx = VCO/2)
+ *
+ */
+#define CPG_PLL_CONFIG_INDEX(md)	((((md) & BIT(14)) >> 11) | \
+					 (((md) & BIT(13)) >> 11) | \
+					 (((md) & BIT(19)) >> 18) | \
+					 (((md) & BIT(17)) >> 17))
+struct cpg_pll_config {
+	unsigned int extal_div;
+	unsigned int pll1_mult;
+	unsigned int pll3_mult;
+	unsigned int pll4_mult;
+};
+
+static const struct cpg_pll_config cpg_pll_configs[16] __initconst = {
+/* EXTAL div	PLL1	PLL3	PLL4 */
+	{ 1,	192,	192,	144, },
+	{ 1,	192,	128,	144, },
+	{ 0,	0,	0,	0,   }, /* Prohibited setting */
+	{ 1,	192,	192,	144, },
+	{ 1,	156,	156,	120, },
+	{ 1,	156,	106,	120, },
+	{ 0,	0,	0,	0,   }, /* Prohibited setting */
+	{ 1,	156,	156,	120, },
+	{ 1,	128,	128,	96,  },
+	{ 1,	128,	84,	96,  },
+	{ 0,	0,	0,	0,   }, /* Prohibited setting */
+	{ 1,	128,	128,	96,  },
+	{ 2,	192,	192,	144, },
+	{ 2,	192,	128,	144, },
+	{ 0,	0,	0,	0,   }, /* Prohibited setting */
+	{ 2,	192,	192,	144, },
+};
+
+/* -----------------------------------------------------------------------------
+ * Initialization
+ */
+
+static u32 cpg_mode __initdata;
+
+static struct clk * __init
+rcar_gen3_cpg_register_clock(struct device_node *np, struct rcar_gen3_cpg *cpg,
+			     const struct cpg_pll_config *config,
+			     unsigned int gen3_clk)
+{
+	const char *parent_name = rcar_gen3_clk_names[RCAR_GEN3_CLK_MAIN];
+	unsigned int mult = 1;
+	unsigned int div = 1;
+	u32 value;
+
+	switch (gen3_clk) {
+	case RCAR_GEN3_CLK_MAIN:
+		parent_name = of_clk_get_parent_name(np, 0);
+		div = config->extal_div;
+		break;
+	case RCAR_GEN3_CLK_PLL0:
+		/* PLL0 is a configurable multiplier clock. Register it as a
+		 * fixed factor clock for now as there's no generic multiplier
+		 * clock implementation and we currently have no need to change
+		 * the multiplier value.
+		 */
+		value = rcar_clk_readl(cpg, CPG_PLL0CR);
+		mult = ((value >> 24) & ((1 << 7) - 1)) + 1;
+		break;
+	case RCAR_GEN3_CLK_PLL1:
+		mult = config->pll1_mult / 2;
+		break;
+	case RCAR_GEN3_CLK_PLL2:
+		/* PLL2 is a configurable multiplier clock. Register it as a
+		 * fixed factor clock for now as there's no generic multiplier
+		 * clock implementation and we currently have no need to change
+		 * the multiplier value.
+		 */
+		value = rcar_clk_readl(cpg, CPG_PLL2CR);
+		mult = ((value >> 24) & ((1 << 7) - 1)) + 1;
+		break;
+	case RCAR_GEN3_CLK_PLL3:
+		mult = config->pll3_mult;
+		break;
+	case RCAR_GEN3_CLK_PLL4:
+		mult = config->pll4_mult;
+		break;
+	default:
+		return ERR_PTR(-EINVAL);
+	}
+
+	return clk_register_fixed_factor(NULL, rcar_gen3_clk_names[gen3_clk],
+					 parent_name, 0, mult, div);
+}
+
+static void __init rcar_gen3_cpg_clocks_init(struct device_node *np)
+{
+	const struct cpg_pll_config *config;
+	struct rcar_gen3_cpg *cpg;
+	struct clk **clks;
+	unsigned int i;
+	int num_clks;
+
+	cpg_mode = rcar_gen3_read_mode_pins();
+
+	num_clks = of_property_count_strings(np, "clock-indices");
+	if (num_clks < 0) {
+		pr_err("%s: failed to count clocks\n", __func__);
+		return;
+	}
+
+	cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
+	clks = kzalloc((num_clks * sizeof(*clks)), GFP_KERNEL);
+	if (cpg = NULL || clks = NULL) {
+		/* We're leaking memory on purpose, there's no point in cleaning
+		 * up as the system won't boot anyway.
+		 */
+		pr_err("%s: failed to allocate cpg\n", __func__);
+		return;
+	}
+
+	spin_lock_init(&cpg->lock);
+
+	cpg->data.clks = clks;
+	cpg->data.clk_num = num_clks;
+
+	cpg->reg = of_iomap(np, 0);
+	if (WARN_ON(cpg->reg = NULL))
+		return;
+
+	config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)];
+	if (!config->extal_div) {
+		pr_err("%s: Prohibited setting (cpg_mode=0x%x)\n",
+		       __func__, cpg_mode);
+		return;
+	}
+
+	for (i = 0; i < num_clks; ++i) {
+		struct clk *clk;
+		u32 idx;
+		int ret;
+
+		ret = of_property_read_u32_index(np, "clock-indices", i, &idx);
+		if (ret < 0)
+			break;
+
+		clk = rcar_gen3_cpg_register_clock(np, cpg, config, idx);
+		if (IS_ERR(clk))
+			pr_err("%s: failed to register %s %u clock (%ld)\n",
+			       __func__, np->name, idx, PTR_ERR(clk));
+		else
+			cpg->data.clks[idx] = clk;
+	}
+
+	of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
+}
+CLK_OF_DECLARE(rcar_gen3_cpg_clks, "renesas,rcar-gen3-cpg-clocks",
+	       rcar_gen3_cpg_clocks_init);

Re: [PATCH v3 03/04] clk: shmobile: Add Renesas R-Car Gen3 CPG support

[Stephen Boyd]

On 08/28, Magnus Damm wrote:
> From: Gaku Inami <gaku.inami.xw@bp.renesas.com>
> 
> This patch adds very initial CPG support.
> R-Car Gen3 write function should use CPG write protection method
> which is shared with MSTP driver. This patch has it but not used.
> 
> Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> ---

I think I already reviewed this, but it looks like none of the
comments were addressed in this posting

http://lkml.kernel.org/r/20150825224638.GL19120@codeaurora.org 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH v3 03/04] clk: shmobile: Add Renesas R-Car Gen3 CPG support

[Geert Uytterhoeven]

On Fri, Aug 28, 2015 at 11:16 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> From: Gaku Inami <gaku.inami.xw@bp.renesas.com>
>
> This patch adds very initial CPG support.
> R-Car Gen3 write function should use CPG write protection method
> which is shared with MSTP driver. This patch has it but not used.

The last sentence is very confusing. I think it should be removed?

> Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 03/04] clk: shmobile: Add Renesas R-Car Gen3 CPG support

[Magnus Damm]

Hi Geert,

On Sat, Aug 29, 2015 at 5:46 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Fri, Aug 28, 2015 at 11:16 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> From: Gaku Inami <gaku.inami.xw@bp.renesas.com>
>>
>> This patch adds very initial CPG support.
>> R-Car Gen3 write function should use CPG write protection method
>> which is shared with MSTP driver. This patch has it but not used.
>
> The last sentence is very confusing. I think it should be removed?

I agree it is confusing. I've reworked the commit log message in the
latest version.

Thanks,

/ magnus

[PATCH v3 04/04] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support

[Magnus Damm]

From: Magnus Damm <damm+renesas@opensource.se>

Shmobile is all multiplatform these days, so get rid of the
reference to CONFIG_ARCH_SHMOBILE_MULTI. Also instead of always
enabling DIV6 and MSTP adjust the Makefile to enable DIV6 and
MSTP depending on if they are included in the SoC or not.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---

 Changes since V2:
 - Fixed patch subject typo CONFIG_SHMOBILE_MULTI -> CONFIG_ARCH_SHMOBILE_MULTI

 Changes since V1:
 - dropped DIV6 from R-Car Gen1 variants - thanks Geert!

 drivers/clk/Makefile          |    2 +-
 drivers/clk/shmobile/Makefile |   22 ++++++++++------------
 2 files changed, 11 insertions(+), 13 deletions(-)

--- 0001/drivers/clk/Makefile
+++ work/drivers/clk/Makefile	2015-08-26 16:39:50.052366518 +0900
@@ -66,7 +66,7 @@ obj-$(CONFIG_COMMON_CLK_PXA)		+= pxa/
 obj-$(CONFIG_COMMON_CLK_QCOM)		+= qcom/
 obj-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip/
 obj-$(CONFIG_COMMON_CLK_SAMSUNG)	+= samsung/
-obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= shmobile/
+obj-$(CONFIG_ARCH_SHMOBILE)		+= shmobile/
 obj-$(CONFIG_ARCH_SIRF)			+= sirf/
 obj-$(CONFIG_ARCH_SOCFPGA)		+= socfpga/
 obj-$(CONFIG_PLAT_SPEAR)		+= spear/
--- 0001/drivers/clk/shmobile/Makefile
+++ work/drivers/clk/shmobile/Makefile	2015-08-26 16:40:04.832366518 +0900
@@ -1,13 +1,11 @@
 obj-$(CONFIG_ARCH_EMEV2)		+= clk-emev2.o
-obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o
-obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o
-obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o
-obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o
-obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o
-obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o
-obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o
-obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-div6.o
-obj-$(CONFIG_ARCH_SHMOBILE_MULTI)	+= clk-mstp.o
+obj-$(CONFIG_ARCH_R7S72100)		+= clk-rz.o clk-mstp.o
+obj-$(CONFIG_ARCH_R8A73A4)		+= clk-r8a73a4.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7740)		+= clk-r8a7740.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7778)		+= clk-r8a7778.o clk-mstp.o
+obj-$(CONFIG_ARCH_R8A7779)		+= clk-r8a7779.o clk-mstp.o
+obj-$(CONFIG_ARCH_R8A7790)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7791)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7793)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_R8A7794)		+= clk-rcar-gen2.o clk-mstp.o clk-div6.o
+obj-$(CONFIG_ARCH_SH73A0)		+= clk-sh73a0.o clk-mstp.o clk-div6.o

Re: [PATCH v3 04/04] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support

[Geert Uytterhoeven]

On Fri, Aug 28, 2015 at 11:16 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
> From: Magnus Damm <damm+renesas@opensource.se>
>
> Shmobile is all multiplatform these days, so get rid of the
> reference to CONFIG_ARCH_SHMOBILE_MULTI. Also instead of always
> enabling DIV6 and MSTP adjust the Makefile to enable DIV6 and
> MSTP depending on if they are included in the SoC or not.
>
> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>
>  Changes since V2:
>  - Fixed patch subject typo CONFIG_SHMOBILE_MULTI -> CONFIG_ARCH_SHMOBILE_MULTI

The subject doesn't seem to match the patch at all?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3 04/04] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support

[Magnus Damm]

Hi Geert,

On Fri, Aug 28, 2015 at 6:19 PM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Fri, Aug 28, 2015 at 11:16 AM, Magnus Damm <magnus.damm@gmail.com> wrote:
>> From: Magnus Damm <damm+renesas@opensource.se>
>>
>> Shmobile is all multiplatform these days, so get rid of the
>> reference to CONFIG_ARCH_SHMOBILE_MULTI. Also instead of always
>> enabling DIV6 and MSTP adjust the Makefile to enable DIV6 and
>> MSTP depending on if they are included in the SoC or not.
>>
>> Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
>> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> ---
>>
>>  Changes since V2:
>>  - Fixed patch subject typo CONFIG_SHMOBILE_MULTI -> CONFIG_ARCH_SHMOBILE_MULTI
>
> The subject doesn't seem to match the patch at all?

Yes, correct - I seem to have messed up something! Will fix.

Thanks,

/ magnus

Re: [PATCH v3 00/04] Renesas R-Car Gen3 CPG support V3

[Stephen Boyd]

On 08/28, Magnus Damm wrote:
> Renesas R-Car Gen3 CPG support V3
> 
> [PATCH v3 01/04] clk: shmobile: Get rid of CONFIG_ARCH_SHMOBILE_MULTI
> [PATCH v3 02/04] clk: shmobile: Make MSTP clock-output-names optional
> [PATCH v3 03/04] clk: shmobile: Add Renesas R-Car Gen3 CPG support
> [PATCH v3 04/04] clk: shmobile: rcar-gen3: Add CPG/MSTP Clock Domain support
> 
> This series is the first attempt to take the CCF code from the single patch:
> "[PATCH 1/9] clk: shmobile: add Renesas R-Car Gen3 CPG support"
> to a full series of various CCF related updates related to R-Car Gen3.
> 
> In this series patch 1 and 2 get rid of CONFIG_ARCH_SHMOBILE_MULTI kconfig
> bits and converts the MSTP CCF driver to not rely on clock-output-names. The
> latter may need a bit more work.
> 
> Patch 3 and 4 introduce an updated R-Car Gen3 CPG driver where I have reworked
> the code to not depend on clock-output-names instead of using strings simply
> rely on RCAR_GEN3_CLK_xxx. Those must match the ABI defined in SoC specific
> indicies such as the ones included in r8a7795-clock.h.
> 
> Patch 3 most likely needs to be reworked further to incorporate earlier
> feedback from CCF maintainers.

Oh I should have read the cover letter first. Doh.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project