From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27E4FC43334 for ; Mon, 13 Jun 2022 18:24:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239718AbiFMSYd (ORCPT ); Mon, 13 Jun 2022 14:24:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230507AbiFMSXH (ORCPT ); Mon, 13 Jun 2022 14:23:07 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34436ABF4B; Mon, 13 Jun 2022 07:32:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1655130745; x=1686666745; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ujiwlsqt2KBvF1qvv4tJ1iHQFhwag7L0iIc7Ytjnd0s=; b=lsUuFmEZ1hsnq4DkDDWYnAH+0vL3lI1K0PJ+FEMnm7NEjCvk/HkEeGJa X9UWYbHa0Rxm5JHw9PA47BoHbCyxLOU5ZWlC9ivwPSEAt7zJnTSH/LLEe ajIwmWbkbg2RA6DEyMFhal+zn7ehfpubB++WUWpvuCYtANGQgNDmDEZpw OCHHoQrv5w3a2CaLCjwYSLKrwrn6HrcCnElNyyeNxveKwgJDLStApYXHX rP9sxl9Cz3s0vxstU3NajnA3+eLtSYVkvkectRZRV9VRv5dIaFPbWX3Vy DeI6eVNqHQJsrbk+lQeEc0KgZvAwkOOa97MiHNqMJ8B504IGrkVOn2WcG A==; X-IronPort-AV: E=McAfee;i="6400,9594,10377"; a="275831886" X-IronPort-AV: E=Sophos;i="5.91,297,1647327600"; d="scan'208";a="275831886" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jun 2022 07:32:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,297,1647327600"; d="scan'208";a="673325163" Received: from irvmail001.ir.intel.com ([10.43.11.63]) by FMSMGA003.fm.intel.com with ESMTP; 13 Jun 2022 07:32:09 -0700 Received: from newjersey.igk.intel.com (newjersey.igk.intel.com [10.102.20.203]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id 25DEW7CD026902; Mon, 13 Jun 2022 15:32:07 +0100 From: Alexander Lobakin To: Andy Shevchenko Cc: Alexander Lobakin , Arnd Bergmann , Yury Norov , "Mark Rutland" , Matt Turner , Brian Cain , Geert Uytterhoeven , "Yoshinori Sato" , Rich Felker , "David S. Miller" , Kees Cook , "Peter Zijlstra (Intel)" , Marco Elver , Borislav Petkov , Tony Luck , "Greg Kroah-Hartman" , linux-alpha@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-ia64@vger.kernel.org, linux-m68k@lists.linux-m68k.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 4/6] bitops: define const_*() versions of the non-atomics Date: Mon, 13 Jun 2022 16:30:34 +0200 Message-Id: <20220613143034.1176680-1-alexandr.lobakin@intel.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: References: <20220610113427.908751-1-alexandr.lobakin@intel.com> <20220610113427.908751-5-alexandr.lobakin@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org From: Andy Shevchenko Date: Fri, 10 Jun 2022 16:56:28 +0300 > On Fri, Jun 10, 2022 at 01:34:25PM +0200, Alexander Lobakin wrote: > > Define const_*() variants of the non-atomic bitops to be used when > > the input arguments are compile-time constants, so that the compiler > > will be always to resolve those to compile-time constants as well. > > Those are mostly direct aliases for generic_*() with one exception > > for const_test_bit(): the original one is declared atomic-safe and > > thus doesn't discard the `volatile` qualifier, so in order to let > > optimize the code, define it separately disregarding the qualifier. > > Add them to the compile-time type checks as well just in case. > > ... > > > /* Check that the bitops prototypes are sane */ > > #define __check_bitop_pr(name) \ > > - static_assert(__same_type(arch_##name, generic_##name) && \ > > + static_assert(__same_type(const_##name, generic_##name) && \ > > + __same_type(arch_##name, generic_##name) && \ > > __same_type(name, generic_##name)) > > Can't it be a one line change and actually keeping ordering at the same time? Sure. Wanted to sort them "semantically", but it doesn't really make any sense in here. > > -- > With Best Regards, > Andy Shevchenko Thanks, Olek