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[82.69.66.36]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-47f464c30a9sm24929886f8f.31.2026.07.16.10.52.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jul 2026 10:52:10 -0700 (PDT) Date: Thu, 16 Jul 2026 18:52:08 +0100 From: David Laight To: John Paul Adrian Glaubitz Cc: Florian Fuchs , Rich Felker , linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] sh: uaccess: Require offsettable operands for 64-bit user access Message-ID: <20260716185208.74ed22fa@pumpkin> In-Reply-To: References: <20260716165329.3418962-1-fuchsfl@gmail.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; arm-unknown-linux-gnueabihf) Precedence: bulk X-Mailing-List: linux-sh@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 16 Jul 2026 19:05:03 +0200 John Paul Adrian Glaubitz wrote: > Hi Florian, > > On Thu, 2026-07-16 at 18:53 +0200, Florian Fuchs wrote: > > The 64-bit __get_user_u64()/__put_user_u64() paths address the memory > > operand as %T2 (base+4). This base+4 requires an offsettable address, > > but "m" also allows the indexed mode @(R0,Rn) (e.g. for a variable- > > indexed array element), which has no displacement field for the +4. > > Depending on optimization this build fails with "invalid 'asm'" or an > > ICE in GCC's change_address_1. > > > > Require an offsettable memory operand, allowing GCC to reload an > > unsuitable indexed address into an appropriate form. An alternative would be to pass 'addr' and 'addr + 4' separately so that the C compilation adds in the offset. With a bit more effort the define wouldn't need repeating for LE and BE. There is a bug in the __put_user_u64 code - it is missing the exception table entry for the second word. (It is present in __get_user_u64, but a separate label would be better.) I also wonder whether there should be non-mmu copies? David