Re: [PATCH 2/2] ARM: shmobile: r8a7794: alt: Enable ethernet controller

[Laurent Pinchart <laurent.pinchart@ideasonboard.com>]

Hi Stephen,

On Monday 09 February 2015 14:36:17 Stephen Lawrence wrote:
> On 05 February 2015 12:18 Laurent Pinchart wrote:
> 
> [snip]
> 
> >>>>> The hardware manual tells me the PHY uses IRQ8#, not IRQ0#.
> >>>> 
> >>>> I don't have the complete Alt schematics.
> >>> 
> >>> I don't have *any* Alt schematics, only SILK.
> >> 
> >> And SILK also has the PHY IRQ connected to IRQ8#.
> >> 
> >>>> I've double-checked the block
> >>>> diagram and it mentions "GP1_24(IRQ)"
> >>> 
> >>> GP1_24 is connected to the PHY's RST# pin, according to the hardware
> >>> manual. Which seems bad to me -- we hardly needed such kind of reset
> >>> with the device tree. :-/ Hopefully, U-Boot leaves it high...
> >>> 
> >>>> next to the PHY. This patch is thus
> >>>> incorrect, but where did you find a mention of IRQ8 ?
> >>> 
> >>> In the Alt hardware manual, rev. 0.04. :-)
> >> 
> >> Mentioned in several places there.
> >> 
> >> Probably it makes sense to compare the dates of our documents. The
> >> aforementioned manual is dated June 4, 2014.
> > 
> > The block diagram I have mentions "Rev0.04 Nov 22, 2013", as well as
> > "PRELIMINARY". Let's use IRQ8 then. IRQ0 is clearly wrong anyway, and we
> > can always fix this later if the hardware manual is wrong.
> 
> The Alt schematics I have (rev 0.18 April 24 2014) match what you are
> saying. RST# on the PHY connected to GP1_24 and INTRP to IRQ8# with pull
> and pull down resistors as shown in the h/w manual 0.04 Debug Ether block
> diagram.

Thank you for the information.

I've been able to test IRQ8 and the PHY generates a single interrupt, as 
expected. I'll send a v2.

-- 
Regards,

Laurent Pinchart