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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH v4 00/15] Renesas CMT, MTU2 and TMU platform cleanups
Date: Fri, 02 May 2014 17:10:58 +0000	[thread overview]
Message-ID: <2729086.8bkruH6OHa@avalon> (raw)
In-Reply-To: <1398163856-7379-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>

On Friday 02 May 2014 05:49:41 Geert Uytterhoeven wrote:
> On Fri, May 2, 2014 at 3:40 AM, Simon Horman <horms@verge.net.au> wrote:
> >> I've attached a debugging patch to this e-mail. Could you please boot the
> >> BockW board with that patch applied before (working) and after (broken)
> >> applying "ARM: shmobile: r8a7778: Switch to new style TMU device" and
> >> provide me with the two boot logs ?
> > 
> > Sure, please see the attached logs.
> 
> Relevant part of the difference:
> 
>  sh_tmu sh_tmu.0: MSTP clock 16 @ffc80030
> -sh_tmu sh_tmu.0: phys base 0xffd80008 virt base d0964008 size 12
> +sh_tmu sh_tmu.0: phys base 0xffd80000 virt base d0964000 size 48
>  sh_tmu sh_tmu.0: ch0: base d0964008
>  sh_tmu sh_tmu.0: ch0: used for clock events
>  sh_tmu sh_tmu.0: ch0: used for periodic clock events
>  sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> -sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> +sh_tmu sh_tmu.0: ch0: writing TSTR @d0964004
>  sh_tmu sh_tmu.0: ch0: clock rate is 16666666
>  sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> +sh_tmu sh_tmu.0: ch0: writing TSTR @d0964004
>  sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> +sh_tmu sh_tmu.0: ch0: writing TSTR @d0964004
>  sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> -sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> -sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> -sh_tmu sh_tmu.0: ch0: reading TSTR @d0964004
> -sh_tmu sh_tmu.0: ch0: requesting IRQ 64 for clock event device
> 
> irq64 (good)
> 
> -sh_tmu sh_tmu.1: MSTP clock 15 @ffc80030
> -sh_tmu sh_tmu.1: phys base 0xffd80014 virt base d0966014 size 12
> -sh_tmu sh_tmu.1: ch1: base d0966014
> -sh_tmu sh_tmu.1: ch1: failed to get irq
> +sh_tmu sh_tmu.0: ch0: writing TSTR @d0964004
> +sh_tmu sh_tmu.0: ch0: requesting IRQ 96 for clock event device
> 
> irq96 (bad)

Indeed.

My bad. *sigh*

Simon, I've sent v5 of 12/15. This should fix the BockW boot issue. I assume 
you won't have time to apply the series before leaving for holidays (of 
course, if you can, I won't complain :-)). Do you think there will still be 
time to get it in v3.16 when you'll return ?

> +sh_tmu sh_tmu.0: ch1: base d0964014
> +sh_tmu sh_tmu.0: ch1: used as clock source
> +sh_tmu sh_tmu.0: ch1: reading TSTR @d0964004
> +sh_tmu sh_tmu.0: ch1: writing TSTR @d0964004
> +sh_tmu sh_tmu.0: ch1: clock rate is 16666666
> +sh_tmu sh_tmu.0: ch1: reading TSTR @d0964004
> +sh_tmu sh_tmu.0: ch1: writing TSTR @d0964004
> +Switched to clocksource sh-tmu.0

-- 
Regards,

Laurent Pinchart


  parent reply	other threads:[~2014-05-02 17:10 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-22 10:50 [PATCH v4 00/15] Renesas CMT, MTU2 and TMU platform cleanups Laurent Pinchart
2014-04-23  2:06 ` Simon Horman
2014-04-23 11:09 ` Laurent Pinchart
2014-04-24  0:21 ` Simon Horman
2014-05-01 16:51 ` Laurent Pinchart
2014-05-02  1:40 ` Simon Horman
2014-05-02  3:49 ` Geert Uytterhoeven
2014-05-02 17:10 ` Laurent Pinchart [this message]
2014-05-11  0:11 ` Simon Horman

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