From: Dan Williams <dan.j.williams@intel.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 2/3 v3] sh: fix Transfer Size calculation in both DMA
Date: Tue, 02 Feb 2010 23:59:15 +0000 [thread overview]
Message-ID: <4B68BC53.9020700@intel.com> (raw)
In-Reply-To: <Pine.LNX.4.64.1002011958290.4617@axis700.grange>
Guennadi Liakhovetski wrote:
> Both the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers
> do not take into account bits 3:2 of the Transfer Size field in the CHCR
> register, besides, bit-field defines set bit 2, but the mask only passes bits
> 1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all
> these issues for sh7722 and sh7724, other CPUs stay unchanged and might need to
> be fixed too.
Is this fix targeted at 2.6.33/stable or the next merge window?
next prev parent reply other threads:[~2010-02-02 23:59 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-02-01 19:03 [PATCH 2/3 v3] sh: fix Transfer Size calculation in both DMA drivers Guennadi Liakhovetski
2010-02-02 23:59 ` Dan Williams [this message]
2010-02-03 0:16 ` [PATCH 2/3 v3] sh: fix Transfer Size calculation in both DMA Guennadi Liakhovetski
2010-02-03 7:05 ` Dan Williams
2010-02-03 17:58 ` Dan Williams
2010-02-03 22:26 ` [PATCH 2/3 v3] sh: fix Transfer Size calculation in both DMA drivers Paul Mundt
2010-02-04 1:47 ` [PATCH 2/3 v3] sh: fix Transfer Size calculation in both DMA Dan Williams
2010-02-04 5:26 ` [PATCH 2/3 v3] sh: fix Transfer Size calculation in both DMA drivers Paul Mundt
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