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From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH] sh: fix clock framework on SH7757
Date: Fri, 07 May 2010 10:06:43 +0000	[thread overview]
Message-ID: <4BE3E633.60004@renesas.com> (raw)
In-Reply-To: <4BE3DB68.1040503@renesas.com>

Paul Mundt wrote:
> On Fri, May 07, 2010 at 06:20:40PM +0900, Yoshihiro Shimoda wrote:
>>  - fix the recalc function's prototype
>>  - This CPU don't have FRQCR
>>
> Does it have FRQMR?

No, it doesn't have FRQMR.
But datasheet wasn't written it, actually this cpu may has this register.
I will ask persion in charge about it.

> Does it support variable settings? If so, this just breaks it even
> further since you're just limiting it to one arbitrary configuration.

This CPU has two clock mode. So I have to implement those mode.

> You can look at the updated SH7785 and SH7786 clock frameworks for an
> idea of how to deal with the FRQMR handling and MSTP-bits-as-clocks.
> 
> Any updates to existing subtypes in the clock framework should be moving
> them over to the new interfaces, rather than perpetuating a hardcoded
> pclk and divisors/multipliers for values that aren't fixed by the PLL.

OK. I will study new clock framework and modify this code next week.

Thanks,
Yoshihiro Shimoda

      parent reply	other threads:[~2010-05-07 10:06 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-05-07  9:20 [PATCH] sh: fix clock framework on SH7757 Yoshihiro Shimoda
2010-05-07  9:26 ` Paul Mundt
2010-05-07 10:06 ` Yoshihiro Shimoda [this message]

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