From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 8/8] ARM: shmobile: henninger: Add dummy PCIe bus clock
Date: Mon, 16 Jun 2014 22:55:27 +0000 [thread overview]
Message-ID: <539F75DF.2080901@cogentembedded.com> (raw)
In-Reply-To: <1401261843-6964-9-git-send-email-phil.edworthy@renesas.com>
Hello.
On 06/12/2014 08:47 PM, Sergei Shtylyov wrote:
>>>>> Since the CPU's dtsi refers to pcie_bus_clock, we need an entry in
>>>>> the board's dts, even if we aren't using PCIe.
>>>> I don't quite understand that last part: there's PCIe slot in the
>>>> Henninger's schematics (although it doesn't seem to be soldered in the
>>>> early board version).
>>> In fact, we're in process of verifying PCIe on Henninger (soldered the
>>> connector); at least the configuration space accesses work OK...
>> Do you mean the internal Root-Complex config accesses work ok, or card ones?
> We inserted an Intel Wi-Fi card and saw PCI-PCI bridge and network
> controller in lspci's output. Another (Ethernet) card didn't work though...
That PCI-PCI bridge has ID 1912:001f which corresponds to Renesas. I guess
it's a part of the PCIe controller and then I wonder why this device is not
seen when no card is inserted...
WBR, Sergei
next prev parent reply other threads:[~2014-06-16 22:55 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-28 7:24 [PATCH 8/8] ARM: shmobile: henninger: Add dummy PCIe bus clock Phil Edworthy
2014-06-11 21:03 ` Sergei Shtylyov
2014-06-11 23:24 ` Sergei Shtylyov
2014-06-12 8:36 ` Phil Edworthy
2014-06-12 15:41 ` Phil Edworthy
2014-06-12 16:42 ` Sergei Shtylyov
2014-06-12 16:47 ` Sergei Shtylyov
2014-06-16 22:55 ` Sergei Shtylyov [this message]
2014-06-17 7:41 ` Phil Edworthy
2014-06-19 22:02 ` Sergei Shtylyov
2014-06-23 9:19 ` Phil Edworthy
2014-06-24 21:46 ` Sergei Shtylyov
2014-06-25 9:43 ` Phil Edworthy
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