* [PATCH RFC 6/7] ARM: shmobile: Do additional settings for L2shutdown mode
@ 2014-09-26 2:40 Khiem Nguyen
2014-09-26 9:30 ` Geert Uytterhoeven
2014-09-26 9:46 ` Khiem Nguyen
0 siblings, 2 replies; 3+ messages in thread
From: Khiem Nguyen @ 2014-09-26 2:40 UTC (permalink / raw)
To: linux-sh
According to Cortex-A15 TRM, some additional settings are needed.
Although the procedure was not completely same as in TRM, it was
referred to vexpress implementation to arrange order of additional
settings.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
---
arch/arm/mach-shmobile/platsmp-apmu.c | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
index dfa8a18..0dedb13 100644
--- a/arch/arm/mach-shmobile/platsmp-apmu.c
+++ b/arch/arm/mach-shmobile/platsmp-apmu.c
@@ -161,8 +161,32 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) || \
defined(CONFIG_CPU_IDLE)
+static void do_l2shutdown_settings(void)
+{
+ unsigned int v;
+
+ /* Disable L2$ prefetches */
+ asm volatile(
+ " mrc p15, 1, %0, c15, c0, 3\n"
+ " orr %0, %0, %1\n"
+ " mcr p15, 1, %0, c15, c0, 3\n"
+ : "=&r" (v)
+ : "Ir" (0x400)
+ : "cc");
+ isb();
+ dsb();
+
+ flush_cache_all();
+
+ /* Set Double lock control bit */
+ __asm__ __volatile__("mcr p14, 0, %0, c1, c3, 4" : : "r" (0x1));
+}
+
static inline void cpu_enter_lowpower_a15(void)
{
+ if (is_a15_l2shutdown)
+ do_l2shutdown_settings();
+
v7_exit_coherency_flush(louis);
}
@@ -245,6 +269,7 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state)
writel_relaxed(0x0, cpucmcr);
rcar_sysc_clear_event_status();
+ is_a15_l2shutdown = 0;
return 0;
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH RFC 6/7] ARM: shmobile: Do additional settings for L2shutdown mode
2014-09-26 2:40 [PATCH RFC 6/7] ARM: shmobile: Do additional settings for L2shutdown mode Khiem Nguyen
@ 2014-09-26 9:30 ` Geert Uytterhoeven
2014-09-26 9:46 ` Khiem Nguyen
1 sibling, 0 replies; 3+ messages in thread
From: Geert Uytterhoeven @ 2014-09-26 9:30 UTC (permalink / raw)
To: linux-sh
Hi Khiem-san,
On Fri, Sep 26, 2014 at 4:40 AM, Khiem Nguyen
<khiem.nguyen.xt@renesas.com> wrote:
> According to Cortex-A15 TRM, some additional settings are needed.
> Although the procedure was not completely same as in TRM, it was
> referred to vexpress implementation to arrange order of additional
> settings.
>
> Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
> ---
> arch/arm/mach-shmobile/platsmp-apmu.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
> index dfa8a18..0dedb13 100644
> --- a/arch/arm/mach-shmobile/platsmp-apmu.c
> +++ b/arch/arm/mach-shmobile/platsmp-apmu.c
> @@ -161,8 +161,32 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
>
> #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) || \
> defined(CONFIG_CPU_IDLE)
> +static void do_l2shutdown_settings(void)
> +{
> + unsigned int v;
> +
> + /* Disable L2$ prefetches */
> + asm volatile(
> + " mrc p15, 1, %0, c15, c0, 3\n"
> + " orr %0, %0, %1\n"
> + " mcr p15, 1, %0, c15, c0, 3\n"
> + : "=&r" (v)
> + : "Ir" (0x400)
> + : "cc");
> + isb();
> + dsb();
> +
> + flush_cache_all();
> +
> + /* Set Double lock control bit */
> + __asm__ __volatile__("mcr p14, 0, %0, c1, c3, 4" : : "r" (0x1));
> +}
> +
> static inline void cpu_enter_lowpower_a15(void)
> {
> + if (is_a15_l2shutdown)
> + do_l2shutdown_settings();
> +
> v7_exit_coherency_flush(louis);
> }
>
> @@ -245,6 +269,7 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state)
>
> writel_relaxed(0x0, cpucmcr);
> rcar_sysc_clear_event_status();
> + is_a15_l2shutdown = 0;
What's the purpose of clearing is_a15_l2shutdown here?
>
> return 0;
> }
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH RFC 6/7] ARM: shmobile: Do additional settings for L2shutdown mode
2014-09-26 2:40 [PATCH RFC 6/7] ARM: shmobile: Do additional settings for L2shutdown mode Khiem Nguyen
2014-09-26 9:30 ` Geert Uytterhoeven
@ 2014-09-26 9:46 ` Khiem Nguyen
1 sibling, 0 replies; 3+ messages in thread
From: Khiem Nguyen @ 2014-09-26 9:46 UTC (permalink / raw)
To: linux-sh
Hi Geert-san,
On 9/26/2014 6:30 PM, Geert Uytterhoeven wrote:
> Hi Khiem-san,
>
> On Fri, Sep 26, 2014 at 4:40 AM, Khiem Nguyen
> <khiem.nguyen.xt@renesas.com> wrote:
>> According to Cortex-A15 TRM, some additional settings are needed.
>> Although the procedure was not completely same as in TRM, it was
>> referred to vexpress implementation to arrange order of additional
>> settings.
>>
>> Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
>> ---
>> arch/arm/mach-shmobile/platsmp-apmu.c | 25 +++++++++++++++++++++++++
>> 1 file changed, 25 insertions(+)
>>
>> diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c
>> index dfa8a18..0dedb13 100644
>> --- a/arch/arm/mach-shmobile/platsmp-apmu.c
>> +++ b/arch/arm/mach-shmobile/platsmp-apmu.c
>> @@ -161,8 +161,32 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)
>>
>> #if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND) || \
>> defined(CONFIG_CPU_IDLE)
>> +static void do_l2shutdown_settings(void)
>> +{
>> + unsigned int v;
>> +
>> + /* Disable L2$ prefetches */
>> + asm volatile(
>> + " mrc p15, 1, %0, c15, c0, 3\n"
>> + " orr %0, %0, %1\n"
>> + " mcr p15, 1, %0, c15, c0, 3\n"
>> + : "=&r" (v)
>> + : "Ir" (0x400)
>> + : "cc");
>> + isb();
>> + dsb();
>> +
>> + flush_cache_all();
>> +
>> + /* Set Double lock control bit */
>> + __asm__ __volatile__("mcr p14, 0, %0, c1, c3, 4" : : "r" (0x1));
>> +}
>> +
>> static inline void cpu_enter_lowpower_a15(void)
>> {
>> + if (is_a15_l2shutdown)
>> + do_l2shutdown_settings();
>> +
>> v7_exit_coherency_flush(louis);
>> }
>>
>> @@ -245,6 +269,7 @@ static int shmobile_smp_apmu_enter_suspend(suspend_state_t state)
>>
>> writel_relaxed(0x0, cpucmcr);
>> rcar_sysc_clear_event_status();
>> + is_a15_l2shutdown = 0;
>
> What's the purpose of clearing is_a15_l2shutdown here?
As this bit was set in suspend processing,
it should be cleared in resume processing.
And this is to make sure L2shutdown setting is only executed within Suspend-to-RAM,
not CPUIdle/Core-Standby or CPU hotplug. :)
>>
>> return 0;
>> }
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
>
--
Best regards,
KHIEM Nguyen
^ permalink raw reply [flat|nested] 3+ messages in thread
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2014-09-26 2:40 [PATCH RFC 6/7] ARM: shmobile: Do additional settings for L2shutdown mode Khiem Nguyen
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2014-09-26 9:46 ` Khiem Nguyen
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