Re: [PATCH/RFC 04/10] ravb: Add support for r8a7795 SoC

[Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>]

On 8/28/2015 11:35 AM, Geert Uytterhoeven wrote:

> Thanks for the update!

> On Fri, Aug 28, 2015 at 10:27 AM, Simon Horman <horms@verge.net.au> wrote:
>> --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt
>> +++ b/Documentation/devicetree/bindings/net/renesas,ravb.txt
>> @@ -6,8 +6,12 @@ interface contains.
>>   Required properties:
>>   - compatible: "renesas,etheravb-r8a7790" if the device is a part of R8A7790 SoC.
>>                "renesas,etheravb-r8a7794" if the device is a part of R8A7794 SoC.
>> +             "renesas,etheravb-r8a7795" if the device is a part of R8A7795 SoC.
>>   - reg: offset and length of (1) the register block and (2) the stream buffer.
>> -- interrupts: interrupt specifier for the sole interrupt.
>> +- interrupts: interrupt specifiers.
>> +             One data and one emac interrupt for the R8A7795 SoC;

    Data?! What the heck does it mean? :-/

>> +             these interrupts must be named.
>> +              One named or unnamed data interrupt otherwise.
>>   - phy-mode: see ethernet.txt file in the same directory.
>>   - phy-handle: see ethernet.txt file in the same directory.
>>   - #address-cells: number of address cells for the MDIO bus, must be equal to 1.
>> @@ -18,6 +22,12 @@ Required properties:
>>   Optional properties:
>>   - interrupt-parent: the phandle for the interrupt controller that services
>>                      interrupts for this device.
>> +- interrupt-names: Names of named interrupts.
>> +                   If the property is present "data" is required.
>> +                   "emac" is also required for the R8A7795 SoC;
>> +                  it is prohibited otherwise.
>> +                  This property is mandatory for the R8A7795 SoC;
>> +                  optional otherwise.
>>   - pinctrl-names: pin configuration state name ("default").
>>   - renesas,no-ether-link: boolean, specify when a board does not provide a proper
>>                           AVB_LINK signal.
>
> What about the 25 channel interrupts?
> "data" and "emac" seem to use ch22 resp. ch 24 on Gen3.
>
> I'm afraid this will bite us one day.

    Me too. We should describe the real hardware, not how the driver uses it. 
Where does configuring the AVB interrupt mode happen?

> Gr{oetje,eeting}s,
>                          Geert

MBR, Sergei