[PATCH v3 00/20] SH pinctrl DT support

[PATCH v3 00/20] SH pinctrl DT support

[Laurent Pinchart]

Hello,

Here's the third version of the SuperH and SH Mobile pin controllers (PFC) DT
support patch set.

The patches are based on tags/renesas-next-20130513 from Simon's tree
(git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git), the R-Car
GPIO DT bindings proposal ("[RFC/PATCH 0/2] R-Car GPIO DT bindings") and the
marzen-reference ethernet patches ("[PATCH 0/2] marzen-reference ethernet
patches") I've previously posted. The result is available in my tree at

        git://linuxtv.org/pinchartl/fbdev.git pinmux/3.9/dt

The series is pretty self-explanatory. DT bindings are added in patch 01/20,
and the following patches gradually move SoC code and board code over to the
device tree for the armadilla800eva-reference, kzm9g-reference and
marzen-reference boards. The code has been tested on the three boards, but
only kzm9g can currently boot to userspace with network support due to lack of
DT bindings or other ethernet issues on the two other boards. armadillo800eva
and marzen have thus received less testing.

Comments will be very appreciated on the DT bindings (01/20). Points I'm a bit
unsure about include:

- Should the driver support pin configuration subnodes as currently
  implemented, or should the subnodes be promoted to regular pin configuration
  nodes, with clients referencing multiple nodes ?
- Should the driver allow mixing function and configuration properties in a pin
  configuration node as currently implemented, or should it restrict the pin
  configuration nodes to either a function or one (or more) configuration(s) ?
- Should we specify common bindings for pinconf-generic instead of using
  Renesas-specific properties ? (If the answer to this question is yes, please
  help :-)).

Changes since v2:

- Added pin configuration properties
- Rewrote all arch changes

Changes since v1:

- Fixed gpio cell number 2 documentation
- Added missing gpio-controller and #gpio-cells properties to r8a7740 DT
- Split kzm9g DT patch into SoC and board patches
- Dropped pinctrl mappings move to DT

Laurent Pinchart (20):
  sh-pfc: Add DT support
  ARM: shmobile: r8a73a4: Add pin control device to device tree
  ARM: shmobile: r8a7740: Add pin control device to device tree
  ARM: shmobile: r8a7778: Add pin control device to device tree
  ARM: shmobile: r8a7778: Add GPIO controller devices to device tree
  ARM: shmobile: r8a7779: Add pin control device to device tree
  ARM: shmobile: r8a7779: Add GPIO controller devices to device tree
  ARM: shmobile: r8a7790: Add pin control device to device tree
  ARM: shmobile: r8a7790: Add GPIO controller devices to device tree
  ARM: shmobile: sh7372: Add pin control device to device tree
  ARM: shmobile: sh73a0: Add pin control device to device tree
  ARM: shmobile: armadillo-reference: Move pinctrl mappings to device
    tree
  ARM: shmobile: armadillo-reference: Add st1232 pin mappings
  ARM: shmobile: armadillo-reference: Move st1232 reset GPIO to DT
  ARM: shmobile: armadillo-reference: Add LED1-LED4 to the device tree
  ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree
  ARM: shmobile: kzm9g-reference: Move SDHI regulators to DT
  ARM: shmobile: kzm9g-reference: Add LED1-LED4 to the device tree
  ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree
  ARM: shmobile: marzen-reference: Add LED2-LED4 to the device tree

 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 143 ++++++++++++
 arch/arm/boot/dts/r8a73a4.dtsi                     |   7 +
 .../boot/dts/r8a7740-armadillo800eva-reference.dts |  33 +++
 arch/arm/boot/dts/r8a7740.dtsi                     |   8 +
 arch/arm/boot/dts/r8a7778.dtsi                     |  50 +++++
 arch/arm/boot/dts/r8a7779-marzen-reference.dts     |  48 ++++
 arch/arm/boot/dts/r8a7779.dtsi                     |  69 ++++++
 arch/arm/boot/dts/r8a7790.dtsi                     |  59 +++++
 arch/arm/boot/dts/sh7372.dtsi                      |   8 +
 arch/arm/boot/dts/sh73a0-kzm9g-reference.dts       |  89 +++++++-
 arch/arm/boot/dts/sh73a0.dtsi                      |   8 +
 .../board-armadillo800eva-reference.c              |  18 +-
 arch/arm/mach-shmobile/board-kzm9g-reference.c     |  47 ----
 arch/arm/mach-shmobile/board-marzen-reference.c    |  28 ---
 drivers/pinctrl/sh-pfc/core.c                      |  66 +++++-
 drivers/pinctrl/sh-pfc/pinctrl.c                   | 244 +++++++++++++++++++++
 16 files changed, 829 insertions(+), 96 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

-- 
Regards,

Laurent Pinchart

[PATCH v3 01/20] sh-pfc: Add DT support

[Laurent Pinchart]

Support device instantiation through the device tree. The compatible
property is used to select the SoC pinmux information.

Set the gpio_chip device field to the PFC device to enable automatic
GPIO OF support.

Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 143 ++++++++++++
 drivers/pinctrl/sh-pfc/core.c                      |  66 +++++-
 drivers/pinctrl/sh-pfc/pinctrl.c                   | 244 +++++++++++++++++++++
 3 files changed, 451 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
new file mode 100644
index 0000000..e7aae39
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -0,0 +1,143 @@
+* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
+
+The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH7372,
+SH73A0, R8A73A4 and R8A7740 it also acts as a GPIO controller.
+
+
+Pin Control
+-----------
+
+Required Properties:
+
+  - compatible: should be one of the following.
+    - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
+    - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
+    - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
+    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
+    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
+    - "renesas,pfc-sh7372": for SH7372 (SH-Mobile AP4) compatible pin-controller.
+    - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
+
+  - reg: Base address and length of each memory resource used by the pin
+    controller hardware module.
+
+The PFC node also acts as a container for pin configuration nodes. Please refer
+to pinctrl-bindings.txt in this directory for the definition of the term "pin
+configuration node" and for the common pinctrl bindings used by client devices.
+
+Each pin configuration node represents a desired configuration for a pin, a
+pin group, or a list of pins or pin groups. The configuration can include the
+function to select on those pin(s) and pin configuration parameters (such as
+pull-up and pull-down).
+
+Pin configuration nodes contain pin configuration properties, either directly
+or grouped in child subnodes. Both pin muxing and configuration parameters can
+be grouped in that way and referenced as a single pin configuration node by
+client devices.
+
+A configuration node or subnode must reference at least one pin (through the
+pins or pin groups properties) and contain at least a function or one
+configuration parameter. When the function is present only pin groups can be
+used to reference pins.
+
+All pin configuration nodes and subnodes names are ignored. All of those nodes
+are parsed through phandles and processed purely based on their content.
+
+Pin Configuration Node Properties:
+
+- renesas,pins : An array of strings, each string containing the name of a pin.
+- renesas,groups : An array of strings, each string containing the name of a pin
+  group.
+
+- renesas,function: A string containing the name of the function to mux to the
+  pin group(s) specified by the renesas,groups property
+
+  Valid values for pin, group and function names can be found in the group and
+  function arrays of the PFC data file corresponding to the SoC
+  (drivers/pinctrl/sh-pfc/pfc-*.c)
+
+- renesas,pull-up: An integer representing the pull-up strength to be applied
+  to all pins specified by the renesas,pins and renesas-groups properties.
+  0 disables the pull-up, 1 enables it. Other values should not be used.
+- renesas,pull-down: An integer representing the pull-down strength to be
+  applied to all pins specified by the renesas,pins and renesas-groups
+  properties. 0 disables the pull-down, 1 enables it. Other values should not
+  be used.
+
+
+GPIO
+----
+
+Required Properties:
+
+  - gpio-controller: Marks the device node as a gpio controller.
+
+  - #gpio-cells: Should be 2. The first cell is the pin number and the second
+    cell is used to specify optional parameters as bit flags. Only the GPIO
+    active low flag (bit 0) is currently supported.
+
+The syntax of the gpio specifier used by client nodes should be the following
+with values derived from the SoC user manual.
+
+  <[phandle of the gpio controller node]
+   [pin number within the gpio controller]
+   [flags and pull up/down]>
+
+
+Examples
+--------
+
+Example 1: SH73A0 (SH-Mobile AG5) pin controller node
+
+	pfc: pfc@e6050000 {
+		compatible = "renesas,pfc-sh73a0";
+		reg = <0xe6050000 0x8000>,
+		      <0xe605801c 0x1c>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+Example 2: A GPIO LED node that references a GPIO
+
+	leds {
+		compatible = "gpio-leds";
+		led1 {
+			gpios = <&pfc 20 1>; /* Active low */
+		};
+	};
+
+Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
+           for the MMCIF and SCIFA4 devices
+
+	&pfc {
+		pinctrl-0 = <&scifa4_pins>;
+		pinctrl-names = "default";
+
+		mmcif_pins: mmcif {
+			mux {
+				renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
+				renesas,function = "mmc0";
+			};
+			cfg {
+				renesas,groups = "mmc0_data8_0";
+				renesas,pins = "PORT279";
+				renesas,pull-up = <1>;
+			};
+		};
+
+		scifa4_pins: scifa4 {
+			renesas,groups = "scifa4_data", "scifa4_ctrl";
+			renesas,function = "scifa4";
+		};
+	};
+
+Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
+
+	&mmcif {
+		pinctrl-0 = <&mmcif_pins>;
+		pinctrl-names = "default";
+
+		bus-width = <8>;
+		vmmc-supply = <&reg_1p8v>;
+		status = "okay";
+	};
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 3b2fd43..5fa1c6b 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -18,6 +18,7 @@
 #include <linux/ioport.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/of_device.h>
 #include <linux/pinctrl/machine.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
@@ -348,14 +349,74 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
 	return 0;
 }
 
+#ifdef CONFIG_OF
+static const struct of_device_id sh_pfc_of_table[] = {
+#ifdef CONFIG_PINCTRL_PFC_R8A73A4
+	{
+		.compatible = "renesas,pfc-r8a73a4",
+		.data = &r8a73a4_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A7740
+	{
+		.compatible = "renesas,pfc-r8a7740",
+		.data = &r8a7740_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A7778
+	{
+		.compatible = "renesas,pfc-r8a7778",
+		.data = &r8a7778_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A7779
+	{
+		.compatible = "renesas,pfc-r8a7779",
+		.data = &r8a7779_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A7790
+	{
+		.compatible = "renesas,pfc-r8a7790",
+		.data = &r8a7790_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_SH7372
+	{
+		.compatible = "renesas,pfc-sh7372",
+		.data = &sh7372_pinmux_info,
+	},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_SH73A0
+	{
+		.compatible = "renesas,pfc-sh73a0",
+		.data = &sh73a0_pinmux_info,
+	},
+#endif
+	{ },
+};
+MODULE_DEVICE_TABLE(of, sh_pfc_of_table);
+#endif
+
 static int sh_pfc_probe(struct platform_device *pdev)
 {
+	const struct platform_device_id *platid = platform_get_device_id(pdev);
+#ifdef CONFIG_OF
+	struct device_node *np = pdev->dev.of_node;
+#endif
 	const struct sh_pfc_soc_info *info;
 	struct sh_pfc *pfc;
 	int ret;
 
-	info = pdev->id_entry->driver_data
-	      ? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
+	if (platid)
+		info = (const void *)platid->driver_data;
+#ifdef CONFIG_OF
+	else if (np)
+		info = of_match_device(sh_pfc_of_table, &pdev->dev)->data;
+#endif
+	else
+		info = pdev->dev.platform_data;
+
 	if (info = NULL)
 		return -ENODEV;
 
@@ -501,6 +562,7 @@ static struct platform_driver sh_pfc_driver = {
 	.driver		= {
 		.name	= DRV_NAME,
 		.owner	= THIS_MODULE,
+		.of_match_table = of_match_ptr(sh_pfc_of_table),
 	},
 };
 
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index 3492ec9..066c347 100644
--- a/drivers/pinctrl/sh-pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -14,7 +14,9 @@
 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/module.h>
+#include <linux/of.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/pinctrl/machine.h>
 #include <linux/pinctrl/pinconf.h>
 #include <linux/pinctrl/pinconf-generic.h>
 #include <linux/pinctrl/pinctrl.h>
@@ -72,11 +74,253 @@ static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
 	seq_printf(s, "%s", DRV_NAME);
 }
 
+static int sh_pfc_map_add_config(struct pinctrl_map *map,
+				 const char *group_or_pin,
+				 enum pinctrl_map_type type,
+				 unsigned long *configs,
+				 unsigned int num_configs)
+{
+	unsigned long *cfgs;
+
+	cfgs = kmemdup(configs, num_configs * sizeof(*cfgs),
+		       GFP_KERNEL);
+	if (cfgs = NULL)
+		return -ENOMEM;
+
+	map->type = type;
+	map->data.configs.group_or_pin = group_or_pin;
+	map->data.configs.configs = cfgs;
+	map->data.configs.num_configs = num_configs;
+
+	return 0;
+}
+
+static int sh_pfc_dt_parse_config(unsigned long **configs,
+				  unsigned int *num_configs,
+				  unsigned long config)
+{
+	unsigned int count = *num_configs + 1;
+	unsigned long *cfgs;
+
+	cfgs = krealloc(*configs, sizeof(*cfgs) * count, GFP_KERNEL);
+	if (cfgs = NULL)
+		return -ENOMEM;
+
+	cfgs[count - 1] = config;
+
+	*configs = cfgs;
+	*num_configs = count;
+
+	return 0;
+}
+
+struct sh_pfc_config_param {
+	const char *name;
+	enum pin_config_param param;
+};
+
+static const struct sh_pfc_config_param sh_pfc_config_params[] = {
+	{ "renesas,pull-up", PIN_CONFIG_BIAS_PULL_UP },
+	{ "renesas,pull-down", PIN_CONFIG_BIAS_PULL_DOWN },
+};
+
+static int sh_pfc_dt_subnode_to_map(struct device *dev, struct device_node *np,
+				    struct pinctrl_map **map,
+				    unsigned int *num_maps, unsigned int *index)
+{
+	struct pinctrl_map *maps = *map;
+	unsigned int nmaps = *num_maps;
+	unsigned int idx = *index;
+	unsigned long *configs = NULL;
+	unsigned int num_configs = 0;
+	const char *function = NULL;
+	struct property *prop;
+	unsigned int num_pins;
+	const char *group;
+	const char *pin;
+	unsigned int i;
+	int ret;
+
+	/* Parse the function and configuration properties. At least a function
+	 * or one configuration must be specified.
+	 */
+	ret = of_property_read_string(np, "renesas,function", &function);
+	if (ret < 0 && ret != -EINVAL) {
+		dev_err(dev, "Invalid function in DT\n");
+		return ret;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(sh_pfc_config_params); ++i) {
+		const struct sh_pfc_config_param *param +			&sh_pfc_config_params[i];
+		unsigned long config;
+		u32 val;
+
+		ret = of_property_read_u32(np, param->name, &val);
+		if (!ret) {
+			config = pinconf_to_config_packed(param->param, val);
+			ret = sh_pfc_dt_parse_config(&configs, &num_configs,
+						     config);
+			if (ret < 0)
+				goto done;
+		} else if (ret != -EINVAL) {
+			dev_err(dev, "Could not parse property %s\n",
+				param->name);
+		}
+	}
+
+	if (!function && num_configs = 0) {
+		dev_err(dev,
+			"DT node must contain at least a function or config\n");
+		goto done;
+	}
+
+	/* Count the number of pins and groups and reallocate mappings. */
+	ret = of_property_count_strings(np, "renesas,pins");
+	if (ret < 0 && ret != -EINVAL) {
+		dev_err(dev, "Invalid pins list in DT\n");
+		goto done;
+	}
+	num_pins = ret;
+
+	if (configs)
+		nmaps += ret;
+
+	ret = of_property_count_strings(np, "renesas,groups");
+	if (ret < 0 && ret != -EINVAL) {
+		dev_err(dev, "Invalid pin groups list in DT\n");
+		goto done;
+	}
+	num_pins += ret;
+
+	if (function)
+		nmaps += ret;
+	if (configs)
+		nmaps += ret;
+
+	if (!num_pins) {
+		dev_err(dev, "No pin or group provided in DT node\n");
+		ret = -ENODEV;
+		goto done;
+	}
+
+	maps = krealloc(maps, sizeof(*maps) * nmaps, GFP_KERNEL);
+	if (maps = NULL) {
+		ret = -ENOMEM;
+		goto done;
+	}
+
+	*map = maps;
+	*num_maps = nmaps;
+
+	/* Iterate over pins and groups and create the mappings. */
+	of_property_for_each_string(np, "renesas,groups", prop, group) {
+		if (function) {
+			maps[idx].type = PIN_MAP_TYPE_MUX_GROUP;
+			maps[idx].data.mux.group = group;
+			maps[idx].data.mux.function = function;
+			idx++;
+		}
+
+		if (configs) {
+			ret = sh_pfc_map_add_config(&maps[idx], group,
+						    PIN_MAP_TYPE_CONFIGS_GROUP,
+						    configs, num_configs);
+			if (ret < 0)
+				goto done;
+
+			idx++;
+		}
+	}
+
+	if (!configs) {
+		ret = 0;
+		goto done;
+	}
+
+	of_property_for_each_string(np, "renesas,pins", prop, pin) {
+		ret = sh_pfc_map_add_config(&maps[idx], pin,
+					    PIN_MAP_TYPE_CONFIGS_PIN,
+					    configs, num_configs);
+		if (ret < 0)
+			goto done;
+
+		idx++;
+	}
+
+done:
+	*index = idx;
+	kfree(configs);
+	return ret;
+}
+
+static void sh_pfc_dt_free_map(struct pinctrl_dev *pctldev,
+			       struct pinctrl_map *map, unsigned num_maps)
+{
+	unsigned int i;
+
+	if (map = NULL)
+		return;
+
+	for (i = 0; i < num_maps; ++i) {
+		if (map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP ||
+		    map[i].type = PIN_MAP_TYPE_CONFIGS_PIN)
+			kfree(map[i].data.configs.configs);
+	}
+
+	kfree(map);
+}
+
+static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
+				 struct device_node *np,
+				 struct pinctrl_map **map, unsigned *num_maps)
+{
+	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
+	struct device *dev = pmx->pfc->dev;
+	struct device_node *child;
+	unsigned int index;
+	int ret;
+
+	*map = NULL;
+	*num_maps = 0;
+	index = 0;
+
+	for_each_child_of_node(np, child) {
+		ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps,
+					       &index);
+		if (ret < 0)
+			goto done;
+	}
+
+	/* If no mapping has been found in child nodes try the config node. */
+	if (*num_maps = 0) {
+		ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index);
+		if (ret < 0)
+			goto done;
+	}
+
+	if (*num_maps = 0) {
+		dev_err(dev, "no mapping found in node %s\n", np->full_name);
+		ret = -EINVAL;
+		goto done;
+	}
+
+	ret = 0;
+
+done:
+	if (ret < 0)
+		sh_pfc_dt_free_map(pctldev, *map, *num_maps);
+
+	return ret;
+}
+
 static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
 	.get_groups_count	= sh_pfc_get_groups_count,
 	.get_group_name		= sh_pfc_get_group_name,
 	.get_group_pins		= sh_pfc_get_group_pins,
 	.pin_dbg_show		= sh_pfc_pin_dbg_show,
+	.dt_node_to_map		= sh_pfc_dt_node_to_map,
+	.dt_free_map		= sh_pfc_dt_free_map,
 };
 
 static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
-- 
1.8.1.5

[PATCH v3 02/20] ARM: shmobile: r8a73a4: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the r8a73a4 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a73a4.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index fde2a33..358898c 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -91,4 +91,11 @@
 		interrupt-parent = <&gic>;
 		interrupts = <0 69 4>;
 	};
+
+	pfc: pfc@e6050000 {
+		compatible = "renesas,pfc-r8a73a4";
+		reg = <0xe6050000 0x9000>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
 };
-- 
1.8.1.5

[PATCH v3 03/20] ARM: shmobile: r8a7740: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the r8a7740 device tree and remove manual pinmux
initialization from the corresponding board files.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740.dtsi                           |  8 ++++++++
 arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 16 ++++++++--------
 2 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 25dc930..2fa3708 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -135,4 +135,12 @@
 			      0 72 0x4
 			      0 73 0x4>;
 	};
+
+	pfc: pfc@e6050000 {
+		compatible = "renesas,pfc-r8a7740";
+		reg = <0xe6050000 0x8000>,
+		      <0xe605800c 0x20>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
 };
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 03b85fe..f25b6aa 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -121,7 +121,7 @@
 
 static const struct pinctrl_map eva_pinctrl_map[] = {
 	/* SCIFA1 */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "e6050000.pfc",
 				  "scifa1_data", "scifa1"),
 };
 
@@ -170,22 +170,22 @@ static void __init eva_init(void)
 	eva_clock_init();
 
 	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
-	r8a7740_pinmux_init();
 
 	r8a7740_meram_workaround();
 
-	/*
-	 * Touchscreen
-	 * TODO: Move reset GPIO over to .dts when we can reference it
-	 */
-	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
-
 #ifdef CONFIG_CACHE_L2X0
 	/* Early BRESP enable, Shared attribute override enable, 32K*8way */
 	l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
 #endif
 
 	r8a7740_add_standard_devices_dt();
+
+	/*
+	 * Touchscreen
+	 * TODO: Move reset GPIO over to .dts when we can reference it
+	 */
+	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
+
 	r8a7740_pm_init();
 }
 
-- 
1.8.1.5

[PATCH v3 04/20] ARM: shmobile: r8a7778: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the r8a7778 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7778.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 4743735..c8dbf14 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -32,4 +32,9 @@
 		reg = <0xfe438000 0x1000>,
 		      <0xfe430000 0x100>;
 	};
+
+	pfc: pfc@fffc0000 {
+		compatible = "renesas,pfc-r8a7778";
+		reg = <0xfffc000 0x118>;
+	};
 };
-- 
1.8.1.5

[PATCH v3 05/20] ARM: shmobile: r8a7778: Add GPIO controller devices to device tree

[Laurent Pinchart]

Add GPIO controller nodes to the r8a7778 core device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7778.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index c8dbf14..d612a9a 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -33,6 +33,51 @@
 		      <0xfe430000 0x100>;
 	};
 
+	gpio0: gpio@ffc40000 {
+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		reg = <0xffc40000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 103 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio1: gpio@ffc41000 {
+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		reg = <0xffc41000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 103 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio2: gpio@ffc42000 {
+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		reg = <0xffc42000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 103 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio3: gpio@ffc43000 {
+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		reg = <0xffc43000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 103 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio4: gpio@ffc44000 {
+		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+		reg = <0xffc44000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 103 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
 	pfc: pfc@fffc0000 {
 		compatible = "renesas,pfc-r8a7778";
 		reg = <0xfffc000 0x118>;
-- 
1.8.1.5

[PATCH v3 06/20] ARM: shmobile: r8a7779: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the r8a7779 device tree and remove manual pinmux
initialization from the corresponding board files.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7779.dtsi                  |  5 +++++
 arch/arm/mach-shmobile/board-marzen-reference.c | 17 ++++++++---------
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 7f146c6..9dfc438 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -101,6 +101,11 @@
 		interrupts = <0 81 0x4>;
 	};
 
+	pfc: pfc@fffc0000 {
+		compatible = "renesas,pfc-r8a7779";
+		reg = <0xfffc0000 0x23c>;
+	};
+
 	thermal@ffc48000 {
 		compatible = "renesas,rcar-thermal";
 		reg = <0xffc48000 0x38>;
diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
index 5332e89..fa7fc07 100644
--- a/arch/arm/mach-shmobile/board-marzen-reference.c
+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
@@ -28,24 +28,24 @@
 
 static const struct pinctrl_map marzen_pinctrl_map[] = {
 	/* SCIF2 (CN18: DEBUG0) */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "fffc0000.pfc",
 				  "scif2_data_c", "scif2"),
 	/* SCIF4 (CN19: DEBUG1) */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "fffc0000.pfc",
 				  "scif4_data", "scif4"),
 	/* SDHI0 */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
 				  "sdhi0_data4", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
 				  "sdhi0_ctrl", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
 				  "sdhi0_cd", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
 				  "sdhi0_wp", "sdhi0"),
 	/* SMSC */
-	PIN_MAP_MUX_GROUP_DEFAULT("18000000.lan0", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("18000000.lan0", "fffc0000.pfc",
 				  "intc_irq1_b", "intc"),
-	PIN_MAP_MUX_GROUP_DEFAULT("18000000.lan0", "pfc-r8a7779",
+	PIN_MAP_MUX_GROUP_DEFAULT("18000000.lan0", "fffc0000.pfc",
 				  "lbsc_ex_cs0", "lbsc"),
 };
 
@@ -53,7 +53,6 @@ static void __init marzen_init(void)
 {
 	pinctrl_register_mappings(marzen_pinctrl_map,
 				  ARRAY_SIZE(marzen_pinctrl_map));
-	r8a7779_pinmux_init();
 
 	r8a7779_add_standard_devices_dt();
 }
-- 
1.8.1.5

[PATCH v3 07/20] ARM: shmobile: r8a7779: Add GPIO controller devices to device tree

[Laurent Pinchart]

Add GPIO controller nodes to the r8a7779 core device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7779.dtsi | 64 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 9dfc438..dc78ff7 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -48,6 +48,70 @@
                       <0xf0000100 0x100>;
         };
 
+	gpio0: gpio@ffc40000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc40000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 141 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio1: gpio@ffc41000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc41000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 142 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio2: gpio@ffc42000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc42000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 143 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio3: gpio@ffc43000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc43000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 144 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio4: gpio@ffc44000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc44000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 145 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio5: gpio@ffc45000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc45000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 146 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio6: gpio@ffc46000 {
+		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+		reg = <0xffc46000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 147 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+		#gpio-lines = <9>;
+	};
+
 	irqpin0: irqpin@fe780010 {
 		compatible = "renesas,intc-irqpin";
 		#interrupt-cells = <2>;
-- 
1.8.1.5

[PATCH v3 08/20] ARM: shmobile: r8a7790: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the r8a7790 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7790.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 7a17110..ee21061 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -60,4 +60,9 @@
 		interrupt-parent = <&gic>;
 		interrupts = <0 0 4>, <0 1 4>, <0 2 4>,	<0 3 4>;
 	};
+
+	pfc: pfc@e6060000 {
+		compatible = "renesas,pfc-r8a7790";
+		reg = <0xe6060000 0x250>;
+	};
 };
-- 
1.8.1.5

[PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Laurent Pinchart]

Add GPIO controller nodes to the r8a7790 core device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7790.dtsi | 54 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index ee21061..b5fe51da 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -44,6 +44,60 @@
 		};
 	};
 
+	gpio0: gpio@ffc40000 {
+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+		reg = <0xffc40000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 4 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio1: gpio@ffc41000 {
+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+		reg = <0xffc41000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 5 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio2: gpio@ffc42000 {
+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+		reg = <0xffc42000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 6 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio3: gpio@ffc43000 {
+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+		reg = <0xffc43000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 7 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio4: gpio@ffc44000 {
+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+		reg = <0xffc44000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 8 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
+	gpio5: gpio@ffc45000 {
+		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+		reg = <0xffc45000 0x2c>;
+		interrupt-parent = <&gic>;
+		interrupts = <0 9 0x4>;
+		#gpio-cells = <2>;
+		gpio-controller;
+	};
+
 	timer {
 		compatible = "arm,armv7-timer";
 		interrupts = <1 13 0xf08>,
-- 
1.8.1.5

[PATCH v3 10/20] ARM: shmobile: sh7372: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the sh7372 device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh7372.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 677fc60..ce19398 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -18,4 +18,12 @@
 			compatible = "arm,cortex-a8";
 		};
 	};
+
+	pfc: pfc@e6050000 {
+		compatible = "renesas,pfc-sh7372";
+		reg = <0xe6050000 0x8000>,
+		      <0xe605801c 0x1c>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
 };
-- 
1.8.1.5

[PATCH v3 11/20] ARM: shmobile: sh73a0: Add pin control device to device tree

[Laurent Pinchart]

Add a pfc node to the sh73a0 device tree and remove manual pinmux
initialization from the corresponding board files.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh73a0.dtsi                  |  8 ++++++++
 arch/arm/mach-shmobile/board-kzm9g-reference.c | 27 +++++++++++++-------------
 2 files changed, 21 insertions(+), 14 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index 17fd9c6..9b1e8f8 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -233,4 +233,12 @@
 		cap-sd-highspeed;
 		status = "disabled";
 	};
+
+	pfc: pfc@e6050000 {
+		compatible = "renesas,pfc-sh73a0";
+		reg = <0xe6050000 0x8000>,
+		      <0xe605801c 0x1c>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
 };
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 44055fe..6ff6ca2 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -40,35 +40,35 @@ static unsigned long pin_pullup_conf[] = {
 };
 
 static const struct pinctrl_map kzm_pinctrl_map[] = {
-	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "e6050000.pfc",
 				  "i2c3_1", "i2c3"),
 	/* MMCIF */
-	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
 				  "mmc0_data8_0", "mmc0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
 				  "mmc0_ctrl_0", "mmc0"),
-	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
+	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
 				    "PORT279", pin_pullup_conf),
-	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
+	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
 				      "mmc0_data8_0", pin_pullup_conf),
 	/* SCIFA4 */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
 				  "scifa4_data", "scifa4"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
 				  "scifa4_ctrl", "scifa4"),
 	/* SDHI0 */
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
 				  "sdhi0_data4", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
 				  "sdhi0_ctrl", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
 				  "sdhi0_cd", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
 				  "sdhi0_wp", "sdhi0"),
 	/* SDHI2 */
-	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
 				  "sdhi2_data4", "sdhi2"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
+	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
 				  "sdhi2_ctrl", "sdhi2"),
 };
 
@@ -76,7 +76,6 @@ static void __init kzm_init(void)
 {
 	sh73a0_add_standard_devices_dt();
 	pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
-	sh73a0_pinmux_init();
 
 	/* enable SD */
 	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
-- 
1.8.1.5

[PATCH v3 12/20] ARM: shmobile: armadillo-reference: Move pinctrl mappings to device tree

[Laurent Pinchart]

Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts  | 10 ++++++++++
 arch/arm/mach-shmobile/board-armadillo800eva-reference.c |  9 ---------
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 09ea22c..4a7ae32 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -43,3 +43,13 @@
 		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
 	};
 };
+
+&pfc {
+	pinctrl-0 = <&scifa1_pins>;
+	pinctrl-names = "default";
+
+	scifa1_pins: scifa1 {
+		renesas,groups = "scifa1_data";
+		renesas,function = "scifa1";
+	};
+};
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index f25b6aa..4ddd299 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -24,7 +24,6 @@
 #include <linux/kernel.h>
 #include <linux/gpio.h>
 #include <linux/io.h>
-#include <linux/pinctrl/machine.h>
 #include <mach/common.h>
 #include <mach/r8a7740.h>
 #include <asm/mach/arch.h>
@@ -119,12 +118,6 @@
  *	usbhsf_power_ctrl()
  */
 
-static const struct pinctrl_map eva_pinctrl_map[] = {
-	/* SCIFA1 */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "e6050000.pfc",
-				  "scifa1_data", "scifa1"),
-};
-
 static void __init eva_clock_init(void)
 {
 	struct clk *system	= clk_get(NULL, "system_clk");
@@ -169,8 +162,6 @@ static void __init eva_init(void)
 	r8a7740_clock_init(MD_CK0 | MD_CK2);
 	eva_clock_init();
 
-	pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
-
 	r8a7740_meram_workaround();
 
 #ifdef CONFIG_CACHE_L2X0
-- 
1.8.1.5

[PATCH v3 13/20] ARM: shmobile: armadillo-reference: Add st1232 pin mappings

[Laurent Pinchart]

Add pin mappings for the st1232 device to the device tree and reference
them as the default state for the device.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 4a7ae32..a6c6606 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -41,6 +41,8 @@
 		reg = <0x55>;
 		interrupt-parent = <&irqpin1>;
 		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
+		pinctrl-0 = <&st1232_pins>;
+		pinctrl-names = "default";
 	};
 };
 
@@ -52,4 +54,9 @@
 		renesas,groups = "scifa1_data";
 		renesas,function = "scifa1";
 	};
+
+	st1232_pins: st1232 {
+		renesas,groups = "intc_irq10";
+		renesas,function = "intc";
+	};
 };
-- 
1.8.1.5

[PATCH v3 14/20] ARM: shmobile: armadillo-reference: Move st1232 reset GPIO to DT

[Laurent Pinchart]

Reference the st1232 reset GPIO from the device tree and remove it from
board code.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts  | 1 +
 arch/arm/mach-shmobile/board-armadillo800eva-reference.c | 7 -------
 2 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index a6c6606..a037776 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -43,6 +43,7 @@
 		interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
 		pinctrl-0 = <&st1232_pins>;
 		pinctrl-names = "default";
+		gpios = <&pfc 166 1>;
 	};
 };
 
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 4ddd299..002d8d3 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -158,7 +158,6 @@ clock_error:
  */
 static void __init eva_init(void)
 {
-
 	r8a7740_clock_init(MD_CK0 | MD_CK2);
 	eva_clock_init();
 
@@ -171,12 +170,6 @@ static void __init eva_init(void)
 
 	r8a7740_add_standard_devices_dt();
 
-	/*
-	 * Touchscreen
-	 * TODO: Move reset GPIO over to .dts when we can reference it
-	 */
-	gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
-
 	r8a7740_pm_init();
 }
 
-- 
1.8.1.5

[PATCH v3 15/20] ARM: shmobile: armadillo-reference: Add LED1-LED4 to the device tree

[Laurent Pinchart]

LED1 to LED4 are GPIO LEDs. Add corresponding DT nodes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index a037776..746c64a 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -33,6 +33,21 @@
 		regulator-boot-on;
 	};
 
+	leds {
+		compatible = "gpio-leds";
+		led1 {
+			gpios = <&pfc 102 0>;
+		};
+		led2 {
+			gpios = <&pfc 111 0>;
+		};
+		led3 {
+			gpios = <&pfc 110 0>;
+		};
+		led4 {
+			gpios = <&pfc 177 0>;
+		};
+	};
 };
 
 &i2c0 {
-- 
1.8.1.5

[PATCH v3 16/20] ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree

[Laurent Pinchart]

Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh73a0-kzm9g-reference.dts   | 51 ++++++++++++++++++++++++++
 arch/arm/mach-shmobile/board-kzm9g-reference.c | 40 --------------------
 2 files changed, 51 insertions(+), 40 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index b6f759e..475535f 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -145,19 +145,70 @@
 	};
 };
 
+&i2c3 {
+	pinctrl-0 = <&i2c3_pins>;
+	pinctrl-names = "default";
+};
+
 &mmcif {
+	pinctrl-0 = <&mmcif_pins>;
+	pinctrl-names = "default";
+
 	bus-width = <8>;
 	vmmc-supply = <&reg_1p8v>;
 	status = "okay";
 };
 
+&pfc {
+	pinctrl-0 = <&scifa4_pins>;
+	pinctrl-names = "default";
+
+	i2c3_pins: i2c3 {
+		renesas,groups = "i2c3_1";
+		renesas,function = "i2c3";
+	};
+
+	mmcif_pins: mmcif {
+		mux {
+			renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
+			renesas,function = "mmc0";
+		};
+		cfg {
+			renesas,groups = "mmc0_data8_0";
+			renesas,pins = "PORT279";
+			renesas,pull-up = <1>;
+		};
+	};
+
+	scifa4_pins: scifa4 {
+		renesas,groups = "scifa4_data", "scifa4_ctrl";
+		renesas,function = "scifa4";
+	};
+
+	sdhi0_pins: sdhi0 {
+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
+		renesas,function = "sdhi0";
+	};
+
+	sdhi2_pins: sdhi2 {
+		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+		renesas,function = "sdhi2";
+	};
+};
+
 &sdhi0 {
+	pinctrl-0 = <&sdhi0_pins>;
+	pinctrl-names = "default";
+
 	vmmc-supply = <&reg_3p3v>;
 	bus-width = <4>;
 	status = "okay";
 };
 
 &sdhi2 {
+	pinctrl-0 = <&sdhi2_pins>;
+	pinctrl-names = "default";
+
 	vmmc-supply = <&reg_3p3v>;
 	bus-width = <4>;
 	broken-cd;
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 6ff6ca2..fc2bb37 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -27,55 +27,15 @@
 #include <linux/irqchip.h>
 #include <linux/input.h>
 #include <linux/of_platform.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
-static unsigned long pin_pullup_conf[] = {
-	PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
-};
-
-static const struct pinctrl_map kzm_pinctrl_map[] = {
-	PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "e6050000.pfc",
-				  "i2c3_1", "i2c3"),
-	/* MMCIF */
-	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
-				  "mmc0_data8_0", "mmc0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
-				  "mmc0_ctrl_0", "mmc0"),
-	PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
-				    "PORT279", pin_pullup_conf),
-	PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
-				      "mmc0_data8_0", pin_pullup_conf),
-	/* SCIFA4 */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
-				  "scifa4_data", "scifa4"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
-				  "scifa4_ctrl", "scifa4"),
-	/* SDHI0 */
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
-				  "sdhi0_data4", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
-				  "sdhi0_ctrl", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
-				  "sdhi0_cd", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
-				  "sdhi0_wp", "sdhi0"),
-	/* SDHI2 */
-	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
-				  "sdhi2_data4", "sdhi2"),
-	PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
-				  "sdhi2_ctrl", "sdhi2"),
-};
-
 static void __init kzm_init(void)
 {
 	sh73a0_add_standard_devices_dt();
-	pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
 
 	/* enable SD */
 	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
-- 
1.8.1.5

[PATCH v3 17/20] ARM: shmobile: kzm9g-reference: Move SDHI regulators to DT

[Laurent Pinchart]

Create two GPIO-controlled fixed-voltage regulators in the
kzm9g-reference DT and remove manual configuration of the corresponding
GPIOs from board code.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh73a0-kzm9g-reference.dts   | 22 ++++++++++++++++++++--
 arch/arm/mach-shmobile/board-kzm9g-reference.c |  6 ------
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index 475535f..cdfd71a 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -58,6 +58,24 @@
 		regulator-boot-on;
 	};
 
+	vmmc_sdhi0: regulator@2 {
+	        compatible = "regulator-fixed";
+		regulator-name = "SDHI0 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pfc 15 0>;
+		enable-active-high;
+	};
+
+	vmmc_sdhi2: regulator@3 {
+	        compatible = "regulator-fixed";
+		regulator-name = "SDHI2 Vcc";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pfc 14 0>;
+		enable-active-high;
+	};
+
 	lan9220@10000000 {
 		compatible = "smsc,lan9220", "smsc,lan9115";
 		reg = <0x10000000 0x100>;
@@ -200,7 +218,7 @@
 	pinctrl-0 = <&sdhi0_pins>;
 	pinctrl-names = "default";
 
-	vmmc-supply = <&reg_3p3v>;
+	vmmc-supply = <&vmmc_sdhi0>;
 	bus-width = <4>;
 	status = "okay";
 };
@@ -209,7 +227,7 @@
 	pinctrl-0 = <&sdhi2_pins>;
 	pinctrl-names = "default";
 
-	vmmc-supply = <&reg_3p3v>;
+	vmmc-supply = <&vmmc_sdhi2>;
 	bus-width = <4>;
 	broken-cd;
 	status = "okay";
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index fc2bb37..1847b4d 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -21,7 +21,6 @@
  */
 
 #include <linux/delay.h>
-#include <linux/gpio.h>
 #include <linux/io.h>
 #include <linux/irq.h>
 #include <linux/irqchip.h>
@@ -37,11 +36,6 @@ static void __init kzm_init(void)
 {
 	sh73a0_add_standard_devices_dt();
 
-	/* enable SD */
-	gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
-
-	gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
-
 #ifdef CONFIG_CACHE_L2X0
 	/* Early BRESP enable, Shared attribute override enable, 64K*8way */
 	l2x0_init(IOMEM(0xf0100000), 0x40460000, 0x82000fff);
-- 
1.8.1.5

[PATCH v3 18/20] ARM: shmobile: kzm9g-reference: Add LED1-LED4 to the device tree

[Laurent Pinchart]

LED1 to LED4 are GPIO LEDs. Add corresponding DT nodes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index cdfd71a..21b0fe3 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -88,6 +88,22 @@
 		vddvario-supply = <&reg_1p8v>;
 		vdd33a-supply = <&reg_3p3v>;
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		led1 {
+			gpios = <&pfc 20 1>; /* Active low */
+		};
+		led2 {
+			gpios = <&pfc 21 1>; /* Active low */
+		};
+		led3 {
+			gpios = <&pfc 22 1>; /* Active low */
+		};
+		led4 {
+			gpios = <&pfc 23 1>; /* Active low */
+		};
+	};
 };
 
 &i2c0 {
-- 
1.8.1.5

[PATCH v3 19/20] ARM: shmobile: marzen-reference: Move pinctrl mappings to device tree

[Laurent Pinchart]

Replace the pinctrl mappings in board code by device tree mappings.
For devices that are still instantiated from board code reference the
mappings as the default pin controller state to apply them at boot time.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7779-marzen-reference.dts  | 35 +++++++++++++++++++++++++
 arch/arm/mach-shmobile/board-marzen-reference.c | 27 -------------------
 2 files changed, 35 insertions(+), 27 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
index 10cfc7f..07ef31f 100644
--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
@@ -37,6 +37,9 @@
 	lan0@18000000 {
 		compatible = "smsc,lan9220", "smsc,lan9115";
 		reg = <0x18000000 0x100>;
+		pinctrl-0 = <&lan0_pins>;
+		pinctrl-names = "default";
+
 		phy-mode = "mii";
 		interrupt-parent = <&irqpin0>;
 		interrupts = <1 0x4>;
@@ -45,3 +48,35 @@
 		vdd33a-supply = <&fixedregulator3v3>;
 	};
 };
+
+&pfc {
+	pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
+	pinctrl-names = "default";
+
+	lan0_pins: lan0 {
+		intc {
+			renesas,groups = "intc_irq1_b";
+			renesas,function = "intc";
+		};
+		lbsc {
+			renesas,groups = "lbsc_ex_cs0";
+			renesas,function = "lbsc";
+		};
+	};
+
+	scif2_pins: scif2 {
+		renesas,groups = "scif2_data_c";
+		renesas,function = "scif2";
+	};
+
+	scif4_pins: scif4 {
+		renesas,groups = "scif4_data";
+		renesas,function = "scif4";
+	};
+
+	sdhi0_pins: sdhi0 {
+		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
+				 "sdhi0_wp";
+		renesas,function = "sdhi0";
+	};
+};
diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
index fa7fc07..3d1c439 100644
--- a/arch/arm/mach-shmobile/board-marzen-reference.c
+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
@@ -19,41 +19,14 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  */
 
-#include <linux/pinctrl/machine.h>
 #include <mach/r8a7779.h>
 #include <mach/common.h>
 #include <mach/irqs.h>
 #include <asm/irq.h>
 #include <asm/mach/arch.h>
 
-static const struct pinctrl_map marzen_pinctrl_map[] = {
-	/* SCIF2 (CN18: DEBUG0) */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "fffc0000.pfc",
-				  "scif2_data_c", "scif2"),
-	/* SCIF4 (CN19: DEBUG1) */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "fffc0000.pfc",
-				  "scif4_data", "scif4"),
-	/* SDHI0 */
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
-				  "sdhi0_data4", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
-				  "sdhi0_ctrl", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
-				  "sdhi0_cd", "sdhi0"),
-	PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "fffc0000.pfc",
-				  "sdhi0_wp", "sdhi0"),
-	/* SMSC */
-	PIN_MAP_MUX_GROUP_DEFAULT("18000000.lan0", "fffc0000.pfc",
-				  "intc_irq1_b", "intc"),
-	PIN_MAP_MUX_GROUP_DEFAULT("18000000.lan0", "fffc0000.pfc",
-				  "lbsc_ex_cs0", "lbsc"),
-};
-
 static void __init marzen_init(void)
 {
-	pinctrl_register_mappings(marzen_pinctrl_map,
-				  ARRAY_SIZE(marzen_pinctrl_map));
-
 	r8a7779_add_standard_devices_dt();
 }
 
-- 
1.8.1.5

[PATCH v3 20/20] ARM: shmobile: marzen-reference: Add LED2-LED4 to the device tree

[Laurent Pinchart]

LED2 to LED4 are GPIO LEDs. Add corresponding DT nodes.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm/boot/dts/r8a7779-marzen-reference.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
index 07ef31f..0533c31 100644
--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
@@ -47,6 +47,19 @@
 		vddvario-supply = <&fixedregulator3v3>;
 		vdd33a-supply = <&fixedregulator3v3>;
 	};
+
+	leds {
+		compatible = "gpio-leds";
+		led2 {
+			gpios = <&gpio4 29 0>;
+		};
+		led3 {
+			gpios = <&gpio4 30 0>;
+		};
+		led4 {
+			gpios = <&gpio4 31 0>;
+		};
+	};
 };
 
 &pfc {
-- 
1.8.1.5

Re: [PATCH v3 01/20] sh-pfc: Add DT support

[Guennadi Liakhovetski]

Hi Laurent

Thanks for your work on this! Sorry for jumping in so late in the game. 
Let's do it this way: I don't think my comments are serious enough to 
enforce a v4. If noone else complains, I'm fine with addressing them in an 
incremental patch. If you get more comments and have to do a v4, you can 
address mine too, otherwise I'm fine with this version going in and 
improving it slightly afterwards.

On Wed, 15 May 2013, Laurent Pinchart wrote:

> Support device instantiation through the device tree. The compatible
> property is used to select the SoC pinmux information.
> 
> Set the gpio_chip device field to the PFC device to enable automatic
> GPIO OF support.
> 
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 143 ++++++++++++
>  drivers/pinctrl/sh-pfc/core.c                      |  66 +++++-
>  drivers/pinctrl/sh-pfc/pinctrl.c                   | 244 +++++++++++++++++++++
>  3 files changed, 451 insertions(+), 2 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
> new file mode 100644
> index 0000000..e7aae39
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
> @@ -0,0 +1,143 @@
> +* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
> +
> +The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH7372,
> +SH73A0, R8A73A4 and R8A7740 it also acts as a GPIO controller.
> +
> +
> +Pin Control
> +-----------
> +
> +Required Properties:
> +
> +  - compatible: should be one of the following.
> +    - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
> +    - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
> +    - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
> +    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
> +    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
> +    - "renesas,pfc-sh7372": for SH7372 (SH-Mobile AP4) compatible pin-controller.
> +    - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
> +
> +  - reg: Base address and length of each memory resource used by the pin
> +    controller hardware module.
> +
> +The PFC node also acts as a container for pin configuration nodes. Please refer
> +to pinctrl-bindings.txt in this directory for the definition of the term "pin
> +configuration node" and for the common pinctrl bindings used by client devices.
> +
> +Each pin configuration node represents a desired configuration for a pin, a
> +pin group, or a list of pins or pin groups. The configuration can include the
> +function to select on those pin(s) and pin configuration parameters (such as
> +pull-up and pull-down).
> +
> +Pin configuration nodes contain pin configuration properties, either directly
> +or grouped in child subnodes. Both pin muxing and configuration parameters can
> +be grouped in that way and referenced as a single pin configuration node by
> +client devices.
> +
> +A configuration node or subnode must reference at least one pin (through the
> +pins or pin groups properties) and contain at least a function or one
> +configuration parameter. When the function is present only pin groups can be
> +used to reference pins.
> +
> +All pin configuration nodes and subnodes names are ignored. All of those nodes
> +are parsed through phandles and processed purely based on their content.
> +
> +Pin Configuration Node Properties:
> +
> +- renesas,pins : An array of strings, each string containing the name of a pin.
> +- renesas,groups : An array of strings, each string containing the name of a pin
> +  group.
> +
> +- renesas,function: A string containing the name of the function to mux to the
> +  pin group(s) specified by the renesas,groups property
> +
> +  Valid values for pin, group and function names can be found in the group and
> +  function arrays of the PFC data file corresponding to the SoC
> +  (drivers/pinctrl/sh-pfc/pfc-*.c)
> +
> +- renesas,pull-up: An integer representing the pull-up strength to be applied
> +  to all pins specified by the renesas,pins and renesas-groups properties.
> +  0 disables the pull-up, 1 enables it. Other values should not be used.
> +- renesas,pull-down: An integer representing the pull-down strength to be
> +  applied to all pins specified by the renesas,pins and renesas-groups
> +  properties. 0 disables the pull-down, 1 enables it. Other values should not
> +  be used.
> +
> +
> +GPIO
> +----
> +
> +Required Properties:
> +
> +  - gpio-controller: Marks the device node as a gpio controller.
> +
> +  - #gpio-cells: Should be 2. The first cell is the pin number and the second
> +    cell is used to specify optional parameters as bit flags. Only the GPIO
> +    active low flag (bit 0) is currently supported.
> +
> +The syntax of the gpio specifier used by client nodes should be the following
> +with values derived from the SoC user manual.
> +
> +  <[phandle of the gpio controller node]
> +   [pin number within the gpio controller]
> +   [flags and pull up/down]>

How should pull up / down be specified? Above you say only "active low" is 
supported so far.

Actually, I'm a bit confused by how pinctrl and GPIO DT nodes should be 
implemented:

> +
> +
> +Examples
> +--------
> +
> +Example 1: SH73A0 (SH-Mobile AG5) pin controller node
> +
> +	pfc: pfc@e6050000 {
> +		compatible = "renesas,pfc-sh73a0";
> +		reg = <0xe6050000 0x8000>,
> +		      <0xe605801c 0x1c>;
> +		gpio-controller;
> +		#gpio-cells = <2>;
> +	};

In this example you add one node, that implements both - a pinctrl and a 
GPIO controller. However, on some platforms you add two DT nodes: one for 
pinctrl and one for GPIO. While doing that your GPIO node has a compatible 
string like

		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";

Do I understand it right, that a separate DT node is used for a GPIO 
controller if the controllers are really well separated on the hardware, 
probably, don't share register address ranges? Is there a driver in the 
kernel, that actually probes those compatible strings? Or the driver for 
those GPIO controllers isn't DT based? Maybe at least a short explanation 
and an example with two DT nodes here, or a reference to another 
documentation would help.

[snip]

> diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
> index 3b2fd43..5fa1c6b 100644
> --- a/drivers/pinctrl/sh-pfc/core.c
> +++ b/drivers/pinctrl/sh-pfc/core.c
> @@ -18,6 +18,7 @@
>  #include <linux/ioport.h>
>  #include <linux/kernel.h>
>  #include <linux/module.h>
> +#include <linux/of_device.h>
>  #include <linux/pinctrl/machine.h>
>  #include <linux/platform_device.h>
>  #include <linux/slab.h>
> @@ -348,14 +349,74 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_OF

Not sure, is it really a good idea to use this #ifdef here? I think you 
could drop all 3 of them in this hunk:

[snip]

>  static int sh_pfc_probe(struct platform_device *pdev)
>  {
> +	const struct platform_device_id *platid = platform_get_device_id(pdev);
> +#ifdef CONFIG_OF

also here

> +	struct device_node *np = pdev->dev.of_node;
> +#endif
>  	const struct sh_pfc_soc_info *info;
>  	struct sh_pfc *pfc;
>  	int ret;
>  
> -	info = pdev->id_entry->driver_data
> -	      ? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
> +	if (platid)
> +		info = (const void *)platid->driver_data;
> +#ifdef CONFIG_OF

and here.

> +	else if (np)
> +		info = of_match_device(sh_pfc_of_table, &pdev->dev)->data;
> +#endif
> +	else
> +		info = pdev->dev.platform_data;
> +
>  	if (info = NULL)
>  		return -ENODEV;
>  

[snip]

> +static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
> +				 struct device_node *np,
> +				 struct pinctrl_map **map, unsigned *num_maps)
> +{
> +	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
> +	struct device *dev = pmx->pfc->dev;
> +	struct device_node *child;
> +	unsigned int index;
> +	int ret;
> +
> +	*map = NULL;
> +	*num_maps = 0;
> +	index = 0;
> +
> +	for_each_child_of_node(np, child) {
> +		ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps,
> +					       &index);
> +		if (ret < 0)
> +			goto done;
> +	}
> +
> +	/* If no mapping has been found in child nodes try the config node. */
> +	if (*num_maps = 0) {
> +		ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index);
> +		if (ret < 0)
> +			goto done;
> +	}
> +
> +	if (*num_maps = 0) {
> +		dev_err(dev, "no mapping found in node %s\n", np->full_name);
> +		ret = -EINVAL;
> +		goto done;
> +	}
> +
> +	ret = 0;
> +
> +done:
> +	if (ret < 0)
> +		sh_pfc_dt_free_map(pctldev, *map, *num_maps);
> +
> +	return ret;
> +}

Maybe simpler

+	if (*num_maps)
+		return 0;
+
+	dev_err(dev, "no mapping found in node %s\n", np->full_name);
+	ret = -EINVAL;
+
+done:
+	sh_pfc_dt_free_map(pctldev, *map, *num_maps);
+
+	return ret;

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Guennadi Liakhovetski]

Hi Laurent

On Wed, 15 May 2013, Laurent Pinchart wrote:

> Add GPIO controller nodes to the r8a7790 core device tree.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  arch/arm/boot/dts/r8a7790.dtsi | 54 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
> index ee21061..b5fe51da 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -44,6 +44,60 @@
>  		};
>  	};
>  
> +	gpio0: gpio@ffc40000 {
> +		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
> +		reg = <0xffc40000 0x2c>;
> +		interrupt-parent = <&gic>;
> +		interrupts = <0 4 0x4>;
> +		#gpio-cells = <2>;
> +		gpio-controller;
> +	};

I'm testing your patches on Lager and GPIOs don't seem to get registered:

/ # ls /sys/class/gpio/
export    unexport
/ #

And this is easy to trace back: sh_pfc_probe() calls 
sh_pfc_register_gpiochip(), where a check

	if (pfc->info->data_regs = NULL)
		return 0;

successfully fails GPIO initialisation :) Is this known and there are 
still some pieces missing, or you weren't aware of this?

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Laurent Pinchart]

Hi Guennadi,

On Thursday 16 May 2013 09:57:20 Guennadi Liakhovetski wrote:
> On Wed, 15 May 2013, Laurent Pinchart wrote:
> > Add GPIO controller nodes to the r8a7790 core device tree.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  arch/arm/boot/dts/r8a7790.dtsi | 54 +++++++++++++++++++++++++++++++++++++
> >  1 file changed, 54 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> > b/arch/arm/boot/dts/r8a7790.dtsi index ee21061..b5fe51da 100644
> > --- a/arch/arm/boot/dts/r8a7790.dtsi
> > +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > @@ -44,6 +44,60 @@
> >  		};
> >  	};
> > 
> > +	gpio0: gpio@ffc40000 {
> > +		compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
> > +		reg = <0xffc40000 0x2c>;
> > +		interrupt-parent = <&gic>;
> > +		interrupts = <0 4 0x4>;
> > +		#gpio-cells = <2>;
> > +		gpio-controller;
> > +	};
> 
> I'm testing your patches on Lager and GPIOs don't seem to get registered:
> 
> / # ls /sys/class/gpio/
> export    unexport
> / #
> 
> And this is easy to trace back: sh_pfc_probe() calls
> sh_pfc_register_gpiochip(), where a check
> 
> 	if (pfc->info->data_regs = NULL)
> 		return 0;
> 
> successfully fails GPIO initialisation :) Is this known and there are
> still some pieces missing, or you weren't aware of this?

GPIOs are handled by the gpio-rcar driver on R8A7790, not by the sh-pfc 
driver.

-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 01/20] sh-pfc: Add DT support

[Laurent Pinchart]

Hi Guennadi,

On Wednesday 15 May 2013 16:03:10 Guennadi Liakhovetski wrote:
> Hi Laurent
> 
> Thanks for your work on this! Sorry for jumping in so late in the game.

No worries.

> Let's do it this way: I don't think my comments are serious enough to
> enforce a v4. If noone else complains, I'm fine with addressing them in an
> incremental patch. If you get more comments and have to do a v4, you can
> address mine too, otherwise I'm fine with this version going in and
> improving it slightly afterwards.

I don't mind submitting a v4.

> On Wed, 15 May 2013, Laurent Pinchart wrote:
> > Support device instantiation through the device tree. The compatible
> > property is used to select the SoC pinmux information.
> > 
> > Set the gpio_chip device field to the PFC device to enable automatic
> > GPIO OF support.
> > 
> > Cc: devicetree-discuss@lists.ozlabs.org
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  .../bindings/pinctrl/renesas,pfc-pinctrl.txt       | 143 ++++++++++++
> >  drivers/pinctrl/sh-pfc/core.c                      |  66 +++++-
> >  drivers/pinctrl/sh-pfc/pinctrl.c                   | 244 ++++++++++++++++
> >  3 files changed, 451 insertions(+), 2 deletions(-)
> >  create mode 100644
> >  Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt> 
> > diff --git
> > a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
> > b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt new
> > file mode 100644
> > index 0000000..e7aae39
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
> > @@ -0,0 +1,143 @@
> > +* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
> > +
> > +The Pin Function Controller (PFC) is a Pin Mux/Config controller. On
> > SH7372, +SH73A0, R8A73A4 and R8A7740 it also acts as a GPIO controller.
> > +
> > +
> > +Pin Control
> > +-----------
> > +
> > +Required Properties:
> > +
> > +  - compatible: should be one of the following.
> > +    - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible
> > pin-controller.
> > +    - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-
> > controller.
> > +    - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-
> > controller.
> > +    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-
> > controller.
> > +    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-
> > controller.
> > +    - "renesas,pfc-sh7372": for SH7372 (SH-Mobile AP4) compatible
> > pin-controller.
> > +    - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-
> > controller.
> > +
> > +  - reg: Base address and length of each memory resource used by the pin
> > +    controller hardware module.
> > +
> > +The PFC node also acts as a container for pin configuration nodes. Please
> > +refer to pinctrl-bindings.txt in this directory for the definition of the
> > +term "pin configuration node" and for the common pinctrl bindings used by
> > +client devices.
> > +
> > +Each pin configuration node represents a desired configuration for a pin,
> > +a pin group, or a list of pins or pin groups. The configuration can
> > +include the function to select on those pin(s) and pin configuration
> > +parameters (such as +pull-up and pull-down).
> > +
> > +Pin configuration nodes contain pin configuration properties, either
> > +directly or grouped in child subnodes. Both pin muxing and configuration
> > +parameters can be grouped in that way and referenced as a single pin
> > +configuration node by client devices.
> > +
> > +A configuration node or subnode must reference at least one pin (through
> > +the pins or pin groups properties) and contain at least a function or one
> > +configuration parameter. When the function is present only pin groups can
> > +be used to reference pins.
> > +
> > +All pin configuration nodes and subnodes names are ignored. All of those
> > +nodes are parsed through phandles and processed purely based on their
> > +content.
> > +
> > +Pin Configuration Node Properties:
> > +
> > +- renesas,pins : An array of strings, each string containing the name of
> > +  a pin.
> > +- renesas,groups : An array of strings, each string containing the name
> > +  of a pin group.
> > +
> > +- renesas,function: A string containing the name of the function to mux
> > +  to the pin group(s) specified by the renesas,groups property
> > +
> > +  Valid values for pin, group and function names can be found in the
> > +  group and function arrays of the PFC data file corresponding to the SoC
> > +  (drivers/pinctrl/sh-pfc/pfc-*.c)
> > +
> > +- renesas,pull-up: An integer representing the pull-up strength to be
> > +  applied to all pins specified by the renesas,pins and renesas-groups
> > +  properties. 0 disables the pull-up, 1 enables it. Other values should
> > +  not be used.
> > +- renesas,pull-down: An integer representing the pull-down strength to be
> > +  applied to all pins specified by the renesas,pins and renesas-groups
> > +  properties. 0 disables the pull-down, 1 enables it. Other values should
> > +  not be used.
> > +
> > +
> > +GPIO
> > +----
> > +
> > +Required Properties:
> > +
> > +  - gpio-controller: Marks the device node as a gpio controller.
> > +
> > +  - #gpio-cells: Should be 2. The first cell is the pin number and the
> > +    second cell is used to specify optional parameters as bit flags.
> > +    Only the GPIO active low flag (bit 0) is currently supported.
> > +
> > +The syntax of the gpio specifier used by client nodes should be the
> > +following with values derived from the SoC user manual.
> > +
> > +  <[phandle of the gpio controller node]
> > +   [pin number within the gpio controller]
> > +   [flags and pull up/down]>
> 
> How should pull up / down be specified? Above you say only "active low" is
> supported so far.

My bad. It should be [flags] only. Pull-up and pull-down configuration should 
go through the renesas,pull-up and renesas,pull-down properties in pin 
configuration nodes.
 
> Actually, I'm a bit confused by how pinctrl and GPIO DT nodes should be
> implemented:
>
> > +
> > +
> > +Examples
> > +--------
> > +
> > +Example 1: SH73A0 (SH-Mobile AG5) pin controller node
> > +
> > +	pfc: pfc@e6050000 {
> > +		compatible = "renesas,pfc-sh73a0";
> > +		reg = <0xe6050000 0x8000>,
> > +		      <0xe605801c 0x1c>;
> > +		gpio-controller;
> > +		#gpio-cells = <2>;
> > +	};
> 
> In this example you add one node, that implements both - a pinctrl and a
> GPIO controller. However, on some platforms you add two DT nodes: one for
> pinctrl and one for GPIO. While doing that your GPIO node has a compatible
> string like
> 
> 		compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
> 
> Do I understand it right, that a separate DT node is used for a GPIO
> controller if the controllers are really well separated on the hardware,
> probably, don't share register address ranges? Is there a driver in the
> kernel, that actually probes those compatible strings? Or the driver for
> those GPIO controllers isn't DT based?

On platforms where the GPIO controller hardware is separate from the PFC 
hardware, GPIOs are handled by the gpio-rcar driver. I've added DT support to 
gpio-rcar, the patches have been posted to the linux-sh mailing list and are 
in my tree at git://linuxtv.org/pinchartl/fbdev.git pinmux/3.9/dt.

> Maybe at least a short explanation and an example with two DT nodes here, or
> a reference to another documentation would help.

What about

diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
index e7aae39..ce2584c 100644
--- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
@@ -68,6 +68,9 @@ Pin Configuration Node Properties:
 GPIO
 ----
 
+On SH7372, SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller
+node.
+
 Required Properties:
 
   - gpio-controller: Marks the device node as a gpio controller.
@@ -81,7 +84,11 @@ with values derived from the SoC user manual.
 
   <[phandle of the gpio controller node]
    [pin number within the gpio controller]
    [flags and pull up/down]>
+
+On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
+Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
+for documentation of the GPIO device tree bindings on those platforms.

> [snip]
> 
> > diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
> > index 3b2fd43..5fa1c6b 100644
> > --- a/drivers/pinctrl/sh-pfc/core.c
> > +++ b/drivers/pinctrl/sh-pfc/core.c
> > @@ -18,6 +18,7 @@
> >  #include <linux/ioport.h>
> >  #include <linux/kernel.h>
> >  #include <linux/module.h>
> > +#include <linux/of_device.h>
> >  #include <linux/pinctrl/machine.h>
> >  #include <linux/platform_device.h>
> >  #include <linux/slab.h>
> > @@ -348,14 +349,74 @@ int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned
> > mark, int pinmux_type)> 
> >  	return 0;
> >  
> >  }
> > 
> > +#ifdef CONFIG_OF
> 
> Not sure, is it really a good idea to use this #ifdef here?

I think there's no point in making the driver larger if CONFIG_OF isn't 
defined, especially for SH platforms.

> I think you could drop all 3 of them in this hunk:

I've dropped the other two.

> [snip]
> 
> >  static int sh_pfc_probe(struct platform_device *pdev)
> >  {
> > 
> > +	const struct platform_device_id *platid = 
platform_get_device_id(pdev);
> > +#ifdef CONFIG_OF
> 
> also here

Dropped.

> > +	struct device_node *np = pdev->dev.of_node;
> > +#endif
> > 
> >  	const struct sh_pfc_soc_info *info;
> >  	struct sh_pfc *pfc;
> >  	int ret;
> > 
> > -	info = pdev->id_entry->driver_data
> > -	      ? (void *)pdev->id_entry->driver_data : pdev-
>dev.platform_data;
> > +	if (platid)
> > +		info = (const void *)platid->driver_data;
> > +#ifdef CONFIG_OF
> 
> and here.

Dropped.

> > +	else if (np)
> > +		info = of_match_device(sh_pfc_of_table, &pdev->dev)->data;
> > +#endif
> > +	else
> > +		info = pdev->dev.platform_data;

I will also add a new patch that removes support for pdev->dev.platform_data, 
as we don't use it anymore.

> > +
> > 
> >  	if (info = NULL)
> >  	
> >  		return -ENODEV;
> 
> [snip]
> 
> > +static int sh_pfc_dt_node_to_map(struct pinctrl_dev *pctldev,
> > +				 struct device_node *np,
> > +				 struct pinctrl_map **map, unsigned *num_maps)
> > +{
> > +	struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
> > +	struct device *dev = pmx->pfc->dev;
> > +	struct device_node *child;
> > +	unsigned int index;
> > +	int ret;
> > +
> > +	*map = NULL;
> > +	*num_maps = 0;
> > +	index = 0;
> > +
> > +	for_each_child_of_node(np, child) {
> > +		ret = sh_pfc_dt_subnode_to_map(dev, child, map, num_maps,
> > +					       &index);
> > +		if (ret < 0)
> > +			goto done;
> > +	}
> > +
> > +	/* If no mapping has been found in child nodes try the config node. 
*/
> > +	if (*num_maps = 0) {
> > +		ret = sh_pfc_dt_subnode_to_map(dev, np, map, num_maps, &index);
> > +		if (ret < 0)
> > +			goto done;
> > +	}
> > +
> > +	if (*num_maps = 0) {
> > +		dev_err(dev, "no mapping found in node %s\n", np->full_name);
> > +		ret = -EINVAL;
> > +		goto done;
> > +	}
> > +
> > +	ret = 0;
> > +
> > +done:
> > +	if (ret < 0)
> > +		sh_pfc_dt_free_map(pctldev, *map, *num_maps);
> > +
> > +	return ret;
> > +}
> 
> Maybe simpler
> 
> +	if (*num_maps)
> +		return 0;
> +
> +	dev_err(dev, "no mapping found in node %s\n", np->full_name);
> +	ret = -EINVAL;
> +
> +done:
> +	sh_pfc_dt_free_map(pctldev, *map, *num_maps);
> +
> +	return ret;

OK I'll change that.

-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Guennadi Liakhovetski]

Hi Laurent

On Wed, 15 May 2013, Laurent Pinchart wrote:

> Add GPIO controller nodes to the r8a7790 core device tree.
> 
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  arch/arm/boot/dts/r8a7790.dtsi | 54 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 54 insertions(+)

Also here a couple of things are missing (presumably, for other SoCs you 
need the same):

diff --git a/arch/arm/boot/dts/r8a7790.dtsi 
b/arch/arm/boot/dts/r8a7790.dtsi
index 674ee39..cd1a04f 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -51,6 +51,7 @@
 		interrupts = <0 4 0x4>;
 		#gpio-cells = <2>;
 		gpio-controller;
+		gpio-ranges = <&pfc 0 0 32>;
 	};
 
 	gpio1: gpio@ffc41000 {
@@ -60,6 +61,7 @@
 		interrupts = <0 5 0x4>;
 		#gpio-cells = <2>;
 		gpio-controller;
+		gpio-ranges = <&pfc 0 32 32>;
 	};
 
 	gpio2: gpio@ffc42000 {
@@ -69,6 +71,7 @@
 		interrupts = <0 6 0x4>;
 		#gpio-cells = <2>;
 		gpio-controller;
+		gpio-ranges = <&pfc 0 64 32>;
 	};
 
 	gpio3: gpio@ffc43000 {
@@ -78,6 +81,7 @@
 		interrupts = <0 7 0x4>;
 		#gpio-cells = <2>;
 		gpio-controller;
+		gpio-ranges = <&pfc 0 96 32>;
 	};
 
 	gpio4: gpio@ffc44000 {
@@ -87,6 +91,7 @@
 		interrupts = <0 8 0x4>;
 		#gpio-cells = <2>;
 		gpio-controller;
+		gpio-ranges = <&pfc 0 128 32>;
 	};
 
 	gpio5: gpio@ffc45000 {
@@ -96,6 +101,7 @@
 		interrupts = <0 9 0x4>;
 		#gpio-cells = <2>;
 		gpio-controller;
+		gpio-ranges = <&pfc 0 160 32>;
 	};
 
 	timer {
@@ -118,6 +124,7 @@
 	pfc: pfc@e6060000 {
 		compatible = "renesas,pfc-r8a7790";
 		reg = <0 0xe6060000 0 0x250>;
+		#gpio-range-cells = <3>;
 	};
 
 	/* No MMC_CAP_UHS_DDR50 (dual data rate) capability on r8a7790! */

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Laurent Pinchart]

Hi Guennadi,

On Friday 17 May 2013 14:26:48 Guennadi Liakhovetski wrote:
> Hi Laurent
> 
> On Wed, 15 May 2013, Laurent Pinchart wrote:
> > Add GPIO controller nodes to the r8a7790 core device tree.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  arch/arm/boot/dts/r8a7790.dtsi | 54 +++++++++++++++++++++++++++++++++++++
> >  1 file changed, 54 insertions(+)
> 
> Also here a couple of things are missing (presumably, for other SoCs you
> need the same):

Thank you for testing the patch set. I'll integrate the modification in the 
next version for r8a7778, r8a7779 and r8a7790.

As the gpio-ranges property specifies the number of GPIOs handled by the 
controller, what's your opinion on dropping the #gpio-lines property from the 
bindings ?

> diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> b/arch/arm/boot/dts/r8a7790.dtsi
> index 674ee39..cd1a04f 100644
> --- a/arch/arm/boot/dts/r8a7790.dtsi
> +++ b/arch/arm/boot/dts/r8a7790.dtsi
> @@ -51,6 +51,7 @@
>  		interrupts = <0 4 0x4>;
>  		#gpio-cells = <2>;
>  		gpio-controller;
> +		gpio-ranges = <&pfc 0 0 32>;
>  	};
> 
>  	gpio1: gpio@ffc41000 {
> @@ -60,6 +61,7 @@
>  		interrupts = <0 5 0x4>;
>  		#gpio-cells = <2>;
>  		gpio-controller;
> +		gpio-ranges = <&pfc 0 32 32>;
>  	};
> 
>  	gpio2: gpio@ffc42000 {
> @@ -69,6 +71,7 @@
>  		interrupts = <0 6 0x4>;
>  		#gpio-cells = <2>;
>  		gpio-controller;
> +		gpio-ranges = <&pfc 0 64 32>;
>  	};
> 
>  	gpio3: gpio@ffc43000 {
> @@ -78,6 +81,7 @@
>  		interrupts = <0 7 0x4>;
>  		#gpio-cells = <2>;
>  		gpio-controller;
> +		gpio-ranges = <&pfc 0 96 32>;
>  	};
> 
>  	gpio4: gpio@ffc44000 {
> @@ -87,6 +91,7 @@
>  		interrupts = <0 8 0x4>;
>  		#gpio-cells = <2>;
>  		gpio-controller;
> +		gpio-ranges = <&pfc 0 128 32>;
>  	};
> 
>  	gpio5: gpio@ffc45000 {
> @@ -96,6 +101,7 @@
>  		interrupts = <0 9 0x4>;
>  		#gpio-cells = <2>;
>  		gpio-controller;
> +		gpio-ranges = <&pfc 0 160 32>;
>  	};
> 
>  	timer {
> @@ -118,6 +124,7 @@
>  	pfc: pfc@e6060000 {
>  		compatible = "renesas,pfc-r8a7790";
>  		reg = <0 0xe6060000 0 0x250>;
> +		#gpio-range-cells = <3>;
>  	};
> 
>  	/* No MMC_CAP_UHS_DDR50 (dual data rate) capability on r8a7790! */

-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Guennadi Liakhovetski]

Hi Laurent

On Sat, 18 May 2013, Laurent Pinchart wrote:

> Hi Guennadi,
> 
> On Friday 17 May 2013 14:26:48 Guennadi Liakhovetski wrote:
> > Hi Laurent
> > 
> > On Wed, 15 May 2013, Laurent Pinchart wrote:
> > > Add GPIO controller nodes to the r8a7790 core device tree.
> > > 
> > > Signed-off-by: Laurent Pinchart
> > > <laurent.pinchart+renesas@ideasonboard.com>
> > > ---
> > > 
> > >  arch/arm/boot/dts/r8a7790.dtsi | 54 +++++++++++++++++++++++++++++++++++++
> > >  1 file changed, 54 insertions(+)
> > 
> > Also here a couple of things are missing (presumably, for other SoCs you
> > need the same):
> 
> Thank you for testing the patch set. I'll integrate the modification in the 
> next version for r8a7778, r8a7779 and r8a7790.
> 
> As the gpio-ranges property specifies the number of GPIOs handled by the 
> controller, what's your opinion on dropping the #gpio-lines property from the 
> bindings ?

Well, gpio-ranges can contain several ranges, so, in a generic case you 
would have to sum them up to get a total count. But if you're ok with that 
or if your platforms only have 1 gpio gange per controller, of course, 
that property seems redundant. OTOH it is already used in r8a7779.dtsi, 
and thus already belongs to the ABI... Not sure whether removing it would 
be accepted.

Thanks
Guennadi

> > diff --git a/arch/arm/boot/dts/r8a7790.dtsi
> > b/arch/arm/boot/dts/r8a7790.dtsi
> > index 674ee39..cd1a04f 100644
> > --- a/arch/arm/boot/dts/r8a7790.dtsi
> > +++ b/arch/arm/boot/dts/r8a7790.dtsi
> > @@ -51,6 +51,7 @@
> >  		interrupts = <0 4 0x4>;
> >  		#gpio-cells = <2>;
> >  		gpio-controller;
> > +		gpio-ranges = <&pfc 0 0 32>;
> >  	};
> > 
> >  	gpio1: gpio@ffc41000 {

---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Laurent Pinchart]

Hi Guennadi,

On Saturday 18 May 2013 08:57:41 Guennadi Liakhovetski wrote:
> On Sat, 18 May 2013, Laurent Pinchart wrote:
> > On Friday 17 May 2013 14:26:48 Guennadi Liakhovetski wrote:
> > > On Wed, 15 May 2013, Laurent Pinchart wrote:
> > > > Add GPIO controller nodes to the r8a7790 core device tree.
> > > > 
> > > > Signed-off-by: Laurent Pinchart 
> > > > <laurent.pinchart+renesas@ideasonboard.com>
> > > > ---
> > > > 
> > > >  arch/arm/boot/dts/r8a7790.dtsi | 54 +++++++++++++++++++++++++++++++++
> > > >  1 file changed, 54 insertions(+)
> > > 
> > > Also here a couple of things are missing (presumably, for other SoCs you
> > > need the same):
> >
> > Thank you for testing the patch set. I'll integrate the modification in
> > the next version for r8a7778, r8a7779 and r8a7790.
> > 
> > As the gpio-ranges property specifies the number of GPIOs handled by the
> > controller, what's your opinion on dropping the #gpio-lines property from
> > the bindings ?
> 
> Well, gpio-ranges can contain several ranges, so, in a generic case you
> would have to sum them up to get a total count. But if you're ok with that
> or if your platforms only have 1 gpio gange per controller, of course,
> that property seems redundant.

The gpio-rcar driver exposes a single range on all the current platforms. I 
don't really foresee any change there in the future, but I might be 
overlooking something. Magnus, any opinion ?

> OTOH it is already used in r8a7779.dtsi, and thus already belongs to the
> ABI... Not sure whether removing it would be accepted.

It's only used in my DT bindings proposal that haven't been merged yet, so 
that shouldn't be an issue :-)

-- 
Regards,

Laurent Pinchart

Re: [PATCH v3 09/20] ARM: shmobile: r8a7790: Add GPIO controller devices to device tree

[Guennadi Liakhovetski]

On Sat, 18 May 2013, Laurent Pinchart wrote:

> Hi Guennadi,
> 
> On Saturday 18 May 2013 08:57:41 Guennadi Liakhovetski wrote:
> > On Sat, 18 May 2013, Laurent Pinchart wrote:
> > > On Friday 17 May 2013 14:26:48 Guennadi Liakhovetski wrote:
> > > > On Wed, 15 May 2013, Laurent Pinchart wrote:
> > > > > Add GPIO controller nodes to the r8a7790 core device tree.
> > > > > 
> > > > > Signed-off-by: Laurent Pinchart 
> > > > > <laurent.pinchart+renesas@ideasonboard.com>
> > > > > ---
> > > > > 
> > > > >  arch/arm/boot/dts/r8a7790.dtsi | 54 +++++++++++++++++++++++++++++++++
> > > > >  1 file changed, 54 insertions(+)
> > > > 
> > > > Also here a couple of things are missing (presumably, for other SoCs you
> > > > need the same):
> > >
> > > Thank you for testing the patch set. I'll integrate the modification in
> > > the next version for r8a7778, r8a7779 and r8a7790.
> > > 
> > > As the gpio-ranges property specifies the number of GPIOs handled by the
> > > controller, what's your opinion on dropping the #gpio-lines property from
> > > the bindings ?
> > 
> > Well, gpio-ranges can contain several ranges, so, in a generic case you
> > would have to sum them up to get a total count. But if you're ok with that
> > or if your platforms only have 1 gpio gange per controller, of course,
> > that property seems redundant.
> 
> The gpio-rcar driver exposes a single range on all the current platforms. I 
> don't really foresee any change there in the future, but I might be 
> overlooking something. Magnus, any opinion ?
> 
> > OTOH it is already used in r8a7779.dtsi, and thus already belongs to the
> > ABI... Not sure whether removing it would be accepted.
> 
> It's only used in my DT bindings proposal that haven't been merged yet, so 
> that shouldn't be an issue :-)

Then yes, sure, you can add it any time in the future if needed, removing 
is more difficult ;-)

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/