* Re: [PATCH] ARM: Fix regression caused by ARCH_NR_GPIOS removal
From: Rafael J. Wysocki @ 2012-01-15 12:07 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20120114233626.GA11769@n2100.arm.linux.org.uk>
On Sunday, January 15, 2012, Russell King - ARM Linux wrote:
> On Sun, Jan 15, 2012 at 12:33:25AM +0100, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki <rjw@sisk.pl>
> >
> > Commit 3dea19e826da3dd43b3dc308aca299c0b7263c6b (ARM: 7244/1:
> > mach-shmobile: Use CONFIG_ARCH_NR_GPIO) removed ARCH_NR_GPIOS
> > and introduced ARCH_NR_GPIO instead without changing the users
> > of that symbol. As a result, the kernels including that commit
> > don't boot on my test-bed Mackerel board.
> >
> > Fix the problem by defining ARCH_NR_GPIOS again.
>
> I'm aware of it, and have:
>
> commit ca95023e7521729d3ace6fb3b9c53281c510a18c
> Author: Stephen Warren <swarren@nvidia.com>
> Date: Thu Jan 5 21:36:27 2012 +0100
>
> ARM: 7271/1: Fix typo in conversion of ARCH_NR_GPIOS to Kconfig
>
> Commit 44986ab "ARM: 7240/1: Make ARCH_NR_GPIO a Kconfig variable"
> spelled ARCH_NR_GPIOS as ARCH_NR_GPIO, hence making the change
> ineffective. This change fixes that.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
>
> already queued up.
Cool, thanks!
Rafael
^ permalink raw reply
* Re: [PATCH 01/14] common: dma-mapping: introduce alloc_attrs and free_attrs methods
From: David Gibson @ 2012-01-16 1:57 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-kernel, Benjamin Herrenschmidt, Thomas Gleixner,
Andrew Morton, Arnd Bergmann, Stephen Rothwell,
microblaze-uclinux, linux-arch, x86, linux-sh, linux-alpha,
sparclinux, linux-ia64, linuxppc-dev, linux-mips, discuss,
linux-arm-kernel, linux-mm, linaro-mm-sig, Jonathan Corbet,
Kyungmin Park, Andrzej Pietrasiewicz
In-Reply-To: <1324643253-3024-2-git-send-email-m.szyprowski@samsung.com>
On Fri, Dec 23, 2011 at 01:27:20PM +0100, Marek Szyprowski wrote:
> Introduce new generic alloc and free methods with attributes argument.
>
> Existing alloc_coherent and free_coherent can be implemented on top of the
> new calls with NULL attributes argument. Later also dma_alloc_non_coherent
> can be implemented using DMA_ATTR_NONCOHERENT attribute as well as
> dma_alloc_writecombine with separate DMA_ATTR_WRITECOMBINE attribute.
>
> This way the drivers will get more generic, platform independent way of
> allocating dma buffers with specific parameters.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Looks sensible to me.
Reviewed-by: David Gibson <david@gibson.dropbear.ud.au>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 04/14] PowerPC: adapt for dma_map_ops changes
From: David Gibson @ 2012-01-16 8:09 UTC (permalink / raw)
To: Marek Szyprowski
Cc: linux-kernel, Benjamin Herrenschmidt, Thomas Gleixner,
Andrew Morton, Arnd Bergmann, Stephen Rothwell,
microblaze-uclinux, linux-arch, x86, linux-sh, linux-alpha,
sparclinux, linux-ia64, linuxppc-dev, linux-mips, discuss,
linux-arm-kernel, linux-mm, linaro-mm-sig, Jonathan Corbet,
Kyungmin Park, Andrzej Pietrasiewicz
In-Reply-To: <1324643253-3024-5-git-send-email-m.szyprowski@samsung.com>
On Fri, Dec 23, 2011 at 01:27:23PM +0100, Marek Szyprowski wrote:
> From: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
>
> Adapt core PowerPC architecture code for dma_map_ops changes: replace
> alloc/free_coherent with generic alloc/free methods.
>
> Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Looks sane.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* [GIT PULL] Power management fixes and additional updates for 3.3
From: Rafael J. Wysocki @ 2012-01-16 19:28 UTC (permalink / raw)
To: Linus Torvalds; +Cc: LKML, Linux PM list, Linux-sh list
Hi Linus,
Please pull power management fixes and additional updates (on top of commit
96e80a7851b44f3decaac0625665cd64e550b71d) for 3.3 from:
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git pm-for-linus
with top-most commit ee34a37049114303011e154478c63b977bcff24c
(PM / Hibernate: Drop the check of swap space size for compressed image).
They include:
* Build fixes for generic PM domains.
* A3SP power domain suspend fix from Guennadi Liakhovetski.
* Fix for a regression that made sysrq-o unavailable for CONFIG_PM unset.
* Hibernate modification dropping swap size check for compressed images.
Thanks!
arch/arm/mach-shmobile/pm-sh7372.c | 2 +-
drivers/base/power/domain.c | 15 +++++++++++++++
drivers/base/power/domain_governor.c | 24 +++++++++++++++++++-----
kernel/Makefile | 3 +--
kernel/power/swap.c | 13 +++++++------
5 files changed, 43 insertions(+), 14 deletions(-)
---------------
Barry Song (1):
PM / Hibernate: Drop the check of swap space size for compressed image
Guennadi Liakhovetski (1):
PM / shmobile: fix A3SP suspend method
Rafael J. Wysocki (3):
PM: Make sysrq-o be available for CONFIG_PM unset
PM / Domains: Fix build for CONFIG_PM_SLEEP unset
PM / Domains: Skip governor functions for CONFIG_PM_RUNTIME unset
^ permalink raw reply
* Re: [RFC PATCH 05/10] sh: intc: remove dependency on NR_IRQS
From: Nobuhiro Iwamatsu @ 2012-01-17 1:54 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1326472451-9002-6-git-send-email-robherring2@gmail.com>
Hi,
2012/1/14 Rob Herring <robherring2@gmail.com>:
> From: Rob Herring <rob.herring@calxeda.com>
>
> SH intc has a compile time dependency on NR_IRQS. Make this dependency a
> local define so that shmobile (and ARM in general) can have run-time
> NR_IRQS setting. SH has NR_IRQS set to 512 and shmobile has NR_IRQS set to
> 1024, so we are using the maximum.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> ---
> drivers/sh/intc/balancing.c | 2 +-
> drivers/sh/intc/core.c | 2 +-
> drivers/sh/intc/handle.c | 2 +-
> drivers/sh/intc/internals.h | 9 +++++++++
> drivers/sh/intc/virq.c | 2 +-
> 5 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/sh/intc/balancing.c b/drivers/sh/intc/balancing.c
> index cec7a96..bc78080 100644
> --- a/drivers/sh/intc/balancing.c
> +++ b/drivers/sh/intc/balancing.c
> @@ -9,7 +9,7 @@
> */
> #include "internals.h"
>
> -static unsigned long dist_handle[NR_IRQS];
> +static unsigned long dist_handle[INTC_NR_IRQS];
>
> void intc_balancing_enable(unsigned int irq)
> {
> diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
> index e53e449..2fde897 100644
> --- a/drivers/sh/intc/core.c
> +++ b/drivers/sh/intc/core.c
> @@ -42,7 +42,7 @@ unsigned int nr_intc_controllers;
> * - this needs to be at least 2 for 5-bit priorities on 7780
> */
> static unsigned int default_prio_level = 2; /* 2 - 16 */
> -static unsigned int intc_prio_level[NR_IRQS]; /* for now */
> +static unsigned int intc_prio_level[INTC_NR_IRQS]; /* for now */
>
> unsigned int intc_get_dfl_prio_level(void)
> {
> diff --git a/drivers/sh/intc/handle.c b/drivers/sh/intc/handle.c
> index 057ce56..f461d53 100644
> --- a/drivers/sh/intc/handle.c
> +++ b/drivers/sh/intc/handle.c
> @@ -13,7 +13,7 @@
> #include <linux/spinlock.h>
> #include "internals.h"
>
> -static unsigned long ack_handle[NR_IRQS];
> +static unsigned long ack_handle[INTC_NR_IRQS];
>
> static intc_enum __init intc_grp_id(struct intc_desc *desc,
> intc_enum enum_id)
> diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
> index b0e9155..469f092 100644
> --- a/drivers/sh/intc/internals.h
> +++ b/drivers/sh/intc/internals.h
> @@ -6,6 +6,15 @@
> #include <linux/radix-tree.h>
> #include <linux/device.h>
>
> +#define INTC_NR_IRQS 1024
On SH, INTC_NR_IRQS ( NR_IRQS ) is using to by arch/sh/kernel/machvec.c.
And, this is defined by arch/sh/include/asm/irq.h.
You need to remove or rename from these.
> +
> +#ifndef evt2irq
> +#define evt2irq(evt) (((evt) >> 5) - 16)
> +#endif
> +#ifndef irq2evt
> +#define irq2evt(irq) (((irq) + 16) << 5)
> +#endif
> +
These are defined in arch/arm/mach-shmobile/include/mach/irqs.h and
arch/sh/include/asm/irq.h.
I propose that linux/sh_intc.h defines these.
Best regards,
Nobuhiro
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
^ permalink raw reply
* Re: [RFC PATCH 05/10] sh: intc: remove dependency on NR_IRQS
From: Rob Herring @ 2012-01-17 2:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABMQnVKfitZu01_sKeVoC94y3GjbfTHqFEZ8ANWF4PCqA6F-Ug@mail.gmail.com>
On 01/16/2012 07:54 PM, Nobuhiro Iwamatsu wrote:
> Hi,
>
> 2012/1/14 Rob Herring <robherring2@gmail.com>:
>> From: Rob Herring <rob.herring@calxeda.com>
>>
>> SH intc has a compile time dependency on NR_IRQS. Make this dependency a
>> local define so that shmobile (and ARM in general) can have run-time
>> NR_IRQS setting. SH has NR_IRQS set to 512 and shmobile has NR_IRQS set to
>> 1024, so we are using the maximum.
>>
>> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>> ---
>> drivers/sh/intc/balancing.c | 2 +-
>> drivers/sh/intc/core.c | 2 +-
>> drivers/sh/intc/handle.c | 2 +-
>> drivers/sh/intc/internals.h | 9 +++++++++
>> drivers/sh/intc/virq.c | 2 +-
>> 5 files changed, 13 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/sh/intc/balancing.c b/drivers/sh/intc/balancing.c
>> index cec7a96..bc78080 100644
>> --- a/drivers/sh/intc/balancing.c
>> +++ b/drivers/sh/intc/balancing.c
>> @@ -9,7 +9,7 @@
>> */
>> #include "internals.h"
>>
>> -static unsigned long dist_handle[NR_IRQS];
>> +static unsigned long dist_handle[INTC_NR_IRQS];
>>
>> void intc_balancing_enable(unsigned int irq)
>> {
>> diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
>> index e53e449..2fde897 100644
>> --- a/drivers/sh/intc/core.c
>> +++ b/drivers/sh/intc/core.c
>> @@ -42,7 +42,7 @@ unsigned int nr_intc_controllers;
>> * - this needs to be at least 2 for 5-bit priorities on 7780
>> */
>> static unsigned int default_prio_level = 2; /* 2 - 16 */
>> -static unsigned int intc_prio_level[NR_IRQS]; /* for now */
>> +static unsigned int intc_prio_level[INTC_NR_IRQS]; /* for now */
>>
>> unsigned int intc_get_dfl_prio_level(void)
>> {
>> diff --git a/drivers/sh/intc/handle.c b/drivers/sh/intc/handle.c
>> index 057ce56..f461d53 100644
>> --- a/drivers/sh/intc/handle.c
>> +++ b/drivers/sh/intc/handle.c
>> @@ -13,7 +13,7 @@
>> #include <linux/spinlock.h>
>> #include "internals.h"
>>
>> -static unsigned long ack_handle[NR_IRQS];
>> +static unsigned long ack_handle[INTC_NR_IRQS];
>>
>> static intc_enum __init intc_grp_id(struct intc_desc *desc,
>> intc_enum enum_id)
>> diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
>> index b0e9155..469f092 100644
>> --- a/drivers/sh/intc/internals.h
>> +++ b/drivers/sh/intc/internals.h
>> @@ -6,6 +6,15 @@
>> #include <linux/radix-tree.h>
>> #include <linux/device.h>
>>
>> +#define INTC_NR_IRQS 1024
>
> On SH, INTC_NR_IRQS ( NR_IRQS ) is using to by arch/sh/kernel/machvec.c.
> And, this is defined by arch/sh/include/asm/irq.h.
> You need to remove or rename from these.
>
machvec.c will still pickup NR_IRQS from arch/sh/include/asm/irq.h, so
there is no change there. The value here is increased from 512 for SH to
1024, but that should not have any functional impact only array storage
space. Where it is used is a bit of a hack as the comment indicates. The
only other easy way to fix it I see is with an #ifdef CONFIG_SH or
CONFIG_ARM here. I welcome patches if you've got better ideas.
>> +
>> +#ifndef evt2irq
>> +#define evt2irq(evt) (((evt) >> 5) - 16)
>> +#endif
>> +#ifndef irq2evt
>> +#define irq2evt(irq) (((irq) + 16) << 5)
>> +#endif
>> +
>
> These are defined in arch/arm/mach-shmobile/include/mach/irqs.h and
> arch/sh/include/asm/irq.h.
>
> I propose that linux/sh_intc.h defines these.
>
Agreed. I will combine both versions there.
Rob
> Best regards,
> Nobuhiro
>
^ permalink raw reply
* Re: [RFC PATCH 05/10] sh: intc: remove dependency on NR_IRQS
From: Nobuhiro Iwamatsu @ 2012-01-17 5:09 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4F14DEF3.5020907@gmail.com>
2012/1/17 Rob Herring <robherring2@gmail.com>:
> On 01/16/2012 07:54 PM, Nobuhiro Iwamatsu wrote:
>> Hi,
>>
>> 2012/1/14 Rob Herring <robherring2@gmail.com>:
>>> From: Rob Herring <rob.herring@calxeda.com>
>>>
>>> SH intc has a compile time dependency on NR_IRQS. Make this dependency a
>>> local define so that shmobile (and ARM in general) can have run-time
>>> NR_IRQS setting. SH has NR_IRQS set to 512 and shmobile has NR_IRQS set to
>>> 1024, so we are using the maximum.
>>>
>>> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>>> ---
>>> drivers/sh/intc/balancing.c | 2 +-
>>> drivers/sh/intc/core.c | 2 +-
>>> drivers/sh/intc/handle.c | 2 +-
>>> drivers/sh/intc/internals.h | 9 +++++++++
>>> drivers/sh/intc/virq.c | 2 +-
>>> 5 files changed, 13 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/sh/intc/balancing.c b/drivers/sh/intc/balancing.c
>>> index cec7a96..bc78080 100644
>>> --- a/drivers/sh/intc/balancing.c
>>> +++ b/drivers/sh/intc/balancing.c
>>> @@ -9,7 +9,7 @@
>>> */
>>> #include "internals.h"
>>>
>>> -static unsigned long dist_handle[NR_IRQS];
>>> +static unsigned long dist_handle[INTC_NR_IRQS];
>>>
>>> void intc_balancing_enable(unsigned int irq)
>>> {
>>> diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
>>> index e53e449..2fde897 100644
>>> --- a/drivers/sh/intc/core.c
>>> +++ b/drivers/sh/intc/core.c
>>> @@ -42,7 +42,7 @@ unsigned int nr_intc_controllers;
>>> * - this needs to be at least 2 for 5-bit priorities on 7780
>>> */
>>> static unsigned int default_prio_level = 2; /* 2 - 16 */
>>> -static unsigned int intc_prio_level[NR_IRQS]; /* for now */
>>> +static unsigned int intc_prio_level[INTC_NR_IRQS]; /* for now */
>>>
>>> unsigned int intc_get_dfl_prio_level(void)
>>> {
>>> diff --git a/drivers/sh/intc/handle.c b/drivers/sh/intc/handle.c
>>> index 057ce56..f461d53 100644
>>> --- a/drivers/sh/intc/handle.c
>>> +++ b/drivers/sh/intc/handle.c
>>> @@ -13,7 +13,7 @@
>>> #include <linux/spinlock.h>
>>> #include "internals.h"
>>>
>>> -static unsigned long ack_handle[NR_IRQS];
>>> +static unsigned long ack_handle[INTC_NR_IRQS];
>>>
>>> static intc_enum __init intc_grp_id(struct intc_desc *desc,
>>> intc_enum enum_id)
>>> diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
>>> index b0e9155..469f092 100644
>>> --- a/drivers/sh/intc/internals.h
>>> +++ b/drivers/sh/intc/internals.h
>>> @@ -6,6 +6,15 @@
>>> #include <linux/radix-tree.h>
>>> #include <linux/device.h>
>>>
>>> +#define INTC_NR_IRQS 1024
>>
>> On SH, INTC_NR_IRQS ( NR_IRQS ) is using to by arch/sh/kernel/machvec.c.
>> And, this is defined by arch/sh/include/asm/irq.h.
>> You need to remove or rename from these.
>>
>
> machvec.c will still pickup NR_IRQS from arch/sh/include/asm/irq.h, so
> there is no change there. The value here is increased from 512 for SH to
> 1024, but that should not have any functional impact only array storage
> space. Where it is used is a bit of a hack as the comment indicates. The
> only other easy way to fix it I see is with an #ifdef CONFIG_SH or
> CONFIG_ARM here. I welcome patches if you've got better ideas.
>
I also cared about the problem from which array increases in SH.
Since drivers/sh/intc/internals.h is referred to only from intc function,
it needs to define INTC_NR_IRQS as other places.
How is it that defines by Kconfig?
I created a patch on your patch. Could you give comment?
Best regards,
Nobuhiro
------
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index 45d08b6..9278bb0 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -9,7 +9,6 @@
* advised to cap this at the hard limit that they're interested in
* through the machvec.
*/
-#define NR_IRQS 512
#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
/*
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index 3d722e4..e6b12b4 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -123,5 +123,5 @@ void __init sh_mv_setup(void)
mv_set(mem_init);
if (!sh_mv.mv_nr_irqs)
- sh_mv.mv_nr_irqs = NR_IRQS;
+ sh_mv.mv_nr_irqs = CONFIG_SH_NR_IRQS;
}
diff --git a/drivers/sh/intc/Kconfig b/drivers/sh/intc/Kconfig
index c88cbcc..38d51f1 100644
--- a/drivers/sh/intc/Kconfig
+++ b/drivers/sh/intc/Kconfig
@@ -33,3 +33,9 @@ config INTC_MAPPING_DEBUG
between system IRQs and the per-controller id tables.
If in doubt, say N.
+
+config SH_NR_IRQS
+ int
+ depends on ARCH_SHMOBILE || SUPERH
+ default 1024 if ARCH_SHMOBILE
+ default 512 if SUPERH
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index 469f092..076c286 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -6,7 +6,7 @@
#include <linux/radix-tree.h>
#include <linux/device.h>
-#define INTC_NR_IRQS 1024
+#define INTC_NR_IRQS CONFIG_SH_NR_IRQS
#ifndef evt2irq
#define evt2irq(evt) (((evt) >> 5) - 16)
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
^ permalink raw reply related
* [PATCH] mmc: sh_mmcif: fix MMC_GEN_CMD setting
From: Yoshihiro Shimoda @ 2012-01-17 8:05 UTC (permalink / raw)
To: cjb; +Cc: linux-mmc, SH-Linux
The MMC_GEN_CMD (CMD56) doesn't need to check the busy signal.
So, this patch fixes the setting.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
drivers/mmc/host/sh_mmcif.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 4a2c5b2..e8b70e3 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -745,7 +745,6 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
case MMC_SET_WRITE_PROT:
case MMC_CLR_WRITE_PROT:
case MMC_ERASE:
- case MMC_GEN_CMD:
tmp |= CMD_SET_RBSY;
break;
}
@@ -828,7 +827,6 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
case MMC_SET_WRITE_PROT:
case MMC_CLR_WRITE_PROT:
case MMC_ERASE:
- case MMC_GEN_CMD:
mask = MASK_START_CMD | MASK_MRBSYE;
break;
default:
--
1.7.1
^ permalink raw reply related
* [PATCH] sh: fix the sh_mmcif_plat_data in board-sh7757lcr
From: Shimoda, Yoshihiro @ 2012-01-17 8:49 UTC (permalink / raw)
To: linux-sh
The board has an eMMC chip, so we cannot remove the chip.
In this case, we have to set the MMC_CAP_NONREMOVABLE to the caps
parameter.
Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
arch/sh/boards/board-sh7757lcr.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 0838154..33dc5b6 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -222,7 +222,8 @@ static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
static struct sh_mmcif_plat_data sh_mmcif_plat = {
.dma = &sh7757lcr_mmcif_dma,
.sup_pclk = 0x0f,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
+ .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA |
+ MMC_CAP_NONREMOVABLE,
.ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
};
--
1.7.1
^ permalink raw reply related
* Re: [PATCH] sh: fix the sh_mmcif_plat_data in board-sh7757lcr
From: Paul Mundt @ 2012-01-17 10:53 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <4F153622.3090701@renesas.com>
On Tue, Jan 17, 2012 at 05:49:38PM +0900, Shimoda, Yoshihiro wrote:
> The board has an eMMC chip, so we cannot remove the chip.
> In this case, we have to set the MMC_CAP_NONREMOVABLE to the caps
> parameter.
>
> Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Applied, thanks.
^ permalink raw reply
* [PATCH] ARM: mach-shmobile: sh73a0 PINT IRQ base fix
From: Magnus Damm @ 2012-01-17 11:05 UTC (permalink / raw)
To: linux-sh
From: Magnus Damm <damm@opensource.se>
Bump up the sh73a0 PINT IRQ base from 768 to 800 to avoid
collision with INTCS vectors for IRQ16->IRQ32 at 0x3xxx.
Without this fix the sh73a0 IRQ pin handling code collides
with the PINT code which results in hangs on Kota2 during boot.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/mach-shmobile/include/mach/sh73a0.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- 0001/arch/arm/mach-shmobile/include/mach/sh73a0.h
+++ work/arch/arm/mach-shmobile/include/mach/sh73a0.h 2012-01-17 19:34:48.000000000 +0900
@@ -515,8 +515,8 @@ enum {
SHDMA_SLAVE_MMCIF_RX,
};
-/* PINT interrupts are located at Linux IRQ 768 and up */
-#define SH73A0_PINT0_IRQ(irq) ((irq) + 768)
-#define SH73A0_PINT1_IRQ(irq) ((irq) + 800)
+/* PINT interrupts are located at Linux IRQ 800 and up */
+#define SH73A0_PINT0_IRQ(irq) ((irq) + 800)
+#define SH73A0_PINT1_IRQ(irq) ((irq) + 832)
#endif /* __ASM_SH73A0_H__ */
^ permalink raw reply
* [PATCH] ARM: mach-shmobile: sh73a0 IRQ sparse alloc fix
From: Magnus Damm @ 2012-01-17 11:10 UTC (permalink / raw)
To: linux-sh
From: Magnus Damm <damm@opensource.se>
Fix the sh73a0 external IRQ pin code to properly support
CONFIG_SPARSE_IRQ=y by allocating IRQ descriptors for the
cascaded IRQs associated with external IRQ pins.
Without this fix it is impossible to request IRQ0->IRQ31
on the Kota2 board when sparse IRQs are enabled.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/mach-shmobile/intc-sh73a0.c | 2 ++
1 file changed, 2 insertions(+)
--- 0001/arch/arm/mach-shmobile/intc-sh73a0.c
+++ work/arch/arm/mach-shmobile/intc-sh73a0.c 2012-01-17 19:59:22.000000000 +0900
@@ -19,6 +19,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
+#include <linux/module.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/sh_intc.h>
@@ -445,6 +446,7 @@ void __init sh73a0_init_irq(void)
setup_irq(gic_spi(1 + k), &sh73a0_irq_pin_cascade[k]);
n = intcs_evt2irq(to_intc_vect(gic_spi(1 + k)));
+ WARN_ON(irq_alloc_desc_at(n, numa_node_id()) != n);
irq_set_chip_and_handler_name(n, &intca_gic_irq_chip,
handle_level_irq, "level");
set_irq_flags(n, IRQF_VALID); /* yuck */
^ permalink raw reply
* [PATCH] ARM: mach-shmobile: IRQ driven GPIO key support for Kota2
From: Magnus Damm @ 2012-01-17 11:14 UTC (permalink / raw)
To: linux-sh
From: Magnus Damm <damm@opensource.se>
Now when GPIO IRQs are supported on sh73a0 modify the Kota2
board code to switch from the polled "gpio-keys-polled" driver
to the IRQ driven "gpio-keys" driver.
Signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/mach-shmobile/board-kota2.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
--- 0001/arch/arm/mach-shmobile/board-kota2.c
+++ work/arch/arm/mach-shmobile/board-kota2.c 2012-01-17 20:00:13.000000000 +0900
@@ -143,11 +143,10 @@ static struct gpio_keys_button gpio_butt
static struct gpio_keys_platform_data gpio_key_info = {
.buttons = gpio_buttons,
.nbuttons = ARRAY_SIZE(gpio_buttons),
- .poll_interval = 250, /* polled for now */
};
static struct platform_device gpio_keys_device = {
- .name = "gpio-keys-polled", /* polled for now */
+ .name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &gpio_key_info,
^ permalink raw reply
* Re: [RFC PATCH 05/10] sh: intc: remove dependency on NR_IRQS
From: Rob Herring @ 2012-01-17 16:24 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABMQnV+e90OdoK+bMQ16H1PLtBRt9n=QxdCCOT=SZN060Ys+cw@mail.gmail.com>
On 01/16/2012 11:09 PM, Nobuhiro Iwamatsu wrote:
> 2012/1/17 Rob Herring <robherring2@gmail.com>:
>> On 01/16/2012 07:54 PM, Nobuhiro Iwamatsu wrote:
>>> Hi,
>>>
>>> 2012/1/14 Rob Herring <robherring2@gmail.com>:
>>>> From: Rob Herring <rob.herring@calxeda.com>
>>>>
>>>> SH intc has a compile time dependency on NR_IRQS. Make this dependency a
>>>> local define so that shmobile (and ARM in general) can have run-time
>>>> NR_IRQS setting. SH has NR_IRQS set to 512 and shmobile has NR_IRQS set to
>>>> 1024, so we are using the maximum.
>>>>
>>>> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
>>>> ---
>>>> drivers/sh/intc/balancing.c | 2 +-
>>>> drivers/sh/intc/core.c | 2 +-
>>>> drivers/sh/intc/handle.c | 2 +-
>>>> drivers/sh/intc/internals.h | 9 +++++++++
>>>> drivers/sh/intc/virq.c | 2 +-
>>>> 5 files changed, 13 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/sh/intc/balancing.c b/drivers/sh/intc/balancing.c
>>>> index cec7a96..bc78080 100644
>>>> --- a/drivers/sh/intc/balancing.c
>>>> +++ b/drivers/sh/intc/balancing.c
>>>> @@ -9,7 +9,7 @@
>>>> */
>>>> #include "internals.h"
>>>>
>>>> -static unsigned long dist_handle[NR_IRQS];
>>>> +static unsigned long dist_handle[INTC_NR_IRQS];
>>>>
>>>> void intc_balancing_enable(unsigned int irq)
>>>> {
>>>> diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
>>>> index e53e449..2fde897 100644
>>>> --- a/drivers/sh/intc/core.c
>>>> +++ b/drivers/sh/intc/core.c
>>>> @@ -42,7 +42,7 @@ unsigned int nr_intc_controllers;
>>>> * - this needs to be at least 2 for 5-bit priorities on 7780
>>>> */
>>>> static unsigned int default_prio_level = 2; /* 2 - 16 */
>>>> -static unsigned int intc_prio_level[NR_IRQS]; /* for now */
>>>> +static unsigned int intc_prio_level[INTC_NR_IRQS]; /* for now */
>>>>
>>>> unsigned int intc_get_dfl_prio_level(void)
>>>> {
>>>> diff --git a/drivers/sh/intc/handle.c b/drivers/sh/intc/handle.c
>>>> index 057ce56..f461d53 100644
>>>> --- a/drivers/sh/intc/handle.c
>>>> +++ b/drivers/sh/intc/handle.c
>>>> @@ -13,7 +13,7 @@
>>>> #include <linux/spinlock.h>
>>>> #include "internals.h"
>>>>
>>>> -static unsigned long ack_handle[NR_IRQS];
>>>> +static unsigned long ack_handle[INTC_NR_IRQS];
>>>>
>>>> static intc_enum __init intc_grp_id(struct intc_desc *desc,
>>>> intc_enum enum_id)
>>>> diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
>>>> index b0e9155..469f092 100644
>>>> --- a/drivers/sh/intc/internals.h
>>>> +++ b/drivers/sh/intc/internals.h
>>>> @@ -6,6 +6,15 @@
>>>> #include <linux/radix-tree.h>
>>>> #include <linux/device.h>
>>>>
>>>> +#define INTC_NR_IRQS 1024
>>>
>>> On SH, INTC_NR_IRQS ( NR_IRQS ) is using to by arch/sh/kernel/machvec.c.
>>> And, this is defined by arch/sh/include/asm/irq.h.
>>> You need to remove or rename from these.
>>>
>>
>> machvec.c will still pickup NR_IRQS from arch/sh/include/asm/irq.h, so
>> there is no change there. The value here is increased from 512 for SH to
>> 1024, but that should not have any functional impact only array storage
>> space. Where it is used is a bit of a hack as the comment indicates. The
>> only other easy way to fix it I see is with an #ifdef CONFIG_SH or
>> CONFIG_ARM here. I welcome patches if you've got better ideas.
>>
>
> I also cared about the problem from which array increases in SH.
> Since drivers/sh/intc/internals.h is referred to only from intc function,
> it needs to define INTC_NR_IRQS as other places.
>
> How is it that defines by Kconfig?
> I created a patch on your patch. Could you give comment?
>
> Best regards,
> Nobuhiro
>
> ------
> diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
> index 45d08b6..9278bb0 100644
> --- a/arch/sh/include/asm/irq.h
> +++ b/arch/sh/include/asm/irq.h
> @@ -9,7 +9,6 @@
> * advised to cap this at the hard limit that they're interested in
> * through the machvec.
> */
> -#define NR_IRQS 512
> #define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
>
> /*
> diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
> index 3d722e4..e6b12b4 100644
> --- a/arch/sh/kernel/machvec.c
> +++ b/arch/sh/kernel/machvec.c
> @@ -123,5 +123,5 @@ void __init sh_mv_setup(void)
> mv_set(mem_init);
>
> if (!sh_mv.mv_nr_irqs)
> - sh_mv.mv_nr_irqs = NR_IRQS;
> + sh_mv.mv_nr_irqs = CONFIG_SH_NR_IRQS;
> }
> diff --git a/drivers/sh/intc/Kconfig b/drivers/sh/intc/Kconfig
> index c88cbcc..38d51f1 100644
> --- a/drivers/sh/intc/Kconfig
> +++ b/drivers/sh/intc/Kconfig
> @@ -33,3 +33,9 @@ config INTC_MAPPING_DEBUG
> between system IRQs and the per-controller id tables.
>
> If in doubt, say N.
> +
> +config SH_NR_IRQS
> + int
> + depends on ARCH_SHMOBILE || SUPERH
> + default 1024 if ARCH_SHMOBILE
> + default 512 if SUPERH
> diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
> index 469f092..076c286 100644
> --- a/drivers/sh/intc/internals.h
> +++ b/drivers/sh/intc/internals.h
> @@ -6,7 +6,7 @@
> #include <linux/radix-tree.h>
> #include <linux/device.h>
>
> -#define INTC_NR_IRQS 1024
> +#define INTC_NR_IRQS CONFIG_SH_NR_IRQS
>
> #ifndef evt2irq
> #define evt2irq(evt) (((evt) >> 5) - 16)
>
If we went this route I wonder if it would be better for this to be more
generic and have CONFIG_NR_IRQS like powerpc. However, I don't see
having CONFIG_NR_IRQS as being that useful in the SPARSE_IRQ case. Plus
it would be a much more invasive. I think I'll just add this to
linux/sh_intc.h:
#ifdef CONFIG_SUPERH
#define INTC_NR_IRQS 512
#else
#define INTC_NR_IRQS 1024
#endif
Rob
^ permalink raw reply
* Re: [PATCH 0/2] mmc: sh_mmcif: simplify platform DMA configuration
From: Guennadi Liakhovetski @ 2012-01-17 16:39 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <Pine.LNX.4.64.1108301819150.19151@axis700.grange>
Hi Paul
On Mon, 5 Sep 2011, Paul Mundt wrote:
> On Tue, Aug 30, 2011 at 06:26:34PM +0200, Guennadi Liakhovetski wrote:
> > A simple cosmetic clean-up, no functional changes. Patch 2/2 depends on
> > patch 1/2 and can wait until 3.3. Paul, would you be able to put it under
> > the carpet somewhere until then or shall I resend it after 3.2-rc1 is out?
> > After both these patches have been applied, we can remove struct
> > sh_mmcif_plat_data::dma around 3.4 or 4.0 or whatever;-)
> >
> It's not a problem, I'll just flag it as awaiting upstream in the
> tracker. Anything flagged as such I generally give a once over after each
> merge window to see if their dependencies have been worked out.
You certainly haven't forgotten about this patch;-), in which case it's
just me, unable to find it in your git branches. Could you give me a hint
where it can be?
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* Re: [PATCH 0/2] mmc: sh_mmcif: simplify platform DMA configuration
From: Paul Mundt @ 2012-01-18 0:21 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <Pine.LNX.4.64.1108301819150.19151@axis700.grange>
On Tue, Jan 17, 2012 at 05:39:55PM +0100, Guennadi Liakhovetski wrote:
> Hi Paul
>
> On Mon, 5 Sep 2011, Paul Mundt wrote:
>
> > On Tue, Aug 30, 2011 at 06:26:34PM +0200, Guennadi Liakhovetski wrote:
> > > A simple cosmetic clean-up, no functional changes. Patch 2/2 depends on
> > > patch 1/2 and can wait until 3.3. Paul, would you be able to put it under
> > > the carpet somewhere until then or shall I resend it after 3.2-rc1 is out?
> > > After both these patches have been applied, we can remove struct
> > > sh_mmcif_plat_data::dma around 3.4 or 4.0 or whatever;-)
> > >
> > It's not a problem, I'll just flag it as awaiting upstream in the
> > tracker. Anything flagged as such I generally give a once over after each
> > merge window to see if their dependencies have been worked out.
>
> You certainly haven't forgotten about this patch;-), in which case it's
> just me, unable to find it in your git branches. Could you give me a hint
> where it can be?
>
Er, no, of course not ;-)
It's out there now..
^ permalink raw reply
* Re: [PATCH] ARM: mach-shmobile: sh73a0 PINT IRQ base fix
From: Paul Mundt @ 2012-01-18 0:22 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <20120117110540.5414.77262.sendpatchset@w520>
On Tue, Jan 17, 2012 at 08:05:40PM +0900, Magnus Damm wrote:
> Bump up the sh73a0 PINT IRQ base from 768 to 800 to avoid
> collision with INTCS vectors for IRQ16->IRQ32 at 0x3xxx.
>
> Without this fix the sh73a0 IRQ pin handling code collides
> with the PINT code which results in hangs on Kota2 during boot.
On Tue, Jan 17, 2012 at 08:10:49PM +0900, Magnus Damm wrote:
> Fix the sh73a0 external IRQ pin code to properly support
> CONFIG_SPARSE_IRQ=y by allocating IRQ descriptors for the
> cascaded IRQs associated with external IRQ pins.
>
> Without this fix it is impossible to request IRQ0->IRQ31
> on the Kota2 board when sparse IRQs are enabled.
On Tue, Jan 17, 2012 at 08:14:07PM +0900, Magnus Damm wrote:
> Now when GPIO IRQs are supported on sh73a0 modify the Kota2
> board code to switch from the polled "gpio-keys-polled" driver
> to the IRQ driven "gpio-keys" driver.
All applied, thanks.
^ permalink raw reply
* [PATCH 1/2] dma: sh_dma: not all SH DMAC implementations support MEMCPY
From: Guennadi Liakhovetski @ 2012-01-18 9:14 UTC (permalink / raw)
To: linux-kernel; +Cc: Vinod Koul, linux-sh
Add a flag to allow platforms to specify, whether a DMAC instance supports
the MEMCPY operation. To avoid regressions, preserve the current default.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
drivers/dma/shdma.c | 3 ++-
include/linux/sh_dma.h | 1 +
2 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index cabcfe8..e4ed4da 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -1267,7 +1267,8 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
INIT_LIST_HEAD(&shdev->common.channels);
- dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask);
+ if (!pdata->slave_only)
+ dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask);
if (pdata->slave && pdata->slave_num)
dma_cap_set(DMA_SLAVE, shdev->common.cap_mask);
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index e11e171..db637b9 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -70,6 +70,7 @@ struct sh_dmae_pdata {
unsigned int needs_tend_set:1;
unsigned int no_dmars:1;
unsigned int chclr_present:1;
+ unsigned int slave_only:1;
};
/* DMA register */
--
1.7.2.5
^ permalink raw reply related
* [PATCH 2/2] ARM: mach-shmobile: both USB DMAC instances on sh7372 are slave-only
From: Guennadi Liakhovetski @ 2012-01-18 9:14 UTC (permalink / raw)
To: linux-kernel; +Cc: Vinod Koul, linux-sh
In-Reply-To: <Pine.LNX.4.64.1201181012130.28782@axis700.grange>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
arch/arm/mach-shmobile/setup-sh7372.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 45a3418..9aa22395 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -662,6 +662,7 @@ static struct sh_dmae_pdata usb_dma0_platform_data = {
.dmaor_is_32bit = 1,
.needs_tend_set = 1,
.no_dmars = 1,
+ .slave_only = 1,
};
static struct resource sh7372_usb_dmae0_resources[] = {
@@ -723,6 +724,7 @@ static struct sh_dmae_pdata usb_dma1_platform_data = {
.dmaor_is_32bit = 1,
.needs_tend_set = 1,
.no_dmars = 1,
+ .slave_only = 1,
};
static struct resource sh7372_usb_dmae1_resources[] = {
--
1.7.2.5
^ permalink raw reply related
* [PATCH] sh: sh7757lcr: update to the new MMCIF DMA configuration
From: Guennadi Liakhovetski @ 2012-01-18 9:24 UTC (permalink / raw)
To: linux-sh
Specifying MMCIF DMA slave IDs via a struct sh_mmcif_dma instance is
deprecated. Update sh7757lcr to specify slave IDs embedded in
struct sh_mmcif_plat_data.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
Would be good to get this upstream asap, then we could remove struct
sh_mmcif_dma for 3.4, which is also a part of the following patch series.
arch/sh/boards/board-sh7757lcr.c | 12 ++----------
1 files changed, 2 insertions(+), 10 deletions(-)
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 895e337..d9deb15 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -209,20 +209,12 @@ static struct resource sh_mmcif_resources[] = {
},
};
-static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
- .chan_priv_tx = {
- .slave_id = SHDMA_SLAVE_MMCIF_TX,
- },
- .chan_priv_rx = {
- .slave_id = SHDMA_SLAVE_MMCIF_RX,
- }
-};
-
static struct sh_mmcif_plat_data sh_mmcif_plat = {
- .dma = &sh7757lcr_mmcif_dma,
.sup_pclk = 0x0f,
.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
.ocr = MMC_VDD_32_33 | MMC_VDD_33_34,
+ .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
+ .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
};
static struct platform_device sh_mmcif_device = {
--
1.7.2.5
^ permalink raw reply related
* [PATCH][RFC] sh: clock-sh7724: fixup sh_fsi clock settings
From: Kuninori Morimoto @ 2012-01-18 9:44 UTC (permalink / raw)
To: linux-sh
sh_fsi needs HWBLK_SPU clock on sh7724
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index b3c039a..70bd966 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -343,7 +343,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[HWBLK_CEU1]),
CLKDEV_CON_ID("beu1", &mstp_clks[HWBLK_BEU1]),
CLKDEV_CON_ID("2ddmac0", &mstp_clks[HWBLK_2DDMAC]),
- CLKDEV_CON_ID("spu0", &mstp_clks[HWBLK_SPU]),
+ CLKDEV_DEV_ID("sh_fsi.0", &mstp_clks[HWBLK_SPU]),
CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]),
CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]),
CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU0]),
--
1.7.5.4
^ permalink raw reply related
* [PATCH 0/7] extract a simple dmaengine library from shdma.c
From: Guennadi Liakhovetski @ 2012-01-18 10:22 UTC (permalink / raw)
To: linux-kernel
Cc: alsa-devel, linux-sh, Vinod Koul, Magnus Damm, Shimoda, Yoshihiro,
linux-mmc, linux-serial
This patch series has been triggered by a recent series by Shimoda-san
http://www.spinics.net/lists/linux-sh/index.html#09895
In a follow up to that thread it has been decided to extract a common
library from the current shdma driver to be re-used by other dmaengine
drivers. Primarily this library provides a flexible transfer descriptor
management for hardware, that does not dupport scatter-gather lists
natively. In such cases this library can be used to split transfer
requests into smaller chunks, up to the size, supported by the specific
hardware, enter them onto a linked list, thack their completion and call
user callbacks. This is a first shot, aimed to be used by the SUDMAC
driver. Once it is confirmed, that this version can be conveniently used
with it, I'll do some cosmetic clean up, notably, add / improve
documentation:-)
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* [PATCH 1/7] dma: add a simple dma library
From: Guennadi Liakhovetski @ 2012-01-18 10:22 UTC (permalink / raw)
To: linux-kernel; +Cc: linux-sh, Vinod Koul, Magnus Damm, Shimoda, Yoshihiro
In-Reply-To: <Pine.LNX.4.64.1201181025280.28782@axis700.grange>
This patch adds a library of functions, helping to implement dmaengine
drivers for hardware, unable to handle scatter-gather lists natively.
The first version of this driver only supports memcpy and slave DMA
operation.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
drivers/dma/Kconfig | 3 +
drivers/dma/Makefile | 1 +
drivers/dma/dma-simple.c | 841 ++++++++++++++++++++++++++++++++++++++++++++
include/linux/dma-simple.h | 114 ++++++
4 files changed, 959 insertions(+), 0 deletions(-)
create mode 100644 drivers/dma/dma-simple.c
create mode 100644 include/linux/dma-simple.h
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ab8f469..79093d9 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -149,6 +149,9 @@ config TXX9_DMAC
Support the TXx9 SoC internal DMA controller. This can be
integrated in chips such as the Toshiba TX4927/38/39.
+config DMA_SIMPLE
+ tristate
+
config SH_DMAE
tristate "Renesas SuperH DMAC support"
depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 30cf3b1..9968a6e 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -2,6 +2,7 @@ ccflags-$(CONFIG_DMADEVICES_DEBUG) := -DDEBUG
ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG
obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
+obj-$(CONFIG_DMA_SIMPLE) += dma-simple.o
obj-$(CONFIG_NET_DMA) += iovlock.o
obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o
obj-$(CONFIG_DMATEST) += dmatest.o
diff --git a/drivers/dma/dma-simple.c b/drivers/dma/dma-simple.c
new file mode 100644
index 0000000..92d65db
--- /dev/null
+++ b/drivers/dma/dma-simple.c
@@ -0,0 +1,841 @@
+/*
+ * Simple dmaengine driver library
+ *
+ * extracted from shdma.c
+ *
+ * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/dma-mapping.h>
+#include <linux/dma-simple.h>
+#include <linux/dmaengine.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+/* DMA descriptor control */
+enum simple_desc_status {
+ DESC_IDLE,
+ DESC_PREPARED,
+ DESC_SUBMITTED,
+ DESC_COMPLETED, /* completed, have to call callback */
+ DESC_WAITING, /* callback called, waiting for ack / re-submit */
+};
+
+#define NR_DESCS_PER_CHANNEL 32
+
+#define to_simple_chan(c) container_of(c, struct dma_simple_chan, dma_chan)
+#define to_simple_dev(d) container_of(d, struct dma_simple_dev, dma_dev)
+
+/*
+ * For slave DMA we assume, that there is a finate number of DMA slaves in the
+ * system, and that each such slave can only use a finate number of channels.
+ * We use slave channel IDs to make sure, that no such slave channel ID is
+ * allocated more than once.
+ */
+static unsigned int slave_num = 256;
+module_param(slave_num, uint, 0444);
+
+/* A bitmask with slave_num bits */
+static unsigned long *simple_slave_used;
+
+/* Called under spin_lock_irq(&schan->chan_lock") */
+static void simple_chan_xfer_ld_queue(struct dma_simple_chan *schan)
+{
+ struct dma_simple_dev *sdev = to_simple_dev(schan->dma_chan.device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ struct dma_simple_desc *sdesc;
+
+ /* DMA work check */
+ if (ops->channel_busy(schan))
+ return;
+
+ /* Find the first not transferred descriptor */
+ list_for_each_entry(sdesc, &schan->ld_queue, node)
+ if (sdesc->mark = DESC_SUBMITTED) {
+ ops->start_xfer(schan, sdesc);
+ break;
+ }
+}
+
+static dma_cookie_t simple_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+ struct dma_simple_desc *chunk, *c, *desc + container_of(tx, struct dma_simple_desc, async_tx),
+ *last = desc;
+ struct dma_simple_chan *schan = to_simple_chan(tx->chan);
+ struct dma_simple_slave *slave = tx->chan->private;
+ dma_async_tx_callback callback = tx->callback;
+ dma_cookie_t cookie;
+ bool power_up;
+
+ spin_lock_irq(&schan->chan_lock);
+
+ if (list_empty(&schan->ld_queue))
+ power_up = true;
+ else
+ power_up = false;
+
+ cookie = schan->dma_chan.cookie + 1;
+ if (cookie < 0)
+ cookie = 1;
+
+ schan->dma_chan.cookie = cookie;
+ tx->cookie = cookie;
+
+ /* Mark all chunks of this descriptor as submitted, move to the queue */
+ list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
+ /*
+ * All chunks are on the global ld_free, so, we have to find
+ * the end of the chain ourselves
+ */
+ if (chunk != desc && (chunk->mark = DESC_IDLE ||
+ chunk->async_tx.cookie > 0 ||
+ chunk->async_tx.cookie = -EBUSY ||
+ &chunk->node = &schan->ld_free))
+ break;
+ chunk->mark = DESC_SUBMITTED;
+ /* Callback goes to the last chunk */
+ chunk->async_tx.callback = NULL;
+ chunk->cookie = cookie;
+ list_move_tail(&chunk->node, &schan->ld_queue);
+ last = chunk;
+
+ dev_dbg(schan->dev, "submit #%d@%p on %d\n",
+ tx->cookie, &last->async_tx, schan->id);
+ }
+
+ last->async_tx.callback = callback;
+ last->async_tx.callback_param = tx->callback_param;
+
+ if (power_up) {
+ int ret;
+ schan->pm_state = DMA_SIMPLE_PM_BUSY;
+
+ ret = pm_runtime_get(schan->dev);
+
+ spin_unlock_irq(&schan->chan_lock);
+ if (ret < 0)
+ dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
+
+ pm_runtime_barrier(schan->dev);
+
+ spin_lock_irq(&schan->chan_lock);
+
+ /* Have we been reset, while waiting? */
+ if (schan->pm_state != DMA_SIMPLE_PM_ESTABLISHED) {
+ struct dma_simple_dev *sdev + to_simple_dev(schan->dma_chan.device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ dev_dbg(schan->dev, "Bring up channel %d\n",
+ schan->id);
+ /*
+ * TODO: .xfer_setup() might fail on some platforms.
+ * Make it int then, on error remove chunks from the
+ * queue again
+ */
+ ops->setup_xfer(schan, slave);
+
+ if (schan->pm_state = DMA_SIMPLE_PM_PENDING)
+ simple_chan_xfer_ld_queue(schan);
+ schan->pm_state = DMA_SIMPLE_PM_ESTABLISHED;
+ }
+ } else {
+ schan->pm_state = DMA_SIMPLE_PM_PENDING;
+ }
+
+ spin_unlock_irq(&schan->chan_lock);
+
+ return cookie;
+}
+
+/* Called with desc_lock held */
+static struct dma_simple_desc *simple_get_desc(struct dma_simple_chan *schan)
+{
+ struct dma_simple_desc *sdesc;
+
+ list_for_each_entry(sdesc, &schan->ld_free, node)
+ if (sdesc->mark != DESC_PREPARED) {
+ BUG_ON(sdesc->mark != DESC_IDLE);
+ list_del(&sdesc->node);
+ return sdesc;
+ }
+
+ return NULL;
+}
+
+static int simple_alloc_chan_resources(struct dma_chan *chan)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+ struct dma_simple_dev *sdev = to_simple_dev(schan->dma_chan.device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ struct dma_simple_desc *desc;
+ struct dma_simple_slave *slave = chan->private;
+ int ret, i;
+
+ /*
+ * This relies on the guarantee from dmaengine that alloc_chan_resources
+ * never runs concurrently with itself or free_chan_resources.
+ */
+ if (slave) {
+ if (test_and_set_bit(slave->slave_id, simple_slave_used)) {
+ ret = -EBUSY;
+ goto etestused;
+ }
+
+ ret = ops->set_slave(schan, slave);
+ if (ret < 0)
+ goto esetslave;
+ }
+
+ schan->desc = kcalloc(NR_DESCS_PER_CHANNEL,
+ sdev->desc_size, GFP_KERNEL);
+ if (!schan->desc) {
+ ret = -ENOMEM;
+ goto edescalloc;
+ }
+ schan->desc_num = NR_DESCS_PER_CHANNEL;
+
+ for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) {
+ desc = ops->embedded_desc(schan->desc, i);
+ dma_async_tx_descriptor_init(&desc->async_tx,
+ &schan->dma_chan);
+ desc->async_tx.tx_submit = simple_tx_submit;
+ desc->mark = DESC_IDLE;
+
+ list_add(&desc->node, &schan->ld_free);
+ }
+
+ return NR_DESCS_PER_CHANNEL;
+
+edescalloc:
+ if (slave)
+esetslave:
+ clear_bit(slave->slave_id, simple_slave_used);
+etestused:
+ chan->private = NULL;
+ return ret;
+}
+
+static dma_async_tx_callback __ld_cleanup(struct dma_simple_chan *schan, bool all)
+{
+ struct dma_simple_desc *desc, *_desc;
+ /* Is the "exposed" head of a chain acked? */
+ bool head_acked = false;
+ dma_cookie_t cookie = 0;
+ dma_async_tx_callback callback = NULL;
+ void *param = NULL;
+ unsigned long flags;
+
+ spin_lock_irqsave(&schan->chan_lock, flags);
+ list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
+ struct dma_async_tx_descriptor *tx = &desc->async_tx;
+
+ BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
+ BUG_ON(desc->mark != DESC_SUBMITTED &&
+ desc->mark != DESC_COMPLETED &&
+ desc->mark != DESC_WAITING);
+
+ /*
+ * queue is ordered, and we use this loop to (1) clean up all
+ * completed descriptors, and to (2) update descriptor flags of
+ * any chunks in a (partially) completed chain
+ */
+ if (!all && desc->mark = DESC_SUBMITTED &&
+ desc->cookie != cookie)
+ break;
+
+ if (tx->cookie > 0)
+ cookie = tx->cookie;
+
+ if (desc->mark = DESC_COMPLETED && desc->chunks = 1) {
+ if (schan->completed_cookie != desc->cookie - 1)
+ dev_dbg(schan->dev,
+ "Completing cookie %d, expected %d\n",
+ desc->cookie,
+ schan->completed_cookie + 1);
+ schan->completed_cookie = desc->cookie;
+ }
+
+ /* Call callback on the last chunk */
+ if (desc->mark = DESC_COMPLETED && tx->callback) {
+ desc->mark = DESC_WAITING;
+ callback = tx->callback;
+ param = tx->callback_param;
+ dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n",
+ tx->cookie, tx, schan->id);
+ BUG_ON(desc->chunks != 1);
+ break;
+ }
+
+ if (tx->cookie > 0 || tx->cookie = -EBUSY) {
+ if (desc->mark = DESC_COMPLETED) {
+ BUG_ON(tx->cookie < 0);
+ desc->mark = DESC_WAITING;
+ }
+ head_acked = async_tx_test_ack(tx);
+ } else {
+ switch (desc->mark) {
+ case DESC_COMPLETED:
+ desc->mark = DESC_WAITING;
+ /* Fall through */
+ case DESC_WAITING:
+ if (head_acked)
+ async_tx_ack(&desc->async_tx);
+ }
+ }
+
+ dev_dbg(schan->dev, "descriptor %p #%d completed.\n",
+ tx, tx->cookie);
+
+ if (((desc->mark = DESC_COMPLETED ||
+ desc->mark = DESC_WAITING) &&
+ async_tx_test_ack(&desc->async_tx)) || all) {
+ /* Remove from ld_queue list */
+ desc->mark = DESC_IDLE;
+
+ list_move(&desc->node, &schan->ld_free);
+
+ if (list_empty(&schan->ld_queue)) {
+ dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
+ pm_runtime_put(schan->dev);
+ }
+ }
+ }
+
+ if (all && !callback)
+ /*
+ * Terminating and the loop completed normally: forgive
+ * uncompleted cookies
+ */
+ schan->completed_cookie = schan->dma_chan.cookie;
+
+ spin_unlock_irqrestore(&schan->chan_lock, flags);
+
+ if (callback)
+ callback(param);
+
+ return callback;
+}
+
+/*
+ * simple_chan_ld_cleanup - Clean up link descriptors
+ *
+ * Clean up the ld_queue of DMA channel.
+ */
+static void simple_chan_ld_cleanup(struct dma_simple_chan *schan, bool all)
+{
+ while (__ld_cleanup(schan, all))
+ ;
+}
+
+/*
+ * simple_free_chan_resources - Free all resources of the channel.
+ */
+static void simple_free_chan_resources(struct dma_chan *chan)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+ struct dma_simple_dev *sdev = to_simple_dev(chan->device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ LIST_HEAD(list);
+
+ /* Protect against ISR */
+ spin_lock_irq(&schan->chan_lock);
+ ops->halt_channel(schan);
+ spin_unlock_irq(&schan->chan_lock);
+
+ /* Now no new interrupts will occur */
+
+ /* Prepared and not submitted descriptors can still be on the queue */
+ if (!list_empty(&schan->ld_queue))
+ simple_chan_ld_cleanup(schan, true);
+
+ if (chan->private) {
+ /* The caller is holding dma_list_mutex */
+ struct dma_simple_slave *slave = chan->private;
+ clear_bit(slave->slave_id, simple_slave_used);
+ chan->private = NULL;
+ }
+
+ spin_lock_irq(&schan->chan_lock);
+
+ list_splice_init(&schan->ld_free, &list);
+ schan->desc_num = 0;
+
+ spin_unlock_irq(&schan->chan_lock);
+
+ kfree(schan->desc);
+}
+
+/**
+ * simple_add_desc - get, set up and return one transfer descriptor
+ * @schan: DMA channel
+ * @flags: DMA transfer flags
+ * @dst: destination DMA address, incremented when direction equals
+ * DMA_FROM_DEVICE or DMA_BIDIRECTIONAL
+ * @src: source DMA address, incremented when direction equals
+ * DMA_TO_DEVICE or DMA_BIDIRECTIONAL
+ * @len: DMA transfer length
+ * @first: if NULL, set to the current descriptor and cookie set to -EBUSY
+ * @direction: needed for slave DMA to decide which address to keep constant,
+ * equals DMA_BIDIRECTIONAL for MEMCPY
+ * Returns 0 or an error
+ * Locks: called with desc_lock held
+ */
+static struct dma_simple_desc *simple_add_desc(struct dma_simple_chan *schan,
+ unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len,
+ struct dma_simple_desc **first, enum dma_data_direction direction)
+{
+ struct dma_simple_dev *sdev = to_simple_dev(schan->dma_chan.device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ struct dma_simple_desc *new;
+ size_t copy_size = *len;
+
+ if (!copy_size)
+ return NULL;
+
+ /* Allocate the link descriptor from the free list */
+ new = simple_get_desc(schan);
+ if (!new) {
+ dev_err(schan->dev, "No free link descriptor available\n");
+ return NULL;
+ }
+
+ ops->desc_setup(schan, new, *src, *dst, ©_size);
+
+ if (!*first) {
+ /* First desc */
+ new->async_tx.cookie = -EBUSY;
+ *first = new;
+ } else {
+ /* Other desc - invisible to the user */
+ new->async_tx.cookie = -EINVAL;
+ }
+
+ dev_dbg(schan->dev,
+ "chaining (%u/%u)@%x -> %x with %p, cookie %d\n",
+ copy_size, *len, *src, *dst, &new->async_tx,
+ new->async_tx.cookie);
+
+ new->mark = DESC_PREPARED;
+ new->async_tx.flags = flags;
+ new->direction = direction;
+
+ *len -= copy_size;
+ if (direction = DMA_BIDIRECTIONAL || direction = DMA_TO_DEVICE)
+ *src += copy_size;
+ if (direction = DMA_BIDIRECTIONAL || direction = DMA_FROM_DEVICE)
+ *dst += copy_size;
+
+ return new;
+}
+
+/*
+ * simple_prep_sg - prepare transfer descriptors from an SG list
+ *
+ * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
+ * converted to scatter-gather to guarantee consistent locking and a correct
+ * list manipulation. For slave DMA direction carries the usual meaning, and,
+ * logically, the SG list is RAM and the addr variable contains slave address,
+ * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_BIDIRECTIONAL
+ * and the SG list contains only one element and points at the source buffer.
+ */
+static struct dma_async_tx_descriptor *simple_prep_sg(struct dma_simple_chan *schan,
+ struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
+ enum dma_data_direction direction, unsigned long flags)
+{
+ struct scatterlist *sg;
+ struct dma_simple_desc *first = NULL, *new = NULL /* compiler... */;
+ LIST_HEAD(tx_list);
+ int chunks = 0;
+ unsigned long irq_flags;
+ int i;
+
+ for_each_sg(sgl, sg, sg_len, i)
+ chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len);
+
+ /* Have to lock the whole loop to protect against concurrent release */
+ spin_lock_irqsave(&schan->chan_lock, irq_flags);
+
+ /*
+ * Chaining:
+ * first descriptor is what user is dealing with in all API calls, its
+ * cookie is at first set to -EBUSY, at tx-submit to a positive
+ * number
+ * if more than one chunk is needed further chunks have cookie = -EINVAL
+ * the last chunk, if not equal to the first, has cookie = -ENOSPC
+ * all chunks are linked onto the tx_list head with their .node heads
+ * only during this function, then they are immediately spliced
+ * back onto the free list in form of a chain
+ */
+ for_each_sg(sgl, sg, sg_len, i) {
+ dma_addr_t sg_addr = sg_dma_address(sg);
+ size_t len = sg_dma_len(sg);
+
+ if (!len)
+ goto err_get_desc;
+
+ do {
+ dev_dbg(schan->dev, "Add SG #%d@%p[%d], dma %llx\n",
+ i, sg, len, (unsigned long long)sg_addr);
+
+ if (direction = DMA_FROM_DEVICE)
+ new = simple_add_desc(schan, flags,
+ &sg_addr, addr, &len, &first,
+ direction);
+ else
+ new = simple_add_desc(schan, flags,
+ addr, &sg_addr, &len, &first,
+ direction);
+ if (!new)
+ goto err_get_desc;
+
+ new->chunks = chunks--;
+ list_add_tail(&new->node, &tx_list);
+ } while (len);
+ }
+
+ if (new != first)
+ new->async_tx.cookie = -ENOSPC;
+
+ /* Put them back on the free list, so, they don't get lost */
+ list_splice_tail(&tx_list, &schan->ld_free);
+
+ spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
+
+ return &first->async_tx;
+
+err_get_desc:
+ list_for_each_entry(new, &tx_list, node)
+ new->mark = DESC_IDLE;
+ list_splice(&tx_list, &schan->ld_free);
+
+ spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
+
+ return NULL;
+}
+
+static struct dma_async_tx_descriptor *simple_prep_memcpy(
+ struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
+ size_t len, unsigned long flags)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+ struct scatterlist sg;
+
+ if (!chan || !len)
+ return NULL;
+
+ BUG_ON(!schan->desc_num);
+
+ sg_init_table(&sg, 1);
+ sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
+ offset_in_page(dma_src));
+ sg_dma_address(&sg) = dma_src;
+ sg_dma_len(&sg) = len;
+
+ return simple_prep_sg(schan, &sg, 1, &dma_dest,
+ DMA_BIDIRECTIONAL, flags);
+}
+
+static struct dma_async_tx_descriptor *simple_prep_slave_sg(
+ struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
+ enum dma_data_direction direction, unsigned long flags)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+ struct dma_simple_dev *sdev = to_simple_dev(schan->dma_chan.device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ struct dma_simple_slave *slave = chan->private;
+ dma_addr_t slave_addr;
+
+ if (!chan)
+ return NULL;
+
+ BUG_ON(!schan->desc_num);
+
+ /* Someone calling slave DMA on a generic channel? */
+ if (!slave || !sg_len) {
+ dev_warn(schan->dev, "%s: bad parameter: %p, %d, %d\n",
+ __func__, slave, sg_len, slave ? slave->slave_id : -1);
+ return NULL;
+ }
+
+ slave_addr = ops->slave_addr(schan);
+
+ return simple_prep_sg(schan, sgl, sg_len, &slave_addr,
+ direction, flags);
+}
+
+static int simple_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+ unsigned long arg)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+ struct dma_simple_dev *sdev = to_simple_dev(chan->device);
+ const struct dma_simple_ops *ops = sdev->ops;
+ unsigned long flags;
+
+ /* Only supports DMA_TERMINATE_ALL */
+ if (cmd != DMA_TERMINATE_ALL)
+ return -ENXIO;
+
+ if (!chan)
+ return -EINVAL;
+
+ spin_lock_irqsave(&schan->chan_lock, flags);
+
+ ops->halt_channel(schan);
+ ops->clear_channel(schan);
+
+ spin_unlock_irqrestore(&schan->chan_lock, flags);
+
+ simple_chan_ld_cleanup(schan, true);
+
+ return 0;
+}
+
+static void simple_memcpy_issue_pending(struct dma_chan *chan)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+
+ spin_lock_irq(&schan->chan_lock);
+ if (schan->pm_state = DMA_SIMPLE_PM_ESTABLISHED)
+ simple_chan_xfer_ld_queue(schan);
+ else
+ schan->pm_state = DMA_SIMPLE_PM_PENDING;
+ spin_unlock_irq(&schan->chan_lock);
+}
+
+static enum dma_status simple_tx_status(struct dma_chan *chan,
+ dma_cookie_t cookie,
+ struct dma_tx_state *txstate)
+{
+ struct dma_simple_chan *schan = to_simple_chan(chan);
+ dma_cookie_t last_used;
+ dma_cookie_t last_complete;
+ enum dma_status status;
+ unsigned long flags;
+
+ simple_chan_ld_cleanup(schan, false);
+
+ /* First read completed cookie to avoid a skew */
+ last_complete = schan->completed_cookie;
+ rmb();
+ last_used = chan->cookie;
+ BUG_ON(last_complete < 0);
+ dma_set_tx_state(txstate, last_complete, last_used, 0);
+
+ spin_lock_irqsave(&schan->chan_lock, flags);
+
+ status = dma_async_is_complete(cookie, last_complete, last_used);
+
+ /*
+ * If we don't find cookie on the queue, it has been aborted and we have
+ * to report error
+ */
+ if (status != DMA_SUCCESS) {
+ struct dma_simple_desc *sdesc;
+ status = DMA_ERROR;
+ list_for_each_entry(sdesc, &schan->ld_queue, node)
+ if (sdesc->cookie = cookie) {
+ status = DMA_IN_PROGRESS;
+ break;
+ }
+ }
+
+ spin_unlock_irqrestore(&schan->chan_lock, flags);
+
+ return status;
+}
+
+/* Called from error IRQ or NMI */
+bool dma_simple_reset(struct dma_simple_dev *sdev)
+{
+ const struct dma_simple_ops *ops = sdev->ops;
+ struct dma_simple_chan *schan;
+ unsigned int handled = 0;
+ int i;
+
+ /* Reset all channels */
+ dma_simple_for_each_chan(schan, sdev, i) {
+ struct dma_simple_desc *sdesc;
+ LIST_HEAD(dl);
+
+ if (!schan)
+ continue;
+
+ spin_lock(&schan->chan_lock);
+
+ /* Stop the channel */
+ ops->halt_channel(schan);
+
+ list_splice_init(&schan->ld_queue, &dl);
+
+ if (!list_empty(&dl)) {
+ dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
+ pm_runtime_put(schan->dev);
+ }
+ schan->pm_state = DMA_SIMPLE_PM_ESTABLISHED;
+
+ spin_unlock(&schan->chan_lock);
+
+ /* Complete all */
+ list_for_each_entry(sdesc, &dl, node) {
+ struct dma_async_tx_descriptor *tx = &sdesc->async_tx;
+ sdesc->mark = DESC_IDLE;
+ if (tx->callback)
+ tx->callback(tx->callback_param);
+ }
+
+ spin_lock(&schan->chan_lock);
+ list_splice(&dl, &schan->ld_free);
+ spin_unlock(&schan->chan_lock);
+
+ handled++;
+ }
+
+ return !!handled;
+}
+EXPORT_SYMBOL(dma_simple_reset);
+
+static void simple_do_tasklet(unsigned long data)
+{
+ struct dma_simple_chan *schan = (struct dma_simple_chan *)data;
+ const struct dma_simple_ops *ops + to_simple_dev(schan->dma_chan.device)->ops;
+ struct dma_simple_desc *sdesc;
+
+ spin_lock_irq(&schan->chan_lock);
+ list_for_each_entry(sdesc, &schan->ld_queue, node) {
+ if (sdesc->mark = DESC_SUBMITTED &&
+ ops->desc_completed(schan, sdesc)) {
+ dev_dbg(schan->dev, "done #%d@%p\n",
+ sdesc->async_tx.cookie, &sdesc->async_tx);
+ sdesc->mark = DESC_COMPLETED;
+ break;
+ }
+ }
+ /* Next desc */
+ simple_chan_xfer_ld_queue(schan);
+ spin_unlock_irq(&schan->chan_lock);
+
+ simple_chan_ld_cleanup(schan, false);
+}
+
+void __devinit dma_simple_chan_probe(struct dma_simple_dev *sdev,
+ struct dma_simple_chan *schan, int id)
+{
+ schan->pm_state = DMA_SIMPLE_PM_ESTABLISHED;
+
+ /* reference struct dma_device */
+ schan->dma_chan.device = &sdev->dma_dev;
+
+ schan->dev = sdev->dma_dev.dev;
+ schan->id = id;
+
+ if (!schan->max_xfer_len)
+ schan->max_xfer_len = PAGE_SIZE;
+
+ /* Init DMA tasklet */
+ tasklet_init(&schan->tasklet, simple_do_tasklet, (unsigned long)schan);
+
+ spin_lock_init(&schan->chan_lock);
+
+ /* Init descripter manage list */
+ INIT_LIST_HEAD(&schan->ld_queue);
+ INIT_LIST_HEAD(&schan->ld_free);
+
+ /* Add the channel to DMA device channel list */
+ list_add_tail(&schan->dma_chan.device_node,
+ &sdev->dma_dev.channels);
+ sdev->schan[sdev->dma_dev.chancnt++] = schan;
+}
+EXPORT_SYMBOL(dma_simple_chan_probe);
+
+void dma_simple_chan_remove(struct dma_simple_chan *schan)
+{
+ list_del(&schan->dma_chan.device_node);
+}
+EXPORT_SYMBOL(dma_simple_chan_remove);
+
+int __devinit dma_simple_init(struct device *dev, struct dma_simple_dev *sdev,
+ int chan_num)
+{
+ struct dma_device *dma_dev = &sdev->dma_dev;
+
+ /*
+ * Require all call-backs for now, they can trivially be made optional
+ * later as required
+ */
+ if (!sdev->ops ||
+ !sdev->desc_size ||
+ !sdev->ops->embedded_desc ||
+ !sdev->ops->start_xfer ||
+ !sdev->ops->setup_xfer ||
+ !sdev->ops->set_slave ||
+ !sdev->ops->desc_setup ||
+ !sdev->ops->slave_addr ||
+ !sdev->ops->channel_busy ||
+ !sdev->ops->clear_channel ||
+ !sdev->ops->halt_channel ||
+ !sdev->ops->desc_completed)
+ return -EINVAL;
+
+ sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL);
+ if (!sdev->schan)
+ return -ENOMEM;
+
+ INIT_LIST_HEAD(&dma_dev->channels);
+
+ /* Common and MEMCPY operations */
+ dma_dev->device_alloc_chan_resources
+ = simple_alloc_chan_resources;
+ dma_dev->device_free_chan_resources = simple_free_chan_resources;
+ dma_dev->device_prep_dma_memcpy = simple_prep_memcpy;
+ dma_dev->device_tx_status = simple_tx_status;
+ dma_dev->device_issue_pending = simple_memcpy_issue_pending;
+
+ /* Compulsory for DMA_SLAVE fields */
+ dma_dev->device_prep_slave_sg = simple_prep_slave_sg;
+ dma_dev->device_control = simple_control;
+
+ dma_dev->dev = dev;
+
+ return 0;
+}
+EXPORT_SYMBOL(dma_simple_init);
+
+void __devexit dma_simple_cleanup(struct dma_simple_dev *sdev)
+{
+ kfree(sdev->schan);
+}
+EXPORT_SYMBOL(dma_simple_cleanup);
+
+static int __init dma_simple_enter(void)
+{
+ simple_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_BYTE),
+ GFP_KERNEL);
+ if (!simple_slave_used)
+ return -ENOMEM;
+ return 0;
+}
+module_init(dma_simple_enter);
+
+static void __exit dma_simple_exit(void)
+{
+ kfree(simple_slave_used);
+}
+module_exit(dma_simple_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Simple dmaengine driver library");
+MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
diff --git a/include/linux/dma-simple.h b/include/linux/dma-simple.h
new file mode 100644
index 0000000..6091200
--- /dev/null
+++ b/include/linux/dma-simple.h
@@ -0,0 +1,114 @@
+/*
+ * Simple dmaengine driver library
+ *
+ * extracted from shdma.c and headers
+ *
+ * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef DMA_SIMPLE_H
+#define DMA_SIMPLE_H
+
+#include <linux/dma-direction.h>
+#include <linux/dmaengine.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/types.h>
+
+enum dma_simple_pm_state {
+ DMA_SIMPLE_PM_ESTABLISHED,
+ DMA_SIMPLE_PM_BUSY,
+ DMA_SIMPLE_PM_PENDING,
+};
+
+struct device;
+
+/*
+ * Drivers, using this library are expected to embed struct dma_simple_dev,
+ * struct dma_simple_chan, struct dma_simple_desc, and struct dma_simple_slave
+ * in their respective device, channel, descriptor and slave objects.
+ */
+
+struct dma_simple_slave {
+ unsigned int slave_id;
+};
+
+struct dma_simple_desc {
+ struct list_head node;
+ struct dma_async_tx_descriptor async_tx;
+ enum dma_data_direction direction;
+ dma_cookie_t cookie;
+ int chunks;
+ int mark;
+};
+
+struct dma_simple_chan {
+ dma_cookie_t completed_cookie; /* The maximum cookie completed */
+ spinlock_t chan_lock; /* Channel operation lock */
+ struct list_head ld_queue; /* Link descriptors queue */
+ struct list_head ld_free; /* Free link descriptors */
+ struct dma_chan dma_chan; /* DMA channel */
+ struct device *dev; /* Channel device */
+ struct tasklet_struct tasklet; /* Complete / submit tasklet */
+ void *desc; /* buffer for descriptor array */
+ int desc_num; /* desc count */
+ size_t max_xfer_len; /* max transfer length */
+ int id; /* Raw id of this channel */
+ enum dma_simple_pm_state pm_state;
+};
+
+struct dma_simple_ops {
+ bool (*desc_completed)(struct dma_simple_chan *, struct dma_simple_desc *);
+ void (*halt_channel)(struct dma_simple_chan *);
+ void (*clear_channel)(struct dma_simple_chan *);
+ bool (*channel_busy)(struct dma_simple_chan *);
+ dma_addr_t (*slave_addr)(struct dma_simple_chan *);
+ int (*desc_setup)(struct dma_simple_chan *, struct dma_simple_desc *,
+ dma_addr_t, dma_addr_t, size_t *);
+ int (*set_slave)(struct dma_simple_chan *, struct dma_simple_slave *);
+ void (*setup_xfer)(struct dma_simple_chan *, struct dma_simple_slave *);
+ void (*start_xfer)(struct dma_simple_chan *, struct dma_simple_desc *);
+ struct dma_simple_desc *(*embedded_desc)(void *, int);
+};
+
+struct dma_simple_dev {
+ struct dma_device dma_dev;
+ struct dma_simple_chan **schan;
+ const struct dma_simple_ops *ops;
+ size_t desc_size;
+};
+
+#define dma_simple_for_each_chan(c, d, i) for (i = 0, c = (d)->schan[0]; \
+ i < (d)->dma_dev.chancnt; c = (d)->schan[++i])
+
+static inline void dma_simple_lock(struct dma_simple_chan *schan)
+{
+ spin_lock(&schan->chan_lock);
+}
+
+static inline void dma_simple_unlock(struct dma_simple_chan *schan)
+{
+ spin_unlock(&schan->chan_lock);
+}
+
+static inline void dma_simple_reload(struct dma_simple_chan *schan)
+{
+ tasklet_schedule(&schan->tasklet);
+}
+
+bool dma_simple_reset(struct dma_simple_dev *sdev);
+void dma_simple_chan_probe(struct dma_simple_dev *sdev,
+ struct dma_simple_chan *schan, int id) __devinit;
+void dma_simple_chan_remove(struct dma_simple_chan *schan);
+int dma_simple_init(struct device *dev, struct dma_simple_dev *sdev,
+ int chan_num) __devinit;
+void dma_simple_cleanup(struct dma_simple_dev *sdev) __devexit;
+
+#endif
--
1.7.2.5
^ permalink raw reply related
* [PATCH 2/7] dma: shdma: prepare for simple DMA conversion
From: Guennadi Liakhovetski @ 2012-01-18 10:22 UTC (permalink / raw)
To: linux-kernel; +Cc: linux-sh, Vinod Koul, Magnus Damm, Shimoda, Yoshihiro
In-Reply-To: <Pine.LNX.4.64.1201181025280.28782@axis700.grange>
By placing an anonymous union at the top of struct sh_dmae_slave we can
transparently prepare all drivers for the upcoming simple DMA conversion.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
include/linux/sh_dma.h | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index db637b9..1b14cf4 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -10,12 +10,16 @@
#ifndef SH_DMA_H
#define SH_DMA_H
-#include <linux/list.h>
+#include <linux/dma-simple.h>
#include <linux/dmaengine.h>
+#include <linux/list.h>
/* Used by slave DMA clients to request DMA to/from a specific peripheral */
struct sh_dmae_slave {
- unsigned int slave_id; /* Set by the platform */
+ union {
+ unsigned int slave_id; /* Set by the platform */
+ struct dma_simple_slave simple_slave;
+ };
struct device *dma_dev; /* Set by the platform */
const struct sh_dmae_slave_config *config; /* Set by the driver */
};
--
1.7.2.5
^ permalink raw reply related
* [PATCH 3/7] mmc: sh_mmcif: remove unneeded struct sh_mmcif_dma, prepare for simple DMA
From: Guennadi Liakhovetski @ 2012-01-18 10:22 UTC (permalink / raw)
To: linux-kernel
Cc: linux-sh, Vinod Koul, Magnus Damm, Shimoda, Yoshihiro, linux-mmc
In-Reply-To: <Pine.LNX.4.64.1201181025280.28782@axis700.grange>
Now that all users have been updated to use the embedded in struct
sh_mmcif_plat_data DMA slave IDs, struct sh_mmcif_dma is no longer needed
and can be removed. This also makes preparation for simple DMA conversion
easier.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
Notice, that this patch also requires the recent
http://article.gmane.org/gmane.linux.ports.sh.devel/13337
to be applied first to avoid breakage
drivers/mmc/host/sh_mmcif.c | 24 ++++++++++--------------
include/linux/mmc/sh_mmcif.h | 8 +-------
2 files changed, 11 insertions(+), 21 deletions(-)
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index c4bfbb0..497e6f4 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -383,31 +383,27 @@ static void sh_mmcif_request_dma(struct sh_mmcif_host *host,
host->dma_active = false;
/* We can only either use DMA for both Tx and Rx or not use it at all */
- if (pdata->dma) {
- dev_warn(&host->pd->dev,
- "Update your platform to use embedded DMA slave IDs\n");
- tx = &pdata->dma->chan_priv_tx;
- rx = &pdata->dma->chan_priv_rx;
- } else {
- tx = &host->dma_slave_tx;
- tx->slave_id = pdata->slave_id_tx;
- rx = &host->dma_slave_rx;
- rx->slave_id = pdata->slave_id_rx;
- }
- if (tx->slave_id > 0 && rx->slave_id > 0) {
+ tx = &host->dma_slave_tx;
+ tx->simple_slave.slave_id = pdata->slave_id_tx;
+ rx = &host->dma_slave_rx;
+ rx->simple_slave.slave_id = pdata->slave_id_rx;
+
+ if (tx->simple_slave.slave_id > 0 && rx->simple_slave.slave_id > 0) {
dma_cap_mask_t mask;
dma_cap_zero(mask);
dma_cap_set(DMA_SLAVE, mask);
- host->chan_tx = dma_request_channel(mask, sh_mmcif_filter, tx);
+ host->chan_tx = dma_request_channel(mask, sh_mmcif_filter,
+ &tx->simple_slave);
dev_dbg(&host->pd->dev, "%s: TX: got channel %p\n", __func__,
host->chan_tx);
if (!host->chan_tx)
return;
- host->chan_rx = dma_request_channel(mask, sh_mmcif_filter, rx);
+ host->chan_rx = dma_request_channel(mask, sh_mmcif_filter,
+ &rx->simple_slave);
dev_dbg(&host->pd->dev, "%s: RX: got channel %p\n", __func__,
host->chan_rx);
diff --git a/include/linux/mmc/sh_mmcif.h b/include/linux/mmc/sh_mmcif.h
index 04ff452..b36caa9 100644
--- a/include/linux/mmc/sh_mmcif.h
+++ b/include/linux/mmc/sh_mmcif.h
@@ -32,17 +32,11 @@
* 1111 : Peripheral clock (sup_pclk set '1')
*/
-struct sh_mmcif_dma {
- struct sh_dmae_slave chan_priv_tx;
- struct sh_dmae_slave chan_priv_rx;
-};
-
struct sh_mmcif_plat_data {
void (*set_pwr)(struct platform_device *pdev, int state);
void (*down_pwr)(struct platform_device *pdev);
int (*get_cd)(struct platform_device *pdef);
- struct sh_mmcif_dma *dma; /* Deprecated. Instead */
- unsigned int slave_id_tx; /* use embedded slave_id_[tr]x */
+ unsigned int slave_id_tx; /* embedded slave_id_[tr]x */
unsigned int slave_id_rx;
u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */
unsigned long caps;
--
1.7.2.5
^ permalink raw reply related
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