[PATCH 0/8] add DMA support to tmio_mmc, using dmaengine API, use

[PATCH 0/8] add DMA support to tmio_mmc, using dmaengine API, use

[Guennadi Liakhovetski]

This patch series adds DMA support to the tmio_mmc SD/MMC host driver, 
using the dmaengine API. So far this is only used on SuperH platforms, 
will also be supported on ARM shmobile boards, both use the sh_mobile_sdhi 
MFD driver. Other TMIO MFD implementations are unaffected. The patch 
transparently falls back to PIO if no DMA is configured by the MFD driver, 
or if DMA initialisation or execution fail.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

[PATCH 1/8] SH: constify multiple DMA related objects and references

[Guennadi Liakhovetski]

Lists of DMA channels and slaves are not changed, make them constant. Besides,
SH7724 channel and slave configuration of both DMA controllers is identical,
remove the extra copy of the configuration data.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---

Just some preparatory clean up.

 arch/sh/kernel/cpu/sh4a/setup-sh7722.c |    6 ++--
 arch/sh/kernel/cpu/sh4a/setup-sh7724.c |   54 ++++---------------------------
 arch/sh/kernel/cpu/sh4a/setup-sh7780.c |    6 ++--
 arch/sh/kernel/cpu/sh4a/setup-sh7785.c |    6 ++--
 drivers/dma/shdma.c                    |   12 ++++---
 include/linux/sh_dma.h                 |    9 +++--
 6 files changed, 28 insertions(+), 65 deletions(-)

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index fd7e363..fe28f52 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -24,7 +24,7 @@
 #include <cpu/dma-register.h>
 #include <cpu/sh7722.h>
 
-static struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
+static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
 	{
 		.slave_id	= SHDMA_SLAVE_SCIF0_TX,
 		.addr		= 0xffe0000c,
@@ -78,7 +78,7 @@ static struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
 	},
 };
 
-static struct sh_dmae_channel sh7722_dmae_channels[] = {
+static const struct sh_dmae_channel sh7722_dmae_channels[] = {
 	{
 		.offset = 0,
 		.dmars = 0,
@@ -106,7 +106,7 @@ static struct sh_dmae_channel sh7722_dmae_channels[] = {
 	}
 };
 
-static unsigned int ts_shift[] = TS_SHIFT;
+static const unsigned int ts_shift[] = TS_SHIFT;
 
 static struct sh_dmae_pdata dma_platform_data = {
 	.slave		= sh7722_dmae_slaves,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index e7fa2a9..c4572b1 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -31,7 +31,7 @@
 #include <cpu/sh7724.h>
 
 /* DMA */
-static struct sh_dmae_channel sh7724_dmae0_channels[] = {
+static const struct sh_dmae_channel sh7724_dmae_channels[] = {
 	{
 		.offset = 0,
 		.dmars = 0,
@@ -59,51 +59,11 @@ static struct sh_dmae_channel sh7724_dmae0_channels[] = {
 	}
 };
 
-static struct sh_dmae_channel sh7724_dmae1_channels[] = {
-	{
-		.offset = 0,
-		.dmars = 0,
-		.dmars_bit = 0,
-	}, {
-		.offset = 0x10,
-		.dmars = 0,
-		.dmars_bit = 8,
-	}, {
-		.offset = 0x20,
-		.dmars = 4,
-		.dmars_bit = 0,
-	}, {
-		.offset = 0x30,
-		.dmars = 4,
-		.dmars_bit = 8,
-	}, {
-		.offset = 0x50,
-		.dmars = 8,
-		.dmars_bit = 0,
-	}, {
-		.offset = 0x60,
-		.dmars = 8,
-		.dmars_bit = 8,
-	}
-};
-
-static unsigned int ts_shift[] = TS_SHIFT;
-
-static struct sh_dmae_pdata dma0_platform_data = {
-	.channel	= sh7724_dmae0_channels,
-	.channel_num	= ARRAY_SIZE(sh7724_dmae0_channels),
-	.ts_low_shift	= CHCR_TS_LOW_SHIFT,
-	.ts_low_mask	= CHCR_TS_LOW_MASK,
-	.ts_high_shift	= CHCR_TS_HIGH_SHIFT,
-	.ts_high_mask	= CHCR_TS_HIGH_MASK,
-	.ts_shift	= ts_shift,
-	.ts_shift_num	= ARRAY_SIZE(ts_shift),
-	.dmaor_init	= DMAOR_INIT,
-};
+static const unsigned int ts_shift[] = TS_SHIFT;
 
-static struct sh_dmae_pdata dma1_platform_data = {
-	.channel	= sh7724_dmae1_channels,
-	.channel_num	= ARRAY_SIZE(sh7724_dmae1_channels),
+static struct sh_dmae_pdata dma_platform_data = {
+	.channel	= sh7724_dmae_channels,
+	.channel_num	= ARRAY_SIZE(sh7724_dmae_channels),
 	.ts_low_shift	= CHCR_TS_LOW_SHIFT,
 	.ts_low_mask	= CHCR_TS_LOW_MASK,
 	.ts_high_shift	= CHCR_TS_HIGH_SHIFT,
@@ -187,7 +147,7 @@ static struct platform_device dma0_device = {
 	.resource	= sh7724_dmae0_resources,
 	.num_resources	= ARRAY_SIZE(sh7724_dmae0_resources),
 	.dev		= {
-		.platform_data	= &dma0_platform_data,
+		.platform_data	= &dma_platform_data,
 	},
 	.archdata = {
 		.hwblk_id = HWBLK_DMAC0,
@@ -200,7 +160,7 @@ static struct platform_device dma1_device = {
 	.resource	= sh7724_dmae1_resources,
 	.num_resources	= ARRAY_SIZE(sh7724_dmae1_resources),
 	.dev		= {
-		.platform_data	= &dma1_platform_data,
+		.platform_data	= &dma_platform_data,
 	},
 	.archdata = {
 		.hwblk_id = HWBLK_DMAC1,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 02e792c..c3fcb39 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -251,7 +251,7 @@ static struct platform_device rtc_device = {
 };
 
 /* DMA */
-static struct sh_dmae_channel sh7780_dmae0_channels[] = {
+static const struct sh_dmae_channel sh7780_dmae0_channels[] = {
 	{
 		.offset = 0,
 		.dmars = 0,
@@ -279,7 +279,7 @@ static struct sh_dmae_channel sh7780_dmae0_channels[] = {
 	}
 };
 
-static struct sh_dmae_channel sh7780_dmae1_channels[] = {
+static const struct sh_dmae_channel sh7780_dmae1_channels[] = {
 	{
 		.offset = 0,
 	}, {
@@ -295,7 +295,7 @@ static struct sh_dmae_channel sh7780_dmae1_channels[] = {
 	}
 };
 
-static unsigned int ts_shift[] = TS_SHIFT;
+static const unsigned int ts_shift[] = TS_SHIFT;
 
 static struct sh_dmae_pdata dma0_platform_data = {
 	.channel	= sh7780_dmae0_channels,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 1fcd88b..771ae76 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -299,7 +299,7 @@ static struct platform_device tmu5_device = {
 };
 
 /* DMA */
-static struct sh_dmae_channel sh7785_dmae0_channels[] = {
+static const struct sh_dmae_channel sh7785_dmae0_channels[] = {
 	{
 		.offset = 0,
 		.dmars = 0,
@@ -327,7 +327,7 @@ static struct sh_dmae_channel sh7785_dmae0_channels[] = {
 	}
 };
 
-static struct sh_dmae_channel sh7785_dmae1_channels[] = {
+static const struct sh_dmae_channel sh7785_dmae1_channels[] = {
 	{
 		.offset = 0,
 	}, {
@@ -343,7 +343,7 @@ static struct sh_dmae_channel sh7785_dmae1_channels[] = {
 	}
 };
 
-static unsigned int ts_shift[] = TS_SHIFT;
+static const unsigned int ts_shift[] = TS_SHIFT;
 
 static struct sh_dmae_pdata dma0_platform_data = {
 	.channel	= sh7785_dmae0_channels,
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 549bae9..25ddb1e 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -188,7 +188,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
 	struct sh_dmae_device *shdev = container_of(sh_chan->common.device,
 						struct sh_dmae_device, common);
 	struct sh_dmae_pdata *pdata = shdev->pdata;
-	struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id];
+	const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id];
 	u16 __iomem *addr = shdev->dmars + chan_pdata->dmars / sizeof(u16);
 	int shift = chan_pdata->dmars_bit;
 
@@ -264,7 +264,7 @@ static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
 	return NULL;
 }
 
-static struct sh_dmae_slave_config *sh_dmae_find_slave(
+static const struct sh_dmae_slave_config *sh_dmae_find_slave(
 	struct sh_dmae_chan *sh_chan, struct sh_dmae_slave *param)
 {
 	struct dma_device *dma_dev = sh_chan->common.device;
@@ -297,7 +297,7 @@ static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
 	 * never runs concurrently with itself or free_chan_resources.
 	 */
 	if (param) {
-		struct sh_dmae_slave_config *cfg;
+		const struct sh_dmae_slave_config *cfg;
 
 		cfg = sh_dmae_find_slave(sh_chan, param);
 		if (!cfg) {
@@ -572,12 +572,14 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
 {
 	struct sh_dmae_slave *param;
 	struct sh_dmae_chan *sh_chan;
+	dma_addr_t slave_addr;
 
 	if (!chan)
 		return NULL;
 
 	sh_chan = to_sh_chan(chan);
 	param = chan->private;
+	slave_addr = param->config->addr;
 
 	/* Someone calling slave DMA on a public channel? */
 	if (!param || !sg_len) {
@@ -590,7 +592,7 @@ static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
 	 * if (param != NULL), this is a successfully requested slave channel,
 	 * therefore param->config != NULL too.
 	 */
-	return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &param->config->addr,
+	return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &slave_addr,
 			       direction, flags);
 }
 
@@ -871,7 +873,7 @@ static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
 					int irq, unsigned long flags)
 {
 	int err;
-	struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
+	const struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
 	struct platform_device *pdev = to_platform_device(shdev->common.dev);
 	struct sh_dmae_chan *new_sh_chan;
 
diff --git a/include/linux/sh_dma.h b/include/linux/sh_dma.h
index cdaaff4..b08cd4e 100644
--- a/include/linux/sh_dma.h
+++ b/include/linux/sh_dma.h
@@ -17,7 +17,7 @@
 struct sh_dmae_slave {
 	unsigned int			slave_id; /* Set by the platform */
 	struct device			*dma_dev; /* Set by the platform */
-	struct sh_dmae_slave_config	*config;  /* Set by the driver */
+	const struct sh_dmae_slave_config	*config;  /* Set by the driver */
 };
 
 struct sh_dmae_regs {
@@ -36,6 +36,7 @@ struct sh_desc {
 	int chunks;
 	int mark;
 };
+
 struct sh_dmae_slave_config {
 	unsigned int			slave_id;
 	dma_addr_t			addr;
@@ -50,15 +51,15 @@ struct sh_dmae_channel {
 };
 
 struct sh_dmae_pdata {
-	struct sh_dmae_slave_config *slave;
+	const struct sh_dmae_slave_config *slave;
 	int slave_num;
-	struct sh_dmae_channel *channel;
+	const struct sh_dmae_channel *channel;
 	int channel_num;
 	unsigned int ts_low_shift;
 	unsigned int ts_low_mask;
 	unsigned int ts_high_shift;
 	unsigned int ts_high_mask;
-	unsigned int *ts_shift;
+	const unsigned int *ts_shift;
 	int ts_shift_num;
 	u16 dmaor_init;
 };
-- 
1.6.2.4

Re: [PATCH 1/8] SH: constify multiple DMA related objects and references to them

[Paul Mundt]

On Wed, Apr 21, 2010 at 05:36:49PM +0200, Guennadi Liakhovetski wrote:
> Lists of DMA channels and slaves are not changed, make them constant. Besides,
> SH7724 channel and slave configuration of both DMA controllers is identical,
> remove the extra copy of the configuration data.

I've applied this one, thanks.

[PATCH 2/8] SH: add DMA slave IDs for two SDHI controllers, add

[Guennadi Liakhovetski]

SuperH SDHI controllers can use DMA, add slave IDs to the header and slave
definitions to sh7722.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
 arch/sh/include/asm/dmaengine.h        |    4 ++++
 arch/sh/kernel/cpu/sh4a/setup-sh7722.c |   10 ++++++++++
 2 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
index 2a02b61..876e601 100644
--- a/arch/sh/include/asm/dmaengine.h
+++ b/arch/sh/include/asm/dmaengine.h
@@ -29,6 +29,10 @@ enum {
 	SHDMA_SLAVE_SIUA_RX,
 	SHDMA_SLAVE_SIUB_TX,
 	SHDMA_SLAVE_SIUB_RX,
+	SHDMA_SLAVE_SDHI0_RX,
+	SHDMA_SLAVE_SDHI0_TX,
+	SHDMA_SLAVE_SDHI1_RX,
+	SHDMA_SLAVE_SDHI1_TX,
 };
 
 #endif
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index fe28f52..7f78cc2 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -75,6 +75,16 @@ static const struct sh_dmae_slave_config sh7722_dmae_slaves[] = {
 		.addr		= 0xa454c094,
 		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_32BIT),
 		.mid_rid	= 0xb6,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SDHI0_TX,
+		.addr		= 0x04ce0030,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+		.mid_rid	= 0xc1,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SDHI0_RX,
+		.addr		= 0x04ce0030,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+		.mid_rid	= 0xc2,
 	},
 };
 
-- 
1.6.2.4

Re: [PATCH 2/8] SH: add DMA slave IDs for two SDHI controllers, add

[Magnus Damm]

Hi Guennadi,

On Wed, Apr 21, 2010 at 11:36 AM, Guennadi Liakhovetski
<g.liakhovetski@gmx.de> wrote:
> SuperH SDHI controllers can use DMA, add slave IDs to the header and slave
> definitions to sh7722.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> ---
>  arch/sh/include/asm/dmaengine.h        |    4 ++++
>  arch/sh/kernel/cpu/sh4a/setup-sh7722.c |   10 ++++++++++
>  2 files changed, 14 insertions(+), 0 deletions(-)
>
> diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
> index 2a02b61..876e601 100644
> --- a/arch/sh/include/asm/dmaengine.h
> +++ b/arch/sh/include/asm/dmaengine.h
> @@ -29,6 +29,10 @@ enum {
>        SHDMA_SLAVE_SIUA_RX,
>        SHDMA_SLAVE_SIUB_TX,
>        SHDMA_SLAVE_SIUB_RX,
> +       SHDMA_SLAVE_SDHI0_RX,
> +       SHDMA_SLAVE_SDHI0_TX,
> +       SHDMA_SLAVE_SDHI1_RX,
> +       SHDMA_SLAVE_SDHI1_TX,
>  };
>
>  #endif

Thanks for your work on this. Two SDHIs may be enough for most
processor types, but I think the G3 processor actually has three. With
that in mind, I think it makes more sense to keep the slave ids
together with the processor specific bits in for instance
arch/sh/include/cpu-sh4/cpu/sh7722.h.

If you have time, can you please make a patch that moves the slave ids
into the processor specific header files? This on top of the other
code in the sh/dmaengine topic branch.

With that in place it will be easy to extend each processor type by
itself without having to tie in dependencies on a single asm file.

Thanks,

/ magnus

Re: [PATCH 2/8] SH: add DMA slave IDs for two SDHI controllers, add

[Guennadi Liakhovetski]

On Wed, 21 Apr 2010, Magnus Damm wrote:

> Hi Guennadi,
> 
> On Wed, Apr 21, 2010 at 11:36 AM, Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> wrote:
> > SuperH SDHI controllers can use DMA, add slave IDs to the header and slave
> > definitions to sh7722.
> >
> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > ---
> >  arch/sh/include/asm/dmaengine.h        |    4 ++++
> >  arch/sh/kernel/cpu/sh4a/setup-sh7722.c |   10 ++++++++++
> >  2 files changed, 14 insertions(+), 0 deletions(-)
> >
> > diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
> > index 2a02b61..876e601 100644
> > --- a/arch/sh/include/asm/dmaengine.h
> > +++ b/arch/sh/include/asm/dmaengine.h
> > @@ -29,6 +29,10 @@ enum {
> >        SHDMA_SLAVE_SIUA_RX,
> >        SHDMA_SLAVE_SIUB_TX,
> >        SHDMA_SLAVE_SIUB_RX,
> > +       SHDMA_SLAVE_SDHI0_RX,
> > +       SHDMA_SLAVE_SDHI0_TX,
> > +       SHDMA_SLAVE_SDHI1_RX,
> > +       SHDMA_SLAVE_SDHI1_TX,
> >  };
> >
> >  #endif
> 
> Thanks for your work on this. Two SDHIs may be enough for most
> processor types, but I think the G3 processor actually has three. With
> that in mind, I think it makes more sense to keep the slave ids
> together with the processor specific bits in for instance
> arch/sh/include/cpu-sh4/cpu/sh7722.h.
> 
> If you have time, can you please make a patch that moves the slave ids
> into the processor specific header files? This on top of the other
> code in the sh/dmaengine topic branch.

Ok, yes, first, I forgot to mention - this patch series is based on your 
earlier SH dmaengine patches. Secondly - sure, we can move these defines 
in cpu-specific headers, otoh - why? This is just an enum, it doesn't take 
space in binaries, and having them all together helps uniformity and 
avoids duplication, I think. So, I would just add those SDHI2 macros to 
this list. The important thing is, the actual slave definition array are 
per-CPU. Which is now the case after your patch series.

> With that in place it will be easy to extend each processor type by
> itself without having to tie in dependencies on a single asm file.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

Re: [PATCH 2/8] SH: add DMA slave IDs for two SDHI controllers, add

[Magnus Damm]

On Thu, Apr 22, 2010 at 3:28 PM, Guennadi Liakhovetski
<g.liakhovetski@gmx.de> wrote:
> On Wed, 21 Apr 2010, Magnus Damm wrote:
>> On Wed, Apr 21, 2010 at 11:36 AM, Guennadi Liakhovetski
>> <g.liakhovetski@gmx.de> wrote:
>> > SuperH SDHI controllers can use DMA, add slave IDs to the header and slave
>> > definitions to sh7722.
>> >
>> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
>> > ---
>> >  arch/sh/include/asm/dmaengine.h        |    4 ++++
>> >  arch/sh/kernel/cpu/sh4a/setup-sh7722.c |   10 ++++++++++
>> >  2 files changed, 14 insertions(+), 0 deletions(-)
>> >
>> > diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
>> > index 2a02b61..876e601 100644
>> > --- a/arch/sh/include/asm/dmaengine.h
>> > +++ b/arch/sh/include/asm/dmaengine.h
>> > @@ -29,6 +29,10 @@ enum {
>> >        SHDMA_SLAVE_SIUA_RX,
>> >        SHDMA_SLAVE_SIUB_TX,
>> >        SHDMA_SLAVE_SIUB_RX,
>> > +       SHDMA_SLAVE_SDHI0_RX,
>> > +       SHDMA_SLAVE_SDHI0_TX,
>> > +       SHDMA_SLAVE_SDHI1_RX,
>> > +       SHDMA_SLAVE_SDHI1_TX,
>> >  };
>> >
>> >  #endif
>>
>> Thanks for your work on this. Two SDHIs may be enough for most
>> processor types, but I think the G3 processor actually has three. With
>> that in mind, I think it makes more sense to keep the slave ids
>> together with the processor specific bits in for instance
>> arch/sh/include/cpu-sh4/cpu/sh7722.h.
>>
>> If you have time, can you please make a patch that moves the slave ids
>> into the processor specific header files? This on top of the other
>> code in the sh/dmaengine topic branch.
>
> Ok, yes, first, I forgot to mention - this patch series is based on your
> earlier SH dmaengine patches. Secondly - sure, we can move these defines
> in cpu-specific headers, otoh - why? This is just an enum, it doesn't take
> space in binaries, and having them all together helps uniformity and
> avoids duplication, I think. So, I would just add those SDHI2 macros to
> this list. The important thing is, the actual slave definition array are
> per-CPU. Which is now the case after your patch series.

Like you say, the actual slave definition array is per processor type.
But the available hardware blocks varies with processor type, and we
already have other processor specific information in the cpu-specific
headers. It does not add any code size, true.

The reasons why I prefer them to be split out are:

1) When someone adds support for a new processor it's easy to
implement the same type of information in the new cpu-specific header
as other processors. Adding and removing things from a global list of
processor blocks in a driver/framework specific header file hidden
somewhere is not going to happen. Also, people usually only focus on
one processor at a time. A long global list is just going to make
people confused. "Why is there a SDHI2 there when I only have SDHI on
my processor?"

2) Having them in a global list adds an unneccesary point of patch
serialization.

3) We keep other things like GPIOs and HWBLK in cpu-specific headers
already, why be special?

4) Having it in a global list may encourage people to include this
header from drivers. Isn't it better to force the drivers to use this
value as a cookie instead? This prevents people from adding hardware
block specific workarounds to the driver that may or may not work on
all processors...

/ magnus

Re: [PATCH 2/8] SH: add DMA slave IDs for two SDHI controllers, add

[Guennadi Liakhovetski]

On Thu, 22 Apr 2010, Magnus Damm wrote:

> On Thu, Apr 22, 2010 at 3:28 PM, Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> wrote:
> > On Wed, 21 Apr 2010, Magnus Damm wrote:
> >> On Wed, Apr 21, 2010 at 11:36 AM, Guennadi Liakhovetski
> >> <g.liakhovetski@gmx.de> wrote:
> >> > SuperH SDHI controllers can use DMA, add slave IDs to the header and slave
> >> > definitions to sh7722.
> >> >
> >> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> >> > ---
> >> >  arch/sh/include/asm/dmaengine.h        |    4 ++++
> >> >  arch/sh/kernel/cpu/sh4a/setup-sh7722.c |   10 ++++++++++
> >> >  2 files changed, 14 insertions(+), 0 deletions(-)
> >> >
> >> > diff --git a/arch/sh/include/asm/dmaengine.h b/arch/sh/include/asm/dmaengine.h
> >> > index 2a02b61..876e601 100644
> >> > --- a/arch/sh/include/asm/dmaengine.h
> >> > +++ b/arch/sh/include/asm/dmaengine.h
> >> > @@ -29,6 +29,10 @@ enum {
> >> >        SHDMA_SLAVE_SIUA_RX,
> >> >        SHDMA_SLAVE_SIUB_TX,
> >> >        SHDMA_SLAVE_SIUB_RX,
> >> > +       SHDMA_SLAVE_SDHI0_RX,
> >> > +       SHDMA_SLAVE_SDHI0_TX,
> >> > +       SHDMA_SLAVE_SDHI1_RX,
> >> > +       SHDMA_SLAVE_SDHI1_TX,
> >> >  };
> >> >
> >> >  #endif
> >>
> >> Thanks for your work on this. Two SDHIs may be enough for most
> >> processor types, but I think the G3 processor actually has three. With
> >> that in mind, I think it makes more sense to keep the slave ids
> >> together with the processor specific bits in for instance
> >> arch/sh/include/cpu-sh4/cpu/sh7722.h.
> >>
> >> If you have time, can you please make a patch that moves the slave ids
> >> into the processor specific header files? This on top of the other
> >> code in the sh/dmaengine topic branch.
> >
> > Ok, yes, first, I forgot to mention - this patch series is based on your
> > earlier SH dmaengine patches. Secondly - sure, we can move these defines
> > in cpu-specific headers, otoh - why? This is just an enum, it doesn't take
> > space in binaries, and having them all together helps uniformity and
> > avoids duplication, I think. So, I would just add those SDHI2 macros to
> > this list. The important thing is, the actual slave definition array are
> > per-CPU. Which is now the case after your patch series.
> 
> Like you say, the actual slave definition array is per processor type.
> But the available hardware blocks varies with processor type, and we
> already have other processor specific information in the cpu-specific
> headers. It does not add any code size, true.
> 
> The reasons why I prefer them to be split out are:
> 
> 1) When someone adds support for a new processor it's easy to
> implement the same type of information in the new cpu-specific header
> as other processors. Adding and removing things from a global list of
> processor blocks in a driver/framework specific header file hidden
> somewhere is not going to happen. Also, people usually only focus on
> one processor at a time. A long global list is just going to make
> people confused. "Why is there a SDHI2 there when I only have SDHI on
> my processor?"
> 
> 2) Having them in a global list adds an unneccesary point of patch
> serialization.
> 
> 3) We keep other things like GPIOs and HWBLK in cpu-specific headers
> already, why be special?

ok... you mean headers like arch/sh/include/cpu-sh4/cpu/sh7722.h, yeah, 
that makes sense, agree. Will redo.

> 4) Having it in a global list may encourage people to include this
> header from drivers. Isn't it better to force the drivers to use this
> value as a cookie instead? This prevents people from adding hardware
> block specific workarounds to the driver that may or may not work on
> all processors...

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

[PATCH 3/8] SH: add DMA slave definitions to sh7724

[Guennadi Liakhovetski]

Add a list of SCIF and SDHI DMA slave definitions to sh7724.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
 arch/sh/kernel/cpu/sh4a/setup-sh7724.c |   86 ++++++++++++++++++++++++++++++++
 1 files changed, 86 insertions(+), 0 deletions(-)

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index c4572b1..afdc5ad 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -31,6 +31,90 @@
 #include <cpu/sh7724.h>
 
 /* DMA */
+static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = {
+	{
+		.slave_id	= SHDMA_SLAVE_SCIF0_TX,
+		.addr		= 0xffe0000c,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x21,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF0_RX,
+		.addr		= 0xffe00014,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x22,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF1_TX,
+		.addr		= 0xffe1000c,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x25,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF1_RX,
+		.addr		= 0xffe10014,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x26,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF2_TX,
+		.addr		= 0xffe2000c,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x29,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF2_RX,
+		.addr		= 0xffe20014,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x2a,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF3_TX,
+		.addr		= 0xa4e30020,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x2d,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF3_RX,
+		.addr		= 0xa4e30024,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x2e,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF4_TX,
+		.addr		= 0xa4e40020,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x31,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF4_RX,
+		.addr		= 0xa4e40024,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x32,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF5_TX,
+		.addr		= 0xa4e50020,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x35,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SCIF5_RX,
+		.addr		= 0xa4e50024,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+		.mid_rid	= 0x36,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SDHI0_TX,
+		.addr		= 0x04ce0030,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+		.mid_rid	= 0xc1,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SDHI0_RX,
+		.addr		= 0x04ce0030,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+		.mid_rid	= 0xc2,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SDHI1_TX,
+		.addr		= 0x04cf0030,
+		.chcr		= DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+		.mid_rid	= 0xc9,
+	}, {
+		.slave_id	= SHDMA_SLAVE_SDHI1_RX,
+		.addr		= 0x04cf0030,
+		.chcr		= DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+		.mid_rid	= 0xca,
+	},
+};
+
 static const struct sh_dmae_channel sh7724_dmae_channels[] = {
 	{
 		.offset = 0,
@@ -62,6 +146,8 @@ static const struct sh_dmae_channel sh7724_dmae_channels[] = {
 static const unsigned int ts_shift[] = TS_SHIFT;
 
 static struct sh_dmae_pdata dma_platform_data = {
+	.slave		= sh7724_dmae_slaves,
+	.slave_num	= ARRAY_SIZE(sh7724_dmae_slaves),
 	.channel	= sh7724_dmae_channels,
 	.channel_num	= ARRAY_SIZE(sh7724_dmae_channels),
 	.ts_low_shift	= CHCR_TS_LOW_SHIFT,
-- 
1.6.2.4

[PATCH 4/8] MMC: add DMA support to tmio_mmc driver, when used on

[Guennadi Liakhovetski]

SDHI controllers on SuperH, served by the tmio_mmc driver, can use slave DMA
for data transfer. This patch adds support for the dmaengine API to tmio_mmc
and the necessary interfacing to the sh_mobile_sdhi MFD driver.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---

It could be further broken down into MMC and MFD parts if required, I 
think.

 drivers/mfd/sh_mobile_sdhi.c       |   25 +++-
 drivers/mmc/host/tmio_mmc.c        |  346 ++++++++++++++++++++++++++++++++----
 drivers/mmc/host/tmio_mmc.h        |   11 ++
 include/linux/mfd/sh_mobile_sdhi.h |    3 +
 include/linux/mfd/tmio.h           |   10 +
 5 files changed, 359 insertions(+), 36 deletions(-)

diff --git a/drivers/mfd/sh_mobile_sdhi.c b/drivers/mfd/sh_mobile_sdhi.c
index 468fd36..c368254 100644
--- a/drivers/mfd/sh_mobile_sdhi.c
+++ b/drivers/mfd/sh_mobile_sdhi.c
@@ -25,11 +25,15 @@
 #include <linux/mfd/core.h>
 #include <linux/mfd/tmio.h>
 #include <linux/mfd/sh_mobile_sdhi.h>
+#include <linux/sh_dma.h>
 
 struct sh_mobile_sdhi {
 	struct clk *clk;
 	struct tmio_mmc_data mmc_data;
 	struct mfd_cell cell_mmc;
+	struct sh_dmae_slave param_tx;
+	struct sh_dmae_slave param_rx;
+	struct tmio_mmc_dma dma_priv;
 };
 
 static struct resource sh_mobile_sdhi_resources[] = {
@@ -63,6 +67,8 @@ static void sh_mobile_sdhi_set_pwr(struct platform_device *tmio, int state)
 static int __init sh_mobile_sdhi_probe(struct platform_device *pdev)
 {
 	struct sh_mobile_sdhi *priv;
+	struct tmio_mmc_data *mmc_data;
+	struct sh_mobile_sdhi_info *p = pdev->dev.platform_data;
 	struct resource *mem;
 	char clk_name[8];
 	int ret, irq;
@@ -84,6 +90,8 @@ static int __init sh_mobile_sdhi_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
+	mmc_data = &priv->mmc_data;
+
 	snprintf(clk_name, sizeof(clk_name), "sdhi%d", pdev->id);
 	priv->clk = clk_get(&pdev->dev, clk_name);
 	if (IS_ERR(priv->clk)) {
@@ -95,12 +103,21 @@ static int __init sh_mobile_sdhi_probe(struct platform_device *pdev)
 
 	clk_enable(priv->clk);
 
-	priv->mmc_data.hclk = clk_get_rate(priv->clk);
-	priv->mmc_data.set_pwr = sh_mobile_sdhi_set_pwr;
-	priv->mmc_data.capabilities = MMC_CAP_MMC_HIGHSPEED;
+	mmc_data->hclk = clk_get_rate(priv->clk);
+	mmc_data->set_pwr = sh_mobile_sdhi_set_pwr;
+	mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED;
+
+	if (p && p->dma_slave_tx >= 0 && p->dma_slave_rx >= 0) {
+		priv->param_tx.slave_id = p->dma_slave_tx;
+		priv->param_rx.slave_id = p->dma_slave_rx;
+		priv->dma_priv.chan_priv_tx = &priv->param_tx;
+		priv->dma_priv.chan_priv_rx = &priv->param_rx;
+		mmc_data->dma = &priv->dma_priv;
+		mmc_data->flags = p->tmio_flags;
+	}
 
 	memcpy(&priv->cell_mmc, &sh_mobile_sdhi_cell, sizeof(priv->cell_mmc));
-	priv->cell_mmc.driver_data = &priv->mmc_data;
+	priv->cell_mmc.driver_data = mmc_data;
 	priv->cell_mmc.platform_data = &priv->cell_mmc;
 	priv->cell_mmc.data_size = sizeof(priv->cell_mmc);
 
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
index b2b577f..fafd8c9 100644
--- a/drivers/mmc/host/tmio_mmc.c
+++ b/drivers/mmc/host/tmio_mmc.c
@@ -29,12 +29,21 @@
 #include <linux/irq.h>
 #include <linux/device.h>
 #include <linux/delay.h>
+#include <linux/dmaengine.h>
 #include <linux/mmc/host.h>
 #include <linux/mfd/core.h>
 #include <linux/mfd/tmio.h>
 
 #include "tmio_mmc.h"
 
+static void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
+{
+#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
+	/* Switch DMA mode on or off - SuperH specific? */
+	sd_ctrl_write16(host, 0xd8, enable ? 2 : 0);
+#endif
+}
+
 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
 {
 	u32 clk = 0, clock;
@@ -131,8 +140,8 @@ tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
 
 	host->cmd = cmd;
 
-/* FIXME - this seems to be ok comented out but the spec suggest this bit should
- *         be set when issuing app commands.
+/* FIXME - this seems to be ok commented out but the spec suggest this bit
+ *         should be set when issuing app commands.
  *	if(cmd->flags & MMC_FLAG_ACMD)
  *		c |= APP_CMD;
  */
@@ -155,12 +164,12 @@ tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
 	return 0;
 }
 
-/* This chip always returns (at least?) as much data as you ask for.
+/*
+ * This chip always returns (at least?) as much data as you ask for.
  * I'm unsure what happens if you ask for less than a block. This should be
  * looked into to ensure that a funny length read doesnt hose the controller.
- *
  */
-static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
+static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
 {
 	struct mmc_data *data = host->data;
 	unsigned short *buf;
@@ -180,7 +189,7 @@ static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
 		count = data->blksz;
 
 	pr_debug("count: %08x offset: %08x flags %08x\n",
-	    count, host->sg_off, data->flags);
+		 count, host->sg_off, data->flags);
 
 	/* Transfer the data */
 	if (data->flags & MMC_DATA_READ)
@@ -198,15 +207,13 @@ static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
 	return;
 }
 
-static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
+static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
 {
 	struct mmc_data *data = host->data;
 	struct mmc_command *stop;
 
-	host->data = NULL;
-
 	if (!data) {
-		pr_debug("Spurious data end IRQ\n");
+		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
 		return;
 	}
 	stop = data->stop;
@@ -227,10 +234,17 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
 	 *        upper layers expect. For now, we do what works.
 	 */
 
-	if (data->flags & MMC_DATA_READ)
-		disable_mmc_irqs(host, TMIO_MASK_READOP);
-	else
-		disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
+	if (data->flags & MMC_DATA_READ) {
+		if (!host->chan_rx)
+			disable_mmc_irqs(host, TMIO_MASK_READOP);
+		dev_dbg(&host->pdev->dev, "Complete Rx cookie %d, request %p\n",
+			host->cookie, host->mrq);
+	} else {
+		if (!host->chan_tx)
+			disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
+		dev_dbg(&host->pdev->dev, "Complete Tx cookie %d, request %p\n",
+			host->cookie, host->mrq);
+	}
 
 	if (stop) {
 		if (stop->opcode = 12 && !stop->arg)
@@ -242,7 +256,35 @@ static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
 	tmio_mmc_finish_request(host);
 }
 
-static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
+static void tmio_mmc_isr_data_irq(struct tmio_mmc_host *host)
+{
+	struct mmc_data *data = host->data;
+
+	if (!data)
+		return;
+
+	if ((data->flags & MMC_DATA_WRITE) && host->chan_tx) {
+		/*
+		 * Has all data been written out yet? Testing on SuperH showed,
+		 * that in most cases the first interrupt comes already with the
+		 * BUSY status bit clear, but on some operations, like mount or
+		 * in the beginning of a write / sync / umount, there is one
+		 * DATAEND interrupt with the BUSY bit set, in this cases
+		 * waiting for one more interrupt fixes the problem.
+		 */
+		if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
+			disable_mmc_irqs(host, TMIO_STAT_DATAEND);
+			tasklet_schedule(&host->dma_complete);
+		}
+	} else if ((data->flags & MMC_DATA_READ) && host->chan_rx) {
+		disable_mmc_irqs(host, TMIO_STAT_DATAEND);
+		tasklet_schedule(&host->dma_complete);
+	} else {
+		tmio_mmc_data_irq(host);
+	}
+}
+
+static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
 	unsigned int stat)
 {
 	struct mmc_command *cmd = host->cmd;
@@ -282,10 +324,16 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
 	 * If theres no data or we encountered an error, finish now.
 	 */
 	if (host->data && !cmd->error) {
-		if (host->data->flags & MMC_DATA_READ)
-			enable_mmc_irqs(host, TMIO_MASK_READOP);
-		else
-			enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
+		if (host->data->flags & MMC_DATA_READ) {
+			if (!host->chan_rx)
+				enable_mmc_irqs(host, TMIO_MASK_READOP);
+		} else {
+			struct dma_chan *chan = host->chan_tx;
+			if (!chan)
+				enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
+			else
+				tasklet_schedule(&host->dma_issue);
+		}
 	} else {
 		tmio_mmc_finish_request(host);
 	}
@@ -293,7 +341,6 @@ static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
 	return;
 }
 
-
 static irqreturn_t tmio_mmc_irq(int irq, void *devid)
 {
 	struct tmio_mmc_host *host = devid;
@@ -311,7 +358,7 @@ static irqreturn_t tmio_mmc_irq(int irq, void *devid)
 	if (!ireg) {
 		disable_mmc_irqs(host, status & ~irq_mask);
 
-		pr_debug("tmio_mmc: Spurious irq, disabling! "
+		pr_warning("tmio_mmc: Spurious irq, disabling! "
 			"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
 		pr_debug_status(status);
 
@@ -346,7 +393,7 @@ static irqreturn_t tmio_mmc_irq(int irq, void *devid)
 		/* Data transfer completion */
 		if (ireg & TMIO_STAT_DATAEND) {
 			ack_mmc_irqs(host, TMIO_STAT_DATAEND);
-			tmio_mmc_data_irq(host);
+			tmio_mmc_isr_data_irq(host);
 		}
 
 		/* Check status - keep going until we've handled it all */
@@ -363,16 +410,157 @@ out:
 	return IRQ_HANDLED;
 }
 
+static void tmio_dma_complete(void *arg)
+{
+	struct tmio_mmc_host *host = arg;
+	struct mfd_cell	*cell = host->pdev->dev.platform_data;
+	struct tmio_mmc_data *pdata = cell->driver_data;
+
+	dev_dbg(&host->pdev->dev, "Command completed\n");
+
+	if (!host->data)
+		dev_warn(&host->pdev->dev, "NULL data in DMA completion!\n");
+	else if ((host->data->flags & MMC_DATA_READ) &&
+		 (pdata->flags & TMIO_IMMEDIATE_RX_COMPLETE))
+		tasklet_schedule(&host->dma_complete);
+	else
+		enable_mmc_irqs(host, TMIO_STAT_DATAEND);
+}
+
+static int tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
+{
+	struct scatterlist *sg = host->sg_ptr;
+	struct dma_async_tx_descriptor *desc = NULL;
+	struct dma_chan *chan = host->chan_rx;
+	int ret;
+
+	ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_FROM_DEVICE);
+	if (ret > 0) {
+		host->dma_sglen = ret;
+		desc = chan->device->device_prep_slave_sg(chan, sg, ret,
+			DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+	}
+
+	if (desc) {
+		host->desc = desc;
+		desc->callback = tmio_dma_complete;
+		desc->callback_param = host;
+		host->cookie = desc->tx_submit(desc);
+		if (host->cookie < 0) {
+			host->desc = NULL;
+			ret = host->cookie;
+		} else {
+			chan->device->device_issue_pending(chan);
+		}
+	}
+	dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
+		__func__, host->sg_len, ret, host->cookie, host->mrq);
+
+	if (!host->desc) {
+		/* DMA failed, fall back to PIO */
+		if (ret >= 0)
+			ret = -EIO;
+		host->chan_rx = NULL;
+		dma_release_channel(chan);
+		/* Free the Tx channel too */
+		chan = host->chan_tx;
+		if (chan) {
+			host->chan_tx = NULL;
+			dma_release_channel(chan);
+		}
+		dev_warn(&host->pdev->dev,
+			 "DMA failed: %d, falling back to PIO\n", ret);
+		tmio_mmc_enable_dma(host, false);
+		reset(host);
+		/* Fail this request, let above layers recover */
+		host->mrq->cmd->error = ret;
+		tmio_mmc_finish_request(host);
+	}
+
+	dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__,
+		desc, host->cookie, host->sg_len);
+
+	return ret > 0 ? 0 : ret;
+}
+
+static int tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
+{
+	struct scatterlist *sg = host->sg_ptr;
+	struct dma_async_tx_descriptor *desc = NULL;
+	struct dma_chan *chan = host->chan_tx;
+	int ret;
+
+	ret = dma_map_sg(&host->pdev->dev, sg, host->sg_len, DMA_TO_DEVICE);
+	if (ret > 0) {
+		host->dma_sglen = ret;
+		desc = chan->device->device_prep_slave_sg(chan, sg, ret,
+			DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+	}
+
+	if (desc) {
+		host->desc = desc;
+		desc->callback = tmio_dma_complete;
+		desc->callback_param = host;
+		host->cookie = desc->tx_submit(desc);
+		if (host->cookie < 0) {
+			host->desc = NULL;
+			ret = host->cookie;
+		}
+	}
+	dev_dbg(&host->pdev->dev, "%s(): mapped %d -> %d, cookie %d, rq %p\n",
+		__func__, host->sg_len, ret, host->cookie, host->mrq);
+
+	if (!host->desc) {
+		/* DMA failed, fall back to PIO */
+		if (ret >= 0)
+			ret = -EIO;
+		host->chan_tx = NULL;
+		dma_release_channel(chan);
+		/* Free the Rx channel too */
+		chan = host->chan_rx;
+		if (chan) {
+			host->chan_rx = NULL;
+			dma_release_channel(chan);
+		}
+		dev_warn(&host->pdev->dev,
+			 "DMA failed: %d, falling back to PIO\n", ret);
+		tmio_mmc_enable_dma(host, false);
+		reset(host);
+		/* Fail this request, let above layers recover */
+		host->mrq->cmd->error = ret;
+		tmio_mmc_finish_request(host);
+	}
+
+	dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d\n", __func__,
+		desc, host->cookie);
+
+	return ret > 0 ? 0 : ret;
+}
+
+static int tmio_mmc_start_dma(struct tmio_mmc_host *host,
+			       struct mmc_data *data)
+{
+	if (data->flags & MMC_DATA_READ) {
+		if (host->chan_rx)
+			return tmio_mmc_start_dma_rx(host);
+	} else {
+		if (host->chan_tx)
+			return tmio_mmc_start_dma_tx(host);
+	}
+
+	return 0;
+}
+
 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
 	struct mmc_data *data)
 {
 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
-	    data->blksz, data->blocks);
+		 data->blksz, data->blocks);
 
 	/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
 	if (data->blksz < 4 && host->mmc->ios.bus_width = MMC_BUS_WIDTH_4) {
-		printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
-			mmc_hostname(host->mmc), data->blksz);
+		pr_err("%s: %d byte block unsupported in 4 bit mode\n",
+		       mmc_hostname(host->mmc), data->blksz);
 		return -EINVAL;
 	}
 
@@ -383,7 +571,7 @@ static int tmio_mmc_start_data(struct tmio_mmc_host *host,
 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
 	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
 
-	return 0;
+	return tmio_mmc_start_dma(host, data);
 }
 
 /* Process requests from the MMC layer */
@@ -404,7 +592,6 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 	}
 
 	ret = tmio_mmc_start_command(host, mrq->cmd);
-
 	if (!ret)
 		return;
 
@@ -459,10 +646,10 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc)
 {
 	struct tmio_mmc_host *host = mmc_priv(mmc);
 
-	return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
+	return (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
 }
 
-static struct mmc_host_ops tmio_mmc_ops = {
+static const struct mmc_host_ops tmio_mmc_ops = {
 	.request	= tmio_mmc_request,
 	.set_ios	= tmio_mmc_set_ios,
 	.get_ro         = tmio_mmc_get_ro,
@@ -507,6 +694,92 @@ out:
 #define tmio_mmc_resume NULL
 #endif
 
+static void tmio_issue_tasklet_fn(unsigned long priv)
+{
+	struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
+	struct dma_chan *chan = host->chan_tx;
+
+	chan->device->device_issue_pending(chan);
+}
+
+static void tmio_tasklet_fn(unsigned long arg)
+{
+	struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
+
+	if (host->data->flags & MMC_DATA_READ)
+		dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen,
+			     DMA_FROM_DEVICE);
+	else
+		dma_unmap_sg(&host->pdev->dev, host->sg_ptr, host->dma_sglen,
+			     DMA_TO_DEVICE);
+
+	tmio_mmc_data_irq(host);
+}
+
+/* It might be necessary to make filter MFD specific */
+static bool filter(struct dma_chan *chan, void *arg)
+{
+	dev_dbg(chan->device->dev, "%s: slave data %p\n", __func__, arg);
+	chan->private = arg;
+	return true;
+}
+
+static void tmio_mmc_request_dma(struct tmio_mmc_host *host,
+				 struct tmio_mmc_data *pdata)
+{
+	host->cookie = -EINVAL;
+	host->desc = NULL;
+
+	/* We can only either use DMA for both Tx and Rx or not use it at all */
+	if (pdata->dma) {
+		dma_cap_mask_t mask;
+
+		dma_cap_zero(mask);
+		dma_cap_set(DMA_SLAVE, mask);
+
+		host->chan_tx = dma_request_channel(mask, filter,
+						    pdata->dma->chan_priv_tx);
+		dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
+			host->chan_tx);
+
+		if (!host->chan_tx)
+			return;
+
+		host->chan_rx = dma_request_channel(mask, filter,
+						    pdata->dma->chan_priv_rx);
+		dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
+			host->chan_rx);
+
+		if (!host->chan_rx) {
+			dma_release_channel(host->chan_tx);
+			host->chan_tx = NULL;
+			return;
+		}
+
+		tasklet_init(&host->dma_complete, tmio_tasklet_fn, (unsigned long)host);
+		tasklet_init(&host->dma_issue, tmio_issue_tasklet_fn, (unsigned long)host);
+
+		tmio_mmc_enable_dma(host, true);
+	}
+}
+
+static void tmio_mmc_release_dma(struct tmio_mmc_host *host)
+{
+	if (host->chan_tx) {
+		struct dma_chan *chan = host->chan_tx;
+		host->chan_tx = NULL;
+		dma_release_channel(chan);
+	}
+	if (host->chan_rx) {
+		struct dma_chan *chan = host->chan_rx;
+		host->chan_rx = NULL;
+		dma_release_channel(chan);
+	}
+
+	host->cookie = -EINVAL;
+	host->desc = NULL;
+}
+
 static int __devinit tmio_mmc_probe(struct platform_device *dev)
 {
 	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
@@ -515,6 +788,7 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
 	struct tmio_mmc_host *host;
 	struct mmc_host *mmc;
 	int ret = -EINVAL;
+	u32 irq_mask = TMIO_MASK_CMD;
 
 	if (dev->num_resources != 2)
 		goto out;
@@ -578,13 +852,20 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
 	if (ret)
 		goto cell_disable;
 
+	/* See if we also get DMA */
+	tmio_mmc_request_dma(host, pdata);
+
 	mmc_add_host(mmc);
 
-	printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
-	       (unsigned long)host->ctl, host->irq);
+	pr_info("%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
+		(unsigned long)host->ctl, host->irq);
 
 	/* Unmask the IRQs we want to know about */
-	enable_mmc_irqs(host, TMIO_MASK_IRQ);
+	if (!host->chan_rx)
+		irq_mask |= TMIO_MASK_READOP;
+	if (!host->chan_tx)
+		irq_mask |= TMIO_MASK_WRITEOP;
+	enable_mmc_irqs(host, irq_mask);
 
 	return 0;
 
@@ -609,6 +890,7 @@ static int __devexit tmio_mmc_remove(struct platform_device *dev)
 	if (mmc) {
 		struct tmio_mmc_host *host = mmc_priv(mmc);
 		mmc_remove_host(mmc);
+		tmio_mmc_release_dma(host);
 		free_irq(host->irq, host);
 		if (cell->disable)
 			cell->disable(dev);
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index dafecfb..1008d1e 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -10,6 +10,8 @@
  */
 
 #include <linux/highmem.h>
+#include <linux/interrupt.h>
+#include <linux/dmaengine.h>
 
 #define CTL_SD_CMD 0x00
 #define CTL_ARG_REG 0x04
@@ -106,6 +108,15 @@ struct tmio_mmc_host {
 	unsigned int            sg_off;
 
 	struct platform_device *pdev;
+
+	/* DMA support */
+	struct dma_chan		*chan_rx;
+	struct dma_chan		*chan_tx;
+	struct dma_async_tx_descriptor *desc;
+	unsigned int            dma_sglen;
+	struct tasklet_struct	dma_complete;
+	struct tasklet_struct	dma_issue;
+	dma_cookie_t		cookie;
 };
 
 #include <linux/io.h>
diff --git a/include/linux/mfd/sh_mobile_sdhi.h b/include/linux/mfd/sh_mobile_sdhi.h
index 3bcd716..c7b47f8 100644
--- a/include/linux/mfd/sh_mobile_sdhi.h
+++ b/include/linux/mfd/sh_mobile_sdhi.h
@@ -2,6 +2,9 @@
 #define __SH_MOBILE_SDHI_H__
 
 struct sh_mobile_sdhi_info {
+	int dma_slave_tx;
+	int dma_slave_rx;
+	unsigned long tmio_flags;
 	void (*set_pwr)(struct platform_device *pdev, int state);
 };
 
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index c3f7dff..9882b45 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -55,12 +55,22 @@ int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
 void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
 
+struct tmio_mmc_dma {
+	void *chan_priv_tx;
+	void *chan_priv_rx;
+};
+
+/* MFD flags */
+#define TMIO_IMMEDIATE_RX_COMPLETE	(1 << 0)
+
 /*
  * data for the MMC controller
  */
 struct tmio_mmc_data {
 	unsigned int			hclk;
 	unsigned long			capabilities;
+	unsigned long			flags;
+	struct tmio_mmc_dma		*dma;
 	void (*set_pwr)(struct platform_device *host, int state);
 	void (*set_clk_div)(struct platform_device *host, int state);
 };
-- 
1.6.2.4

Re: [PATCH 4/8] MMC: add DMA support to tmio_mmc driver, when used on

[Magnus Damm]

Hi Guennadi,

On Wed, Apr 21, 2010 at 11:37 AM, Guennadi Liakhovetski
<g.liakhovetski@gmx.de> wrote:
> SDHI controllers on SuperH, served by the tmio_mmc driver, can use slave DMA
> for data transfer. This patch adds support for the dmaengine API to tmio_mmc
> and the necessary interfacing to the sh_mobile_sdhi MFD driver.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> ---
>
> It could be further broken down into MMC and MFD parts if required, I
> think.
>
>  drivers/mfd/sh_mobile_sdhi.c       |   25 +++-
>  drivers/mmc/host/tmio_mmc.c        |  346 ++++++++++++++++++++++++++++++++----
>  drivers/mmc/host/tmio_mmc.h        |   11 ++
>  include/linux/mfd/sh_mobile_sdhi.h |    3 +
>  include/linux/mfd/tmio.h           |   10 +
>  5 files changed, 359 insertions(+), 36 deletions(-)

[snip]

> diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
> index b2b577f..fafd8c9 100644
> --- a/drivers/mmc/host/tmio_mmc.c
> +++ b/drivers/mmc/host/tmio_mmc.c
> @@ -29,12 +29,21 @@
>  #include <linux/irq.h>
>  #include <linux/device.h>
>  #include <linux/delay.h>
> +#include <linux/dmaengine.h>
>  #include <linux/mmc/host.h>
>  #include <linux/mfd/core.h>
>  #include <linux/mfd/tmio.h>
>
>  #include "tmio_mmc.h"
>
> +static void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
> +{
> +#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
> +       /* Switch DMA mode on or off - SuperH specific? */
> +       sd_ctrl_write16(host, 0xd8, enable ? 2 : 0);
> +#endif
> +}
> +

Uhh.. #ifdefs. =)

Can't this register setting be implented in the SDHI driver?

In general I realize that you need to extend the logic in the tmio_mmc
driver quite a bit to implement DMA support, but I wonder if it is
possible to extend the tmio_mmc driver with callbacks and use them to
hook in the DMA code?

Thanks!

/ magnus

Re: [PATCH 4/8] MMC: add DMA support to tmio_mmc driver, when used

[Guennadi Liakhovetski]

On Wed, 21 Apr 2010, Magnus Damm wrote:

> Hi Guennadi,
> 
> On Wed, Apr 21, 2010 at 11:37 AM, Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> wrote:
> > SDHI controllers on SuperH, served by the tmio_mmc driver, can use slave DMA
> > for data transfer. This patch adds support for the dmaengine API to tmio_mmc
> > and the necessary interfacing to the sh_mobile_sdhi MFD driver.
> >
> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > ---
> >
> > It could be further broken down into MMC and MFD parts if required, I
> > think.
> >
> >  drivers/mfd/sh_mobile_sdhi.c       |   25 +++-
> >  drivers/mmc/host/tmio_mmc.c        |  346 ++++++++++++++++++++++++++++++++----
> >  drivers/mmc/host/tmio_mmc.h        |   11 ++
> >  include/linux/mfd/sh_mobile_sdhi.h |    3 +
> >  include/linux/mfd/tmio.h           |   10 +
> >  5 files changed, 359 insertions(+), 36 deletions(-)
> 
> [snip]
> 
> > diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
> > index b2b577f..fafd8c9 100644
> > --- a/drivers/mmc/host/tmio_mmc.c
> > +++ b/drivers/mmc/host/tmio_mmc.c
> > @@ -29,12 +29,21 @@
> >  #include <linux/irq.h>
> >  #include <linux/device.h>
> >  #include <linux/delay.h>
> > +#include <linux/dmaengine.h>
> >  #include <linux/mmc/host.h>
> >  #include <linux/mfd/core.h>
> >  #include <linux/mfd/tmio.h>
> >
> >  #include "tmio_mmc.h"
> >
> > +static void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
> > +{
> > +#if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE)
> > +       /* Switch DMA mode on or off - SuperH specific? */
> > +       sd_ctrl_write16(host, 0xd8, enable ? 2 : 0);
> > +#endif
> > +}
> > +
> 
> Uhh.. #ifdefs. =)

Yeah, I know. But that's the only location in the patch and...

> Can't this register setting be implented in the SDHI driver?

I'm awaiting comments from Ian, maybe other tmio users. Maybe this 
register is generic, even though I don't see any other tmio-containing 
chips implementing DMA.

> In general I realize that you need to extend the logic in the tmio_mmc
> driver quite a bit to implement DMA support, but I wonder if it is
> possible to extend the tmio_mmc driver with callbacks and use them to
> hook in the DMA code?

As you see, this is all generic dmaengine API, nothing SH-specific. The 
only SH-specific part is filtering of channels, and that's hidden in SH 
platform code and passed as cookies to tmio. And if DMA is not used, all 
that code just remqins inactive.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

[PATCH 5/8] SH: Add SDHI DMA support to ecovec

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
 arch/sh/boards/mach-ecovec24/setup.c |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 0e36b04..ff330f0 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/mtd/physmap.h>
 #include <linux/gpio.h>
 #include <linux/interrupt.h>
@@ -31,6 +32,7 @@
 #include <media/sh_mobile_ceu.h>
 #include <media/tw9910.h>
 #include <media/mt9t112.h>
+#include <asm/dmaengine.h>
 #include <asm/heartbeat.h>
 #include <asm/sh_eth.h>
 #include <asm/clock.h>
@@ -442,6 +444,8 @@ static void sdhi0_set_pwr(struct platform_device *pdev, int state)
 }
 
 static struct sh_mobile_sdhi_info sdhi0_info = {
+	.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
+	.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
 	.set_pwr = sdhi0_set_pwr,
 };
 
@@ -478,6 +482,9 @@ static void sdhi1_set_pwr(struct platform_device *pdev, int state)
 }
 
 static struct sh_mobile_sdhi_info sdhi1_info = {
+	.dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
+	.dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
+	.tmio_flags = TMIO_DEFER_RX_COMPLETE,
 	.set_pwr = sdhi1_set_pwr,
 };
 
-- 
1.6.2.4

Re: [PATCH 5/8] SH: Add SDHI DMA support to ecovec

[Magnus Damm]

On Wed, Apr 21, 2010 at 11:37 AM, Guennadi Liakhovetski
<g.liakhovetski@gmx.de> wrote:
> @@ -442,6 +444,8 @@ static void sdhi0_set_pwr(struct platform_device *pdev, int state)
>  }
>
>  static struct sh_mobile_sdhi_info sdhi0_info = {
> +       .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
> +       .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
>        .set_pwr = sdhi0_set_pwr,
>  };
>
> @@ -478,6 +482,9 @@ static void sdhi1_set_pwr(struct platform_device *pdev, int state)
>  }
>
>  static struct sh_mobile_sdhi_info sdhi1_info = {
> +       .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
> +       .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
> +       .tmio_flags = TMIO_DEFER_RX_COMPLETE,

This is a bit odd. How come SDHI1 needs this flag and SDHI0 doesn't?

/ magnus

[PATCH 6/8] SH: Add SDHI DMA support to ms7724se

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
 arch/sh/boards/mach-se/7724/setup.c |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 66cdbc3..70ddc92 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -14,6 +14,7 @@
 #include <linux/device.h>
 #include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/mtd/physmap.h>
 #include <linux/delay.h>
 #include <linux/smc91x.h>
@@ -24,6 +25,7 @@
 #include <video/sh_mobile_lcdc.h>
 #include <media/sh_mobile_ceu.h>
 #include <sound/sh_fsi.h>
+#include <asm/dmaengine.h>
 #include <asm/io.h>
 #include <asm/heartbeat.h>
 #include <asm/sh_eth.h>
@@ -456,11 +458,20 @@ static struct resource sdhi0_cn7_resources[] = {
 	},
 };
 
+static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
+	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,
+	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,
+	.tmio_flags	= TMIO_IMMEDIATE_RX_COMPLETE,
+};
+
 static struct platform_device sdhi0_cn7_device = {
 	.name           = "sh_mobile_sdhi",
 	.id		= 0,
 	.num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
 	.resource       = sdhi0_cn7_resources,
+	.dev = {
+		.platform_data	= &sh7724_sdhi0_data,
+	},
 	.archdata = {
 		.hwblk_id = HWBLK_SDHI0,
 	},
@@ -479,11 +490,19 @@ static struct resource sdhi1_cn8_resources[] = {
 	},
 };
 
+static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
+	.dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
+	.dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
+};
+
 static struct platform_device sdhi1_cn8_device = {
 	.name           = "sh_mobile_sdhi",
 	.id		= 1,
 	.num_resources  = ARRAY_SIZE(sdhi1_cn8_resources),
 	.resource       = sdhi1_cn8_resources,
+	.dev = {
+		.platform_data	= &sh7724_sdhi1_data,
+	},
 	.archdata = {
 		.hwblk_id = HWBLK_SDHI1,
 	},
-- 
1.6.2.4

Re: [PATCH 6/8] SH: Add SDHI DMA support to ms7724se

[Magnus Damm]

On Wed, Apr 21, 2010 at 11:37 AM, Guennadi Liakhovetski
<g.liakhovetski@gmx.de> wrote:
> @@ -456,11 +458,20 @@ static struct resource sdhi0_cn7_resources[] = {
>        },
>  };
>
> +static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
> +       .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
> +       .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
> +       .tmio_flags     = TMIO_IMMEDIATE_RX_COMPLETE,
> +};
> +
>  static struct platform_device sdhi0_cn7_device = {
>        .name           = "sh_mobile_sdhi",
>        .id             = 0,
>        .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
>        .resource       = sdhi0_cn7_resources,
> +       .dev = {
> +               .platform_data  = &sh7724_sdhi0_data,
> +       },
>        .archdata = {
>                .hwblk_id = HWBLK_SDHI0,
>        },
> @@ -479,11 +490,19 @@ static struct resource sdhi1_cn8_resources[] = {
>        },
>  };
>
> +static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
> +       .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
> +       .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,

And these two are the opposite of Ecovec even though both are sh7724? Hm..

/ magnus

Re: [PATCH 6/8] SH: Add SDHI DMA support to ms7724se

[Guennadi Liakhovetski]

On Wed, 21 Apr 2010, Magnus Damm wrote:

> On Wed, Apr 21, 2010 at 11:37 AM, Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> wrote:
> > @@ -456,11 +458,20 @@ static struct resource sdhi0_cn7_resources[] = {
> >        },
> >  };
> >
> > +static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
> > +       .dma_slave_tx   = SHDMA_SLAVE_SDHI0_TX,
> > +       .dma_slave_rx   = SHDMA_SLAVE_SDHI0_RX,
> > +       .tmio_flags     = TMIO_IMMEDIATE_RX_COMPLETE,
> > +};
> > +
> >  static struct platform_device sdhi0_cn7_device = {
> >        .name           = "sh_mobile_sdhi",
> >        .id             = 0,
> >        .num_resources  = ARRAY_SIZE(sdhi0_cn7_resources),
> >        .resource       = sdhi0_cn7_resources,
> > +       .dev = {
> > +               .platform_data  = &sh7724_sdhi0_data,
> > +       },
> >        .archdata = {
> >                .hwblk_id = HWBLK_SDHI0,
> >        },
> > @@ -479,11 +490,19 @@ static struct resource sdhi1_cn8_resources[] = {
> >        },
> >  };
> >
> > +static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
> > +       .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
> > +       .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
> 
> And these two are the opposite of Ecovec even though both are sh7724? Hm..

Right, that's wrong. I mean, yes, they did behave differently in my tests. 
On both boards I only could test one slot, so, I just presume the other 
one should behave equally. So, this flag should be present on SE and not 
on ecovec. Will fix in the next revision, thanks.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

[PATCH 7/8] SH: Add SDHI DMA support to kfr2r09

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
 arch/sh/boards/mach-kfr2r09/setup.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index b2cd0ed..6e76747 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -10,6 +10,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/interrupt.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/onenand.h>
 #include <linux/delay.h>
@@ -25,6 +26,7 @@
 #include <video/sh_mobile_lcdc.h>
 #include <asm/suspend.h>
 #include <asm/clock.h>
+#include <asm/dmaengine.h>
 #include <asm/machvec.h>
 #include <asm/io.h>
 #include <cpu/sh7724.h>
@@ -356,10 +358,18 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = {
 	},
 };
 
+static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
+	.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
+	.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
+};
+
 static struct platform_device kfr2r09_sh_sdhi0_device = {
 	.name           = "sh_mobile_sdhi",
 	.num_resources  = ARRAY_SIZE(kfr2r09_sh_sdhi0_resources),
 	.resource       = kfr2r09_sh_sdhi0_resources,
+	.dev = {
+		.platform_data	= &sh7724_sdhi0_data,
+	},
 	.archdata = {
 		.hwblk_id = HWBLK_SDHI0,
 	},
-- 
1.6.2.4

[PATCH 8/8] SH: Add SDHI DMA support to migor

[Guennadi Liakhovetski]

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
---
 arch/sh/boards/mach-migor/setup.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 7da0fc9..242a623 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -12,6 +12,7 @@
 #include <linux/interrupt.h>
 #include <linux/input.h>
 #include <linux/input/sh_keysc.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
 #include <linux/mtd/physmap.h>
 #include <linux/mtd/nand.h>
 #include <linux/i2c.h>
@@ -24,6 +25,7 @@
 #include <media/ov772x.h>
 #include <media/tw9910.h>
 #include <asm/clock.h>
+#include <asm/dmaengine.h>
 #include <asm/machvec.h>
 #include <asm/io.h>
 #include <asm/suspend.h>
@@ -402,10 +404,19 @@ static struct resource sdhi_cn9_resources[] = {
 	},
 };
 
+static struct sh_mobile_sdhi_info sh7724_sdhi_data = {
+	.dma_slave_tx	= SHDMA_SLAVE_SDHI0_TX,
+	.dma_slave_rx	= SHDMA_SLAVE_SDHI0_RX,
+	.tmio_flags	= TMIO_IMMEDIATE_RX_COMPLETE,
+};
+
 static struct platform_device sdhi_cn9_device = {
 	.name		= "sh_mobile_sdhi",
 	.num_resources	= ARRAY_SIZE(sdhi_cn9_resources),
 	.resource	= sdhi_cn9_resources,
+	.dev = {
+		.platform_data	= &sh7724_sdhi_data,
+	},
 	.archdata = {
 		.hwblk_id = HWBLK_SDHI,
 	},
-- 
1.6.2.4

Re: [PATCH 0/8] add DMA support to tmio_mmc, using dmaengine API,

[Guennadi Liakhovetski]

Hi Ian

On Wed, 21 Apr 2010, Guennadi Liakhovetski wrote:

> This patch series adds DMA support to the tmio_mmc SD/MMC host driver, 
> using the dmaengine API. So far this is only used on SuperH platforms, 
> will also be supported on ARM shmobile boards, both use the sh_mobile_sdhi 
> MFD driver. Other TMIO MFD implementations are unaffected. The patch 
> transparently falls back to PIO if no DMA is configured by the MFD driver, 
> or if DMA initialisation or execution fail.

Do you think you'd be able to comment on this patch-series? Maybe you 
could give your initial opinion about the way I chose to integrate DMA 
into tmio_mmc.c: do you agree with it? Or would you prefer it to depend on 
a config-option? Maybe put it in a separate tmio_dma.c file? I'd then 
submit a v2 of the series, which you could then review in detail.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/