From: Magnus Damm <magnus.damm@gmail.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH][RFC] sh: suspend interpreter V1
Date: Mon, 30 Mar 2009 02:45:11 +0000 [thread overview]
Message-ID: <aec7e5c30903291945o2e76217bof48b509abb86015c@mail.gmail.com> (raw)
In-Reply-To: <20090323091739.25647.6773.sendpatchset@rx1.opensource.se>
On Wed, Mar 25, 2009 at 11:46 PM, <takasi-y@ops.dti.ne.jp> wrote:
>> Yoshii-san, any comments?
> I still prefer to write them in _real_ assember (without having any good idea), though.
I think Francesco has more complex needs. Since his processor lacks
instruction cache prefetching opcodes, he is forced to populate the
instruction cache "by hand" with jump instructions. That will of
course be "_real_" assembly, but with magic jump instructions added in
the middle to support instruction cache preload. I prefer to build-in
the cache population into the interpreter/JIT code instead. That way
we can have the same interpreter regardless if we chose to preload in
cache or execute from onchip ram.
I think Yoshii-san is proposing breaking up code into board-specific
and cpu-specific assembly code, which gets copied and run.
Francesco, can you convince yoshii-san why we should add support for
an interpreter? =)
>> > > But do we (you!) really need to jump forward?
>> > Not really but I'd like to have no constraint if possible
>> Then I vote for adding it later when there is a direct need. You can
>> implement delay using backward jump only, right?
>
> Because this is a kind of assembler, we can use its technique, like
> making pointer link of undefined labels on its reference,
> and resolve them following the link when the label is defined.
> Then the code will be
>
> /* forward ref. This make link because label is not resolved */
> sh_pm_op(info, SH_PM_OP_BT, sh_pm_ref(info, &label));
> /* define label, and resolve above using linked list */
> sh_pm_label(info, &label); /* define label, and resolve above */
> /* backward ref. This simply use label value */
> sh_pm_op(info, SH_PM_OP_BT, sh_pm_ref(info, &label));
Sounds pretty clean. I guess it will become a bit more complex since
multiple opcomes may jump to the same label. So we may need to do a
linked list with per-opcode allocation. Unless we misuse the IMM field
in the opcode for a single linked list somehow. =)
> But, I don't think we need even backward jump.
> What we want is conditional wait and delay, isn't it?
>
> SH_PM_OP_WAIT_UNTIL_EQ(addr, value) while(read(addr)!=value)/*wait*/;
> SH_PM_OP_WAIT_UNTIL_SET(addr, mask) while(!(read(addr)&mask))/*wait*/;
> SH_PM_OP_WAIT_UNTIL_CLR(addr, mask) while(read(addr)&mask)/*wait*/;
> SH_PM_OP_DELAY_LOOP(count) while(count--)/*wait*/;
I wonder if we can make those opcodes fit with the current format?
Maybe no. They look fine with me though, but I'm not sure about
Francescos use case.
I'll try to find time to post V2 this or next week.
Cheers,
/ magnus
next prev parent reply other threads:[~2009-03-30 2:45 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-23 9:17 [PATCH][RFC] sh: suspend interpreter V1 Magnus Damm
2009-03-23 15:35 ` Francesco VIRLINZI
2009-03-24 7:00 ` Francesco VIRLINZI
2009-03-24 11:08 ` Magnus Damm
2009-03-24 13:41 ` Francesco VIRLINZI
2009-03-25 10:10 ` Magnus Damm
2009-03-25 14:46 ` takasi-y
2009-03-30 2:45 ` Magnus Damm [this message]
2009-03-30 7:02 ` Francesco VIRLINZI
2009-03-31 8:42 ` Paul Mundt
2009-04-15 11:15 ` Magnus Damm
2009-04-15 11:23 ` Paul Mundt
2009-04-16 14:15 ` Francesco VIRLINZI
2009-04-16 14:22 ` Francesco VIRLINZI
2009-04-17 2:07 ` Magnus Damm
2009-04-17 6:44 ` Francesco VIRLINZI
2009-04-17 10:39 ` Magnus Damm
2009-04-17 12:00 ` Francesco VIRLINZI
2009-04-17 21:38 ` Jean-Christophe PLAGNIOL-VILLARD
2009-04-20 10:26 ` Magnus Damm
2009-04-20 12:27 ` Jean-Christophe PLAGNIOL-VILLARD
2009-04-20 12:33 ` Francesco VIRLINZI
2009-04-20 12:55 ` Francesco VIRLINZI
2009-04-20 13:03 ` Jean-Christophe PLAGNIOL-VILLARD
2009-04-20 13:15 ` Jean-Christophe PLAGNIOL-VILLARD
2009-04-20 13:30 ` Michael Trimarchi
2009-04-21 7:17 ` Francesco VIRLINZI
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