From: Thomas Gleixner <tglx@linutronix.de>
To: David Laight <David.Laight-ZS65k/vG3HxXrIkS9f7CXA@public.gmane.org>
Cc: Chris Zankel <chris-YvXeqwSYzG2sTnJN9+BGXg@public.gmane.org>,
Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>,
"x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"linux-ia64-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-ia64-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org"
<linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
"linux-xtensa-PjhNF2WwrV/0Sa2dR60CXw@public.gmane.org"
<linux-xtensa-PjhNF2WwrV/0Sa2dR60CXw@public.gmane.org>,
"linux-sh-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-sh-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
David Howells <dhowells-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
Max Filippov <jcmvbkbc-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org"
<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
Guan Xuetao <gxt-TG0Ac1+ktVePQbnJrJN+5g@public.gmane.org>,
"linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org"
<linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>,
'Christoph Hellwig' <hch-jcswGhMUV9g@public.gmane.org>
Subject: RE: [PATCH 02/11] x86: make dma_cache_sync a no-op
Date: Tue, 03 Oct 2017 20:27:08 +0000 [thread overview]
Message-ID: <alpine.DEB.2.20.1710032214370.2278@nanos> (raw)
In-Reply-To: <063D6719AE5E284EB5DD2968C1650D6DD0088B73-VkEWCZq2GCInGFn1LkZF6NBPR1lH4CV8@public.gmane.org>
On Tue, 3 Oct 2017, David Laight wrote:
> From: Christoph Hellwig
> > Sent: 03 October 2017 11:43
> > x86 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
> > make any sense to do any work in dma_cache_sync given that it must be a
> > no-op when dma_alloc_attrs returns coherent memory.
>
> I believe it is just about possible to require an explicit
> write flush on x86.
> ISTR this can happen with something like write combining.
As the changelog says: x86 only implements dma_alloc_coherent() which as
the name says returns coherent memory, i.e. type WB (write back), which is
not subject to dma_cache_sync() operations.
If the driver converts that memory to WC (write combine) on its own via
PAT/MTRR, then it needs to take care of flushing the write buffer on its
own. It's not convered by this interface.
Thanks,
tglx
next prev parent reply other threads:[~2017-10-03 20:27 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-03 10:43 refactor dma_cache_sync V2 Christoph Hellwig
[not found] ` <20171003104311.10058-1-hch-jcswGhMUV9g@public.gmane.org>
2017-10-03 10:43 ` [PATCH 01/11] floppy: consolidate the dummy fd_cacheflush definition Christoph Hellwig
2017-10-03 10:43 ` [PATCH 02/11] x86: make dma_cache_sync a no-op Christoph Hellwig
2017-10-03 16:02 ` David Laight
[not found] ` <063D6719AE5E284EB5DD2968C1650D6DD0088B73-VkEWCZq2GCInGFn1LkZF6NBPR1lH4CV8@public.gmane.org>
2017-10-03 20:27 ` Thomas Gleixner [this message]
2017-10-03 10:43 ` [PATCH 03/11] frv: " Christoph Hellwig
2017-10-03 10:43 ` [PATCH 04/11] ia64: " Christoph Hellwig
[not found] ` <20171003104311.10058-5-hch-jcswGhMUV9g@public.gmane.org>
2017-10-04 8:59 ` David Laight
[not found] ` <063D6719AE5E284EB5DD2968C1650D6DD0089626-VkEWCZq2GCInGFn1LkZF6NBPR1lH4CV8@public.gmane.org>
2017-10-04 9:06 ` 'Christoph Hellwig'
2017-10-03 10:43 ` [PATCH 05/11] microblaze: " Christoph Hellwig
2017-10-03 10:43 ` [PATCH 06/11] mn10300: " Christoph Hellwig
2017-10-03 10:43 ` [PATCH 08/11] unicore32: " Christoph Hellwig
2017-10-03 10:43 ` [PATCH 09/11] xtensa: " Christoph Hellwig
2017-10-03 10:43 ` [PATCH 07/11] powerpc: " Christoph Hellwig
2017-10-03 11:24 ` Christophe LEROY
2017-10-03 11:43 ` Robin Murphy
2017-10-03 11:43 ` Christoph Hellwig
2017-10-04 8:29 ` Christophe LEROY
2017-10-03 10:43 ` [PATCH 10/11] sh: " Christoph Hellwig
2017-10-03 10:43 ` [PATCH 11/11] dma-mapping: turn dma_cache_sync into a dma_map_ops method Christoph Hellwig
2017-10-03 11:49 ` refactor dma_cache_sync V2 Robin Murphy
2017-10-16 12:44 ` Christoph Hellwig
[not found] ` <20171016124442.GB2177-jcswGhMUV9g@public.gmane.org>
2017-10-19 15:02 ` Christoph Hellwig
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