From: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
To: Artur Rojek <contact@artur-rojek.eu>,
Yoshinori Sato <ysato@users.sourceforge.jp>,
Rich Felker <dalias@libc.org>,
Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Rafael Ignacio Zurita <rafaelignacio.zurita@gmail.com>,
linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/3] sh: dma: Correct the number of DMA channels in SH7709
Date: Tue, 04 Jul 2023 22:35:13 +0200 [thread overview]
Message-ID: <f4faecbcc04acb2eb8022327da1ebb56617b732f.camel@physik.fu-berlin.de> (raw)
In-Reply-To: <20230527164452.64797-4-contact@artur-rojek.eu>
On Sat, 2023-05-27 at 18:44 +0200, Artur Rojek wrote:
> According to the hardware manual [1], the DMAC found in SH7709 features
> only 4 channels.
>
> While at it, also sort the existing targets and clarify that
> NR_ONCHIP_DMA_CHANNELS must be a multiply of two.
>
> [1] https://www.renesas.com/us/en/document/mah/sh7709s-group-hardware-manual (p. 373)
>
> Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
> ---
>
> v2: - sort existing targets
> - clarify that the value must be a multiply of two
>
> arch/sh/drivers/dma/Kconfig | 14 ++++++++------
> 1 file changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
> index 7d54f284ce10..382fbb189fcf 100644
> --- a/arch/sh/drivers/dma/Kconfig
> +++ b/arch/sh/drivers/dma/Kconfig
> @@ -28,17 +28,19 @@ config SH_DMA_API
> config NR_ONCHIP_DMA_CHANNELS
> int
> depends on SH_DMA
> - default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
> - CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091
> + default "4" if CPU_SUBTYPE_SH7709 || CPU_SUBTYPE_SH7750 || \
> + CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7751 || \
> + CPU_SUBTYPE_SH7091
> default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
> CPU_SUBTYPE_SH7760
> - default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \
> - CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724
> + default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724 || \
> + CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
> default "6"
> help
> This allows you to specify the number of channels that the on-chip
> - DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
> - SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6.
> + DMAC supports. This will be 4 for SH7709/SH7750/SH7750S/SH7751/SH7091,
> + 8 for SH7750R/SH7751R/SH7760, and 12 for SH7723/SH7724/SH7780/SH7785.
> + Default is 6. Must be an even number.
>
> config SH_DMABRG
> bool "SH7760 DMABRG support"
Reviewed-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
--
.''`. John Paul Adrian Glaubitz
: :' : Debian Developer
`. `' Physicist
`- GPG: 62FF 8A75 84E0 2956 9546 0006 7426 3B37 F5B5 F913
next prev parent reply other threads:[~2023-07-04 20:35 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-27 16:44 [PATCH v2 0/3] SuperH DMAC fixes Artur Rojek
2023-05-27 16:44 ` [PATCH v2 1/3] sh: dma: Fix dma channel offset calculation Artur Rojek
2023-06-07 9:04 ` Geert Uytterhoeven
2023-07-04 20:30 ` John Paul Adrian Glaubitz
2023-05-27 16:44 ` [PATCH v2 2/3] sh: dma: Drop incorrect SH_DMAC_BASE1 for SH4 Artur Rojek
2023-06-07 9:05 ` Geert Uytterhoeven
2023-07-04 20:32 ` John Paul Adrian Glaubitz
2023-05-27 16:44 ` [PATCH v2 3/3] sh: dma: Correct the number of DMA channels in SH7709 Artur Rojek
2023-06-07 9:16 ` Geert Uytterhoeven
2023-06-08 9:54 ` John Paul Adrian Glaubitz
2023-06-08 9:58 ` Geert Uytterhoeven
2023-06-08 10:03 ` John Paul Adrian Glaubitz
2023-06-17 7:31 ` John Paul Adrian Glaubitz
2023-06-17 11:09 ` Geert Uytterhoeven
2023-07-04 5:45 ` John Paul Adrian Glaubitz
2023-07-04 7:32 ` Geert Uytterhoeven
2023-07-04 7:43 ` John Paul Adrian Glaubitz
2023-07-04 7:54 ` Geert Uytterhoeven
2023-07-04 20:35 ` John Paul Adrian Glaubitz [this message]
2023-07-05 17:08 ` [PATCH v2 0/3] SuperH DMAC fixes John Paul Adrian Glaubitz
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