* [PATCH] PM / Domains: Fix default system suspend/resume operations
From: Rafael J. Wysocki @ 2011-12-04 20:59 UTC (permalink / raw)
To: Linux PM list; +Cc: LKML, Linux-sh list, Magnus Damm
From: Rafael J. Wysocki <rjw@sisk.pl>
Commit d23b9b00cdde5c93b914a172cecd57d5625fcd04 (PM / Domains: Rework
system suspend callback routines (v2)) broke the system suspend and
resume handling by devices belonging to generic PM domains, because
it used freeze/thaw callbacks instead of suspend/resume ones and
didn't initialize device callbacks for system suspend/resume
properly at all. Fix those problems.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
This patch is on top of linux-pm/pm-domains.
Thanks,
Rafael
---
drivers/base/power/domain.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
Index: linux/drivers/base/power/domain.c
=================================--- linux.orig/drivers/base/power/domain.c
+++ linux/drivers/base/power/domain.c
@@ -1360,7 +1360,7 @@ static int pm_genpd_default_restore_stat
*/
static int pm_genpd_default_suspend(struct device *dev)
{
- int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.freeze;
+ int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.suspend;
return cb ? cb(dev) : pm_generic_suspend(dev);
}
@@ -1371,7 +1371,7 @@ static int pm_genpd_default_suspend(stru
*/
static int pm_genpd_default_suspend_late(struct device *dev)
{
- int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.freeze_late;
+ int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.suspend_late;
return cb ? cb(dev) : pm_generic_suspend_noirq(dev);
}
@@ -1382,7 +1382,7 @@ static int pm_genpd_default_suspend_late
*/
static int pm_genpd_default_resume_early(struct device *dev)
{
- int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.thaw_early;
+ int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.resume_early;
return cb ? cb(dev) : pm_generic_resume_noirq(dev);
}
@@ -1393,7 +1393,7 @@ static int pm_genpd_default_resume_early
*/
static int pm_genpd_default_resume(struct device *dev)
{
- int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.thaw;
+ int (*cb)(struct device *__dev) = dev_gpd_data(dev)->ops.resume;
return cb ? cb(dev) : pm_generic_resume(dev);
}
@@ -1487,10 +1487,10 @@ void pm_genpd_init(struct generic_pm_dom
genpd->domain.ops.complete = pm_genpd_complete;
genpd->dev_ops.save_state = pm_genpd_default_save_state;
genpd->dev_ops.restore_state = pm_genpd_default_restore_state;
- genpd->dev_ops.freeze = pm_genpd_default_suspend;
- genpd->dev_ops.freeze_late = pm_genpd_default_suspend_late;
- genpd->dev_ops.thaw_early = pm_genpd_default_resume_early;
- genpd->dev_ops.thaw = pm_genpd_default_resume;
+ genpd->dev_ops.suspend = pm_genpd_default_suspend;
+ genpd->dev_ops.suspend_late = pm_genpd_default_suspend_late;
+ genpd->dev_ops.resume_early = pm_genpd_default_resume_early;
+ genpd->dev_ops.resume = pm_genpd_default_resume;
genpd->dev_ops.freeze = pm_genpd_default_freeze;
genpd->dev_ops.freeze_late = pm_genpd_default_freeze_late;
genpd->dev_ops.thaw_early = pm_genpd_default_thaw_early;
^ permalink raw reply
* [PATCH] PM / sh7372: Make domain stay_on bit only affect system suspend
From: Rafael J. Wysocki @ 2011-12-04 22:08 UTC (permalink / raw)
To: Linux PM list; +Cc: LKML, Linux-sh list, Magnus Damm, Guennadi Liakhovetski
From: Rafael J. Wysocki <rjw@sisk.pl>
SH7372 uses two independent mechanisms for ensuring that power
domains will never be turned off: the stay_on flag and the "always
on" domain governor. However, the "always on" governor is only taken
into accout by runtime PM code paths, while the stay_on flag affects
all attempts to turn the given domain off. This is a problem for
domains that only need to stay in the "power on" state during system
sleep, but may be turned off by runtime PM if specific conditions are
satisfied. For this reason, make SH7372 register a PM notifier that
will enable the checking of the domain stay_on flag on during system
suspend and disable it during system resume. This way, the stay_on
flag will only affect system sleep states, while the "always on"
governor will only affect runtime PM.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
This patch is on top of linux-pm/pm-domains.
Thanks,
Rafael
---
arch/arm/mach-shmobile/pm-sh7372.c | 20 +++++++++++++++++++-
1 file changed, 19 insertions(+), 1 deletion(-)
Index: linux/arch/arm/mach-shmobile/pm-sh7372.c
=================================--- linux.orig/arch/arm/mach-shmobile/pm-sh7372.c
+++ linux/arch/arm/mach-shmobile/pm-sh7372.c
@@ -77,6 +77,8 @@
#ifdef CONFIG_PM
+static bool system_pm_transition;
+
static int pd_power_down(struct generic_pm_domain *genpd)
{
struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
@@ -85,7 +87,7 @@ static int pd_power_down(struct generic_
if (sh7372_pd->suspend)
sh7372_pd->suspend();
- if (sh7372_pd->stay_on)
+ if (system_pm_transition && sh7372_pd->stay_on)
return 0;
if (__raw_readl(PSTR) & mask) {
@@ -286,6 +288,21 @@ struct sh7372_pm_domain sh7372_a3sg = {
.bit_shift = 13,
};
+static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
+ unsigned long pm_event, void *unused)
+{
+ switch (pm_event) {
+ case PM_SUSPEND_PREPARE:
+ system_pm_transition = true;
+ break;
+ case PM_POST_SUSPEND:
+ system_pm_transition = false;
+ break;
+ }
+
+ return NOTIFY_DONE;
+}
+
#else /* !CONFIG_PM */
static inline void sh7372_a3sp_init(void) {}
@@ -509,6 +526,7 @@ static int sh7372_enter_suspend(suspend_
static void sh7372_suspend_init(void)
{
shmobile_suspend_ops.enter = sh7372_enter_suspend;
+ pm_notifier(sh7372_pm_notifier_fn, 0);
}
#else
static void sh7372_suspend_init(void) {}
^ permalink raw reply
* cpuidle broken on sh7724 since 2.6.33-rc1 - bisected
From: Guennadi Liakhovetski @ 2011-12-04 23:42 UTC (permalink / raw)
To: linux-sh
Hi
cpuidle was introduced on sh7724 with 2.6.32-rc1, with 2.6.33-rc1 it got
broken and it still remains that way, at least I'm unaware of a way to
boot a current cpuidle-enabled kernel on sh7724 (ecovec). git bisect
(after multiple manual adjustments) pointed out at this commit:
commit f533c3d340536198a4889a42a68d6c0d79a504e7
Author: Paul Mundt <lethal@linux-sh.org>
Date: Fri Oct 16 17:20:58 2009 +0900
sh: Idle loop chainsawing for SMP-based light sleep.
A manual verification confirmed, that it is exactly the breakage point.
I'm afraid, at 00:30 Monday "morning" I'm not very much inclined to look
for a fix;-)
Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* Re: [PATCH] PM / sh7372: Make domain stay_on bit only affect system suspend
From: Rafael J. Wysocki @ 2011-12-05 0:17 UTC (permalink / raw)
To: Linux PM list; +Cc: LKML, Linux-sh list, Magnus Damm, Guennadi Liakhovetski
In-Reply-To: <201112042308.14255.rjw@sisk.pl>
On Sunday, December 04, 2011, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki <rjw@sisk.pl>
>
> SH7372 uses two independent mechanisms for ensuring that power
> domains will never be turned off: the stay_on flag and the "always
> on" domain governor. However, the "always on" governor is only taken
> into accout by runtime PM code paths, while the stay_on flag affects
> all attempts to turn the given domain off. This is a problem for
> domains that only need to stay in the "power on" state during system
> sleep, but may be turned off by runtime PM if specific conditions are
> satisfied. For this reason, make SH7372 register a PM notifier that
> will enable the checking of the domain stay_on flag on during system
> suspend and disable it during system resume. This way, the stay_on
> flag will only affect system sleep states, while the "always on"
> governor will only affect runtime PM.
Well, it's not that simple, because we need to make the domains that
should stay "on" during system suspend be powered on beforehand.
I'll send an updated patch in a while.
Thanks,
Rafael
^ permalink raw reply
* [Update][PATCH] PM / sh7372: Make domain stay_on bit only affect system suspend
From: Rafael J. Wysocki @ 2011-12-05 0:21 UTC (permalink / raw)
To: Linux-sh list; +Cc: Linux PM list, LKML, Magnus Damm, Guennadi Liakhovetski
In-Reply-To: <201112050117.05214.rjw@sisk.pl>
From: Rafael J. Wysocki <rjw@sisk.pl>
SH7372 uses two independent mechanisms for ensuring that power
domains will never be turned off: the stay_on flag and the "always
on" domain governor. However, the "always on" governor is only taken
into accout by runtime PM code paths, while the stay_on flag affects
all attempts to turn the given domain off. This is a problem for
domains that only need to stay in the "power on" state during system
sleep, but may be turned off by runtime PM if specific conditions are
satisfied.
For this reason, make SH7372 register a PM notifier that will enable
the checking of the domain stay_on flag on during system suspend and
disable it during system resume. This way, the stay_on flag will
only affect system sleep states, while the "always on" governor will
only affect runtime PM.
In addition to that, make sure that all domains which should be in
the "power on" state during system sleep are turned on beforehand, by
executing pm_genpd_poweron() for all of them.
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
---
arch/arm/mach-shmobile/pm-sh7372.c | 34 +++++++++++++++++++++++++++++++---
drivers/base/power/domain.c | 28 ++++++++++++++++++++--------
include/linux/pm_domain.h | 4 ++++
3 files changed, 55 insertions(+), 11 deletions(-)
Index: linux/arch/arm/mach-shmobile/pm-sh7372.c
=================================--- linux.orig/arch/arm/mach-shmobile/pm-sh7372.c
+++ linux/arch/arm/mach-shmobile/pm-sh7372.c
@@ -77,6 +77,8 @@
#ifdef CONFIG_PM
+static bool system_pm_transition;
+
static int pd_power_down(struct generic_pm_domain *genpd)
{
struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
@@ -85,8 +87,8 @@ static int pd_power_down(struct generic_
if (sh7372_pd->suspend)
sh7372_pd->suspend();
- if (sh7372_pd->stay_on)
- return 0;
+ if (system_pm_transition && sh7372_pd->stay_on)
+ return -EBUSY;
if (__raw_readl(PSTR) & mask) {
unsigned int retry_count;
@@ -113,7 +115,7 @@ static int __pd_power_up(struct sh7372_p
unsigned int retry_count;
int ret = 0;
- if (sh7372_pd->stay_on)
+ if (sh7372_pd->genpd.status != GPD_STATE_POWER_OFF)
goto out;
if (__raw_readl(PSTR) & mask)
@@ -506,9 +508,35 @@ static int sh7372_enter_suspend(suspend_
return 0;
}
+static void sh7372_pm_power_on_for_suspend(struct generic_pm_domain *genpd)
+{
+ struct sh7372_pm_domain *sh7372_pd = to_sh7372_pd(genpd);
+
+ if (sh7372_pd->stay_on)
+ pm_genpd_poweron(genpd);
+}
+
+static int sh7372_pm_notifier_fn(struct notifier_block *notifier,
+ unsigned long pm_event, void *unused)
+{
+ switch (pm_event) {
+ case PM_SUSPEND_PREPARE:
+ system_pm_transition = true;
+ pm_genpd_for_each_domain(sh7372_pm_power_on_for_suspend);
+ break;
+ case PM_POST_SUSPEND:
+ system_pm_transition = false;
+ pm_genpd_poweroff_unused();
+ break;
+ }
+
+ return NOTIFY_DONE;
+}
+
static void sh7372_suspend_init(void)
{
shmobile_suspend_ops.enter = sh7372_enter_suspend;
+ pm_notifier(sh7372_pm_notifier_fn, 0);
}
#else
static void sh7372_suspend_init(void) {}
Index: linux/drivers/base/power/domain.c
=================================--- linux.orig/drivers/base/power/domain.c
+++ linux/drivers/base/power/domain.c
@@ -243,6 +243,25 @@ int pm_genpd_poweron(struct generic_pm_d
return ret;
}
+/**
+ * pm_genpd_for_each_domain - Execute function for each generic PM domain.
+ * @fun: Function to execute.
+ */
+void pm_genpd_for_each_domain(void (*fun)(struct generic_pm_domain *))
+{
+ struct generic_pm_domain *genpd;
+
+ if (!fun)
+ return;
+
+ mutex_lock(&gpd_list_lock);
+
+ list_for_each_entry(genpd, &gpd_list, gpd_list_node)
+ fun(genpd);
+
+ mutex_unlock(&gpd_list_lock);
+}
+
#endif /* CONFIG_PM */
#ifdef CONFIG_PM_RUNTIME
@@ -598,14 +617,7 @@ static int pm_genpd_runtime_resume(struc
*/
void pm_genpd_poweroff_unused(void)
{
- struct generic_pm_domain *genpd;
-
- mutex_lock(&gpd_list_lock);
-
- list_for_each_entry(genpd, &gpd_list, gpd_list_node)
- genpd_queue_power_off_work(genpd);
-
- mutex_unlock(&gpd_list_lock);
+ pm_genpd_for_each_domain(genpd_queue_power_off_work);
}
#else
Index: linux/include/linux/pm_domain.h
=================================--- linux.orig/include/linux/pm_domain.h
+++ linux/include/linux/pm_domain.h
@@ -137,6 +137,7 @@ extern void pm_genpd_init(struct generic
struct dev_power_governor *gov, bool is_off);
extern int pm_genpd_poweron(struct generic_pm_domain *genpd);
+extern void pm_genpd_for_each_domain(void (*fun)(struct generic_pm_domain *));
extern bool default_stop_ok(struct device *dev);
@@ -189,6 +190,9 @@ static inline int pm_genpd_poweron(struc
{
return -ENOSYS;
}
+static inline void pm_genpd_for_each_domain(void (*fun)(struct generic_pm_domain *))
+{
+}
static inline bool default_stop_ok(struct device *dev)
{
return false;
^ permalink raw reply
* [PATCH 0/4] sh: div6 clock update for paul/common/clkfwk
From: Kuninori Morimoto @ 2011-12-05 6:25 UTC (permalink / raw)
To: linux-sh
Hi Paul, Magnus
These are div6 clock update patch set for paul/common/clkfwk
Kuninori Morimoto (4):
sh: clock-sh7723: add CLKDEV_ICK_ID for cleanup
sh: modify SH_CLK_DIV6_EXT macro parameter
sh: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
sh: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT()
#1 patch is not div6, but clean up patch.
#3, #4 try to use sh_clk_div6_reparent_register() for all div6 clock
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* [PATCH 1/4] sh: clock-sh7723: add CLKDEV_ICK_ID for cleanup
From: Kuninori Morimoto @ 2011-12-05 6:25 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 76 +++++--------------------------
1 files changed, 13 insertions(+), 63 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 3cc3827..f254166 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -233,73 +233,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
- {
- /* TMU0 */
- .dev_id = "sh_tmu.0",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU0],
- }, {
- /* TMU1 */
- .dev_id = "sh_tmu.1",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU0],
- }, {
- /* TMU2 */
- .dev_id = "sh_tmu.2",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU0],
- },
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
- {
- /* TMU3 */
- .dev_id = "sh_tmu.3",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU1],
- }, {
- /* TMU4 */
- .dev_id = "sh_tmu.4",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU1],
- }, {
- /* TMU5 */
- .dev_id = "sh_tmu.5",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU1],
- },
CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
- {
- /* SCIF0 */
- .dev_id = "sh-sci.0",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF0],
- }, {
- /* SCIF1 */
- .dev_id = "sh-sci.1",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF1],
- }, {
- /* SCIF2 */
- .dev_id = "sh-sci.2",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF2],
- }, {
- /* SCIF3 */
- .dev_id = "sh-sci.3",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF3],
- }, {
- /* SCIF4 */
- .dev_id = "sh-sci.4",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF4],
- }, {
- /* SCIF5 */
- .dev_id = "sh-sci.5",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF5],
- },
CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
@@ -324,6 +261,19 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
+
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
};
int __init arch_clk_init(void)
--
1.7.5.4
^ permalink raw reply related
* [PATCH 2/4] sh: modify SH_CLK_DIV6_EXT macro parameter
From: Kuninori Morimoto @ 2011-12-05 6:26 UTC (permalink / raw)
To: linux-sh
array size which can be calculated from specific table was removed,
and the "flags" which can use CLK_ENABLE_ON_INIT became last parameter.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/mach-shmobile/clock-sh7372.c | 9 +++------
arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 6 ++----
include/linux/sh_clk.h | 5 ++---
3 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index e349c22..bb7fe48 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -411,12 +411,9 @@ static struct clk *fsibckcr_parent[] = {
};
static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
- [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
- hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
- [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
- fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2),
- [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
- fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
+ [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, hdmi_parent, 6, 2, 0),
+ [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, fsiackcr_parent, 6, 2, 0),
+ [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, fsibckcr_parent, 6, 2, 0),
};
/* FSI DIV */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 7711838..4957ca4 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -189,10 +189,8 @@ static struct clk *fclkbcr_parent[] = {
};
static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
- [DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, 0,
- fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
- [DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, 0,
- fclkbcr_parent, ARRAY_SIZE(fclkbcr_parent), 6, 2),
+ [DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, fclkacr_parent, 6, 2, 0),
+ [DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, fclkbcr_parent, 6, 2, 0),
};
static struct clk mstp_clks[HWBLK_NR] = {
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index e834304..4d65540 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -131,13 +131,12 @@ int sh_clk_div4_enable_register(struct clk *clks, int nr,
int sh_clk_div4_reparent_register(struct clk *clks, int nr,
struct clk_div4_table *table);
-#define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \
- _num_parents, _src_shift, _src_width) \
+#define SH_CLK_DIV6_EXT(_reg, _parents, _src_shift, _src_width, _flags)\
{ \
.enable_reg = (void __iomem *)_reg, \
.flags = _flags, \
.parent_table = _parents, \
- .parent_num = _num_parents, \
+ .parent_num = ARRAY_SIZE(_parents), \
.src_shift = _src_shift, \
.src_width = _src_width, \
}
--
1.7.5.4
^ permalink raw reply related
* [PATCH 3/4] sh: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
From: Kuninori Morimoto @ 2011-12-05 6:26 UTC (permalink / raw)
To: linux-sh
Current div6 clocks can specify their current parent clocks
from its register value if it is registered
by sh_clk_div6_reparent_register().
This patch modifies all div6 clocks into SH_CLK_DIV6_EXT().
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/sh/include/cpu-sh4/cpu/sh7724.h | 1 +
arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 42 ++++++++++++++++++++-----------
2 files changed, 28 insertions(+), 15 deletions(-)
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index cbc47e6..36ce466 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -314,5 +314,6 @@ enum {
extern struct clk sh7724_fsimcka_clk;
extern struct clk sh7724_fsimckb_clk;
+extern struct clk sh7724_dv_clki;
#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 4957ca4..a374cbc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -111,13 +111,16 @@ static struct clk div3_clk = {
.parent = &pll_clk,
};
-/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
+/* External input clock (pin name: FSIMCKA/FSIMCKB/DV_CLKI ) */
struct clk sh7724_fsimcka_clk = {
};
struct clk sh7724_fsimckb_clk = {
};
+struct clk sh7724_dv_clki = {
+};
+
static struct clk *main_clks[] = {
&r_clk,
&extal_clk,
@@ -126,6 +129,7 @@ static struct clk *main_clks[] = {
&div3_clk,
&sh7724_fsimcka_clk,
&sh7724_fsimckb_clk,
+ &sh7724_dv_clki,
};
static void div4_kick(struct clk *clk)
@@ -163,17 +167,25 @@ struct clk div4_clks[DIV4_NR] = {
[DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
};
-enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
+enum { DIV6_V, DIV6_I, DIV6_S, DIV6_FA, DIV6_FB, DIV6_NR };
-static struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
- [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
- [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
+/* Indices are important - they are the actual src selecting values */
+static struct clk *common_parent[] = {
+ [0] = &div3_clk,
+ [1] = NULL,
};
-enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
+static struct clk *vclkcr_parent[] = {
+ [0] = &div3_clk,
+ [1] = NULL,
+ [2] = &sh7724_dv_clki,
+ [3] = NULL,
+ [4] = &extal_clk,
+ [5] = NULL,
+ [6] = NULL,
+ [7] = NULL,
+};
-/* Indices are important - they are the actual src selecting values */
static struct clk *fclkacr_parent[] = {
[0] = &div3_clk,
[1] = NULL,
@@ -188,7 +200,10 @@ static struct clk *fclkbcr_parent[] = {
[3] = NULL,
};
-static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
+static struct clk div6_clks[DIV6_NR] = {
+ [DIV6_V] = SH_CLK_DIV6_EXT(VCLKCR, vclkcr_parent, 12, 3, 0),
+ [DIV6_I] = SH_CLK_DIV6_EXT(IRDACLKCR, common_parent, 6, 1, 0),
+ [DIV6_S] = SH_CLK_DIV6_EXT(SPUCLKCR, common_parent, 6, 1, CLK_ENABLE_ON_INIT),
[DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, fclkacr_parent, 6, 2, 0),
[DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, fclkbcr_parent, 6, 2, 0),
};
@@ -267,8 +282,8 @@ static struct clk_lookup lookups[] = {
/* DIV6 clocks */
CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
- CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
- CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
+ CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
+ CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
@@ -354,10 +369,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
- if (!ret)
- ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
+ ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
--
1.7.5.4
^ permalink raw reply related
* [PATCH 4/4] sh: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT()
From: Kuninori Morimoto @ 2011-12-05 6:32 UTC (permalink / raw)
To: linux-sh
Current div6 clocks can specify their current parent clocks
from its register value if it is registered
by sh_clk_div6_reparent_register().
This patch modifies all div6 clocks into SH_CLK_DIV6_EXT().
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
arch/arm/mach-shmobile/clock-sh73a0.c | 132 +++++++++++++++++++++-----
arch/arm/mach-shmobile/include/mach/common.h | 2 +
2 files changed, 112 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846b..8daf21a 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -92,6 +92,24 @@ static struct clk_ops div2_clk_ops = {
.recalc = div2_recalc,
};
+static unsigned long div7_recalc(struct clk *clk)
+{
+ return clk->parent->rate / 7;
+}
+
+static struct clk_ops div7_clk_ops = {
+ .recalc = div7_recalc,
+};
+
+static unsigned long div13_recalc(struct clk *clk)
+{
+ return clk->parent->rate / 13;
+}
+
+static struct clk_ops div13_clk_ops = {
+ .recalc = div13_recalc,
+};
+
/* Divide extal1 by two */
static struct clk extal1_div2_clk = {
.ops = &div2_clk_ops,
@@ -113,6 +131,11 @@ static struct clk main_clk = {
.ops = &main_clk_ops,
};
+static struct clk main_div2_clk = {
+ .ops = &div2_clk_ops,
+ .parent = &main_clk,
+};
+
/* PLL0, PLL1, PLL2, PLL3 */
static unsigned long pll_recalc(struct clk *clk)
{
@@ -168,12 +191,29 @@ static struct clk pll3_clk = {
.enable_bit = 3,
};
-/* Divide PLL1 by two */
+/* Divide PLL */
static struct clk pll1_div2_clk = {
.ops = &div2_clk_ops,
.parent = &pll1_clk,
};
+static struct clk pll1_div7_clk = {
+ .ops = &div7_clk_ops,
+ .parent = &pll1_clk,
+};
+
+static struct clk pll1_div13_clk = {
+ .ops = &div13_clk_ops,
+ .parent = &pll1_clk,
+};
+
+/* External input clock */
+struct clk sh73a0_extcki_clk = {
+};
+
+struct clk sh73a0_extalr_clk = {
+};
+
static struct clk *main_clks[] = {
&r_clk,
&sh73a0_extal1_clk,
@@ -181,11 +221,16 @@ static struct clk *main_clks[] = {
&extal1_div2_clk,
&extal2_div2_clk,
&main_clk,
+ &main_div2_clk,
&pll0_clk,
&pll1_clk,
&pll2_clk,
&pll3_clk,
&pll1_div2_clk,
+ &pll1_div7_clk,
+ &pll1_div13_clk,
+ &sh73a0_extcki_clk,
+ &sh73a0_extalr_clk,
};
static void div4_kick(struct clk *clk)
@@ -239,27 +284,70 @@ enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
DIV6_NR };
+static struct clk *vck_parent[] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &sh73a0_extcki_clk,
+ [3] = &sh73a0_extal2_clk,
+ [4] = &main_div2_clk,
+ [5] = &sh73a0_extalr_clk,
+ [6] = &main_clk,
+ [7] = NULL,
+};
+
+static struct clk *pll_parent[] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &pll1_div13_clk,
+ [3] = NULL,
+};
+
+static struct clk *hsi_parent[] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &pll1_div7_clk,
+ [3] = NULL,
+};
+
+static struct clk *pll_extal2_parent[] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &sh73a0_extal2_clk,
+ [3] = &sh73a0_extal2_clk,
+};
+
+static struct clk *dsi_parent[] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &main_clk,
+ [3] = &sh73a0_extal2_clk,
+ [4] = &sh73a0_extcki_clk,
+ [5] = NULL,
+ [6] = NULL,
+ [7] = NULL,
+};
+
static struct clk div6_clks[DIV6_NR] = {
- [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
- [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
- [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
- [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0),
- [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
- [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
- [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
- [DIV6_SDHI2] = SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0),
- [DIV6_FSIA] = SH_CLK_DIV6(&pll1_div2_clk, FSIACKCR, 0),
- [DIV6_FSIB] = SH_CLK_DIV6(&pll1_div2_clk, FSIBCKCR, 0),
- [DIV6_SUB] = SH_CLK_DIV6(&sh73a0_extal2_clk, SUBCKCR, 0),
- [DIV6_SPUA] = SH_CLK_DIV6(&pll1_div2_clk, SPUACKCR, 0),
- [DIV6_SPUV] = SH_CLK_DIV6(&pll1_div2_clk, SPUVCKCR, 0),
- [DIV6_MSU] = SH_CLK_DIV6(&pll1_div2_clk, MSUCKCR, 0),
- [DIV6_HSI] = SH_CLK_DIV6(&pll1_div2_clk, HSICKCR, 0),
- [DIV6_MFG1] = SH_CLK_DIV6(&pll1_div2_clk, MFCK1CR, 0),
- [DIV6_MFG2] = SH_CLK_DIV6(&pll1_div2_clk, MFCK2CR, 0),
- [DIV6_DSIT] = SH_CLK_DIV6(&pll1_div2_clk, DSITCKCR, 0),
- [DIV6_DSI0P] = SH_CLK_DIV6(&pll1_div2_clk, DSI0PCKCR, 0),
- [DIV6_DSI1P] = SH_CLK_DIV6(&pll1_div2_clk, DSI1PCKCR, 0),
+ [DIV6_VCK1] = SH_CLK_DIV6_EXT(VCLKCR1, vck_parent, 12, 3, 0),
+ [DIV6_VCK2] = SH_CLK_DIV6_EXT(VCLKCR2, vck_parent, 12, 3, 0),
+ [DIV6_VCK3] = SH_CLK_DIV6_EXT(VCLKCR3, vck_parent, 12, 3, 0),
+ [DIV6_ZB1] = SH_CLK_DIV6_EXT(ZBCKCR, pll_parent, 7, 1, 0),
+ [DIV6_FLCTL] = SH_CLK_DIV6_EXT(FLCKCR, pll_parent, 7, 1, 0),
+ [DIV6_SDHI0] = SH_CLK_DIV6_EXT(SD0CKCR, pll_parent, 6, 2, 0),
+ [DIV6_SDHI1] = SH_CLK_DIV6_EXT(SD1CKCR, pll_parent, 6, 2, 0),
+ [DIV6_SDHI2] = SH_CLK_DIV6_EXT(SD2CKCR, pll_parent, 6, 2, 0),
+ [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, pll_parent, 6, 1, 0),
+ [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, pll_parent, 6, 1, 0),
+ [DIV6_SUB] = SH_CLK_DIV6_EXT(SUBCKCR, pll_extal2_parent, 6, 2, 0),
+ [DIV6_SPUA] = SH_CLK_DIV6_EXT(SPUACKCR, pll_extal2_parent, 6, 2, 0),
+ [DIV6_SPUV] = SH_CLK_DIV6_EXT(SPUVCKCR, pll_extal2_parent, 6, 2, 0),
+ [DIV6_MSU] = SH_CLK_DIV6_EXT(MSUCKCR, pll_parent, 7, 1, 0),
+ [DIV6_HSI] = SH_CLK_DIV6_EXT(HSICKCR, hsi_parent, 6, 2, 0),
+ [DIV6_MFG1] = SH_CLK_DIV6_EXT(MFCK1CR, pll_parent, 7, 1, 0),
+ [DIV6_MFG2] = SH_CLK_DIV6_EXT(MFCK2CR, pll_parent, 7, 1, 0),
+ [DIV6_DSIT] = SH_CLK_DIV6_EXT(DSITCKCR, pll_parent, 7, 1, 0),
+ [DIV6_DSI0P] = SH_CLK_DIV6_EXT(DSI0PCKCR, dsi_parent, 12, 3, 0),
+ [DIV6_DSI1P] = SH_CLK_DIV6_EXT(DSI1PCKCR, dsi_parent, 12, 3, 0),
};
enum { MSTP001,
@@ -387,7 +475,7 @@ void __init sh73a0_clock_init(void)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+ ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 834bd6c..d055d05 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -47,6 +47,8 @@ extern void sh73a0_clock_init(void);
extern void sh73a0_pinmux_init(void);
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
+extern struct clk sh73a0_extcki_clk;
+extern struct clk sh73a0_extalr_clk;
extern unsigned int sh73a0_get_core_count(void);
extern void sh73a0_secondary_init(unsigned int cpu);
--
1.7.5.4
^ permalink raw reply related
* Re: [PATCH-RFC 09/10] sh: switch to GENERIC_PCI_IOMAP
From: Paul Mundt @ 2011-12-06 5:08 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <20111204104858.GK15464@redhat.com>
On Sun, Dec 04, 2011 at 12:48:59PM +0200, Michael S. Tsirkin wrote:
> On Thu, Nov 24, 2011 at 10:20:37PM +0200, Michael S. Tsirkin wrote:
> > sh copied pci_iomap from generic code, probably to avoid
> > pulling the rest of iomap.c in. Since that's in
> > a separate file now, we can reuse the common implementation.
> >
> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
>
> Sorry to nag, any ACKs/NACKs on the sh changes?
> I intend to send this to Linus if there are no
> objections. Thanks!
>
Nope, looks fine to me.
Acked-by: Paul Mundt <lethal@linux-sh.org>
^ permalink raw reply
* Re: [PATCH 2/4] sh: modify SH_CLK_DIV6_EXT macro parameter
From: Paul Mundt @ 2011-12-06 5:22 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <874nxf8rgh.wl%kuninori.morimoto.gx@renesas.com>
On Sun, Dec 04, 2011 at 10:26:09PM -0800, Kuninori Morimoto wrote:
> array size which can be calculated from specific table was removed,
> and the "flags" which can use CLK_ENABLE_ON_INIT became last parameter.
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
It can, but no, I don't really like these sorts of changes. From a usage
point of view it might look more straightforward but in reality it's just
pushing down complexity in to the macro that's non-obvious without
manually going and looking at the macro definition.
Saving a bit of screen real-estate isn't worth the hassle of having to
track down macro definitions to find out what exactly they're doing.
^ permalink raw reply
* Re: [PATCH 1/4] sh: clock-sh7723: add CLKDEV_ICK_ID for cleanup
From: Paul Mundt @ 2011-12-06 5:23 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <8762hv8rh3.wl%kuninori.morimoto.gx@renesas.com>
On Sun, Dec 04, 2011 at 10:25:48PM -0800, Kuninori Morimoto wrote:
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> ---
> arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 76 +++++--------------------------
> 1 files changed, 13 insertions(+), 63 deletions(-)
>
This one looks fine.
^ permalink raw reply
* Re: [PATCH 3/4] sh: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
From: Paul Mundt @ 2011-12-06 5:25 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <8739cz8rfx.wl%kuninori.morimoto.gx@renesas.com>
On Sun, Dec 04, 2011 at 10:26:30PM -0800, Kuninori Morimoto wrote:
> -static struct clk div6_clks[DIV6_NR] = {
> - [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
> - [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
> - [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
> +/* Indices are important - they are the actual src selecting values */
> +static struct clk *common_parent[] = {
> + [0] = &div3_clk,
> + [1] = NULL,
> };
>
> -enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
> +static struct clk *vclkcr_parent[] = {
> + [0] = &div3_clk,
> + [1] = NULL,
> + [2] = &sh7724_dv_clki,
> + [3] = NULL,
> + [4] = &extal_clk,
> + [5] = NULL,
> + [6] = NULL,
> + [7] = NULL,
> +};
>
You don't really need any of these NULL initializers, they can all be
dropped.
^ permalink raw reply
* Re: [PATCH 4/4] sh: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT()
From: Paul Mundt @ 2011-12-06 5:26 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <871usj8r6b.wl%kuninori.morimoto.gx@renesas.com>
On Sun, Dec 04, 2011 at 10:32:16PM -0800, Kuninori Morimoto wrote:
> Current div6 clocks can specify their current parent clocks
> from its register value if it is registered
> by sh_clk_div6_reparent_register().
> This patch modifies all div6 clocks into SH_CLK_DIV6_EXT().
>
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
This one looks fine too, although it will need to be respun to not depend
on 2/4.
^ permalink raw reply
* Re: [PATCH 2/4] sh: modify SH_CLK_DIV6_EXT macro parameter
From: Kuninori Morimoto @ 2011-12-06 5:38 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <874nxf8rgh.wl%kuninori.morimoto.gx@renesas.com>
Hi Paul
Thank you for checking patch
> On Sun, Dec 04, 2011 at 10:26:09PM -0800, Kuninori Morimoto wrote:
> > array size which can be calculated from specific table was removed,
> > and the "flags" which can use CLK_ENABLE_ON_INIT became last parameter.
> >
> > Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>
> It can, but no, I don't really like these sorts of changes. From a usage
> point of view it might look more straightforward but in reality it's just
> pushing down complexity in to the macro that's non-obvious without
> manually going and looking at the macro definition.
>
> Saving a bit of screen real-estate isn't worth the hassle of having to
> track down macro definitions to find out what exactly they're doing.
OK. I understand.
I re-send v2 patch.
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* Re: [PATCH 3/4] sh: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
From: Kuninori Morimoto @ 2011-12-06 5:47 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <8739cz8rfx.wl%kuninori.morimoto.gx@renesas.com>
Hi Paul
> On Sun, Dec 04, 2011 at 10:26:30PM -0800, Kuninori Morimoto wrote:
> > -static struct clk div6_clks[DIV6_NR] = {
> > - [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
> > - [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
> > - [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
> > +/* Indices are important - they are the actual src selecting values */
> > +static struct clk *common_parent[] = {
> > + [0] = &div3_clk,
> > + [1] = NULL,
> > };
> >
> > -enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
> > +static struct clk *vclkcr_parent[] = {
> > + [0] = &div3_clk,
> > + [1] = NULL,
> > + [2] = &sh7724_dv_clki,
> > + [3] = NULL,
> > + [4] = &extal_clk,
> > + [5] = NULL,
> > + [6] = NULL,
> > + [7] = NULL,
> > +};
> >
> You don't really need any of these NULL initializers, they can all be
> dropped.
Hmm...
Then, I can not use ARRAY_SIZE(vclkcr_parent) ?
Best regards
---
Kuninori Morimoto
^ permalink raw reply
* Re: [PATCH 3/4] sh: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
From: Paul Mundt @ 2011-12-06 5:51 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <8739cz8rfx.wl%kuninori.morimoto.gx@renesas.com>
On Mon, Dec 05, 2011 at 09:47:17PM -0800, Kuninori Morimoto wrote:
> > On Sun, Dec 04, 2011 at 10:26:30PM -0800, Kuninori Morimoto wrote:
> > > -static struct clk div6_clks[DIV6_NR] = {
> > > - [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
> > > - [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
> > > - [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
> > > +/* Indices are important - they are the actual src selecting values */
> > > +static struct clk *common_parent[] = {
> > > + [0] = &div3_clk,
> > > + [1] = NULL,
> > > };
> > >
> > > -enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
> > > +static struct clk *vclkcr_parent[] = {
> > > + [0] = &div3_clk,
> > > + [1] = NULL,
> > > + [2] = &sh7724_dv_clki,
> > > + [3] = NULL,
> > > + [4] = &extal_clk,
> > > + [5] = NULL,
> > > + [6] = NULL,
> > > + [7] = NULL,
> > > +};
> > >
> > You don't really need any of these NULL initializers, they can all be
> > dropped.
>
> Hmm...
> Then, I can not use ARRAY_SIZE(vclkcr_parent) ?
>
You can just initialize the array size. There's nothing wrong with having
a vclkcr_parent[8] or some _NR define to that extent as part of the
initializer, even if you're just partially initializing the elements.
^ permalink raw reply
* Re: [PATCH v2 0/4] sh: div6 clock update for paul/common/clkfwk
From: kuninori.morimoto.gx @ 2011-12-06 6:25 UTC (permalink / raw)
To: linux-sh
Hi Paul, Magnus
These are v2 div6 clock update patch set for paul/common/clkfwk
Kuninori Morimoto (3):
sh: clock-sh7723: add CLKDEV_ICK_ID for cleanup
sh: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
sh: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT()
v1 -> v2
drop "sh: modify SH_CLK_DIV6_EXT macro parameter" patch.
^ permalink raw reply
* [PATCH v2 1/3] sh: clock-sh7723: add CLKDEV_ICK_ID for cleanup
From: Kuninori Morimoto @ 2011-12-06 6:26 UTC (permalink / raw)
To: linux-sh
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
v1 -> v2
- same as v1
arch/sh/kernel/cpu/sh4a/clock-sh7723.c | 76 +++++--------------------------
1 files changed, 13 insertions(+), 63 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 3cc3827..f254166 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -233,73 +233,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
- {
- /* TMU0 */
- .dev_id = "sh_tmu.0",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU0],
- }, {
- /* TMU1 */
- .dev_id = "sh_tmu.1",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU0],
- }, {
- /* TMU2 */
- .dev_id = "sh_tmu.2",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU0],
- },
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_CON_ID("dmac1", &mstp_clks[HWBLK_DMAC1]),
- {
- /* TMU3 */
- .dev_id = "sh_tmu.3",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU1],
- }, {
- /* TMU4 */
- .dev_id = "sh_tmu.4",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU1],
- }, {
- /* TMU5 */
- .dev_id = "sh_tmu.5",
- .con_id = "tmu_fck",
- .clk = &mstp_clks[HWBLK_TMU1],
- },
CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
- {
- /* SCIF0 */
- .dev_id = "sh-sci.0",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF0],
- }, {
- /* SCIF1 */
- .dev_id = "sh-sci.1",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF1],
- }, {
- /* SCIF2 */
- .dev_id = "sh-sci.2",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF2],
- }, {
- /* SCIF3 */
- .dev_id = "sh-sci.3",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF3],
- }, {
- /* SCIF4 */
- .dev_id = "sh-sci.4",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF4],
- }, {
- /* SCIF5 */
- .dev_id = "sh-sci.5",
- .con_id = "sci_fck",
- .clk = &mstp_clks[HWBLK_SCIF5],
- },
CLKDEV_CON_ID("msiof0", &mstp_clks[HWBLK_MSIOF0]),
CLKDEV_CON_ID("msiof1", &mstp_clks[HWBLK_MSIOF1]),
CLKDEV_CON_ID("meram0", &mstp_clks[HWBLK_MERAM]),
@@ -324,6 +261,19 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]),
+
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
+ CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[HWBLK_SCIF3]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[HWBLK_SCIF4]),
+ CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[HWBLK_SCIF5]),
};
int __init arch_clk_init(void)
--
1.7.5.4
^ permalink raw reply related
* [PATCH v2 2/3] sh: clkfwk: clock-sh7724: all div6_clks use SH_CLK_DIV6_EXT()
From: Kuninori Morimoto @ 2011-12-06 6:28 UTC (permalink / raw)
To: linux-sh
Current div6 clocks can specify their current parent clocks
from its register value if it is registered
by sh_clk_div6_reparent_register().
This patch modifies all div6 clocks into SH_CLK_DIV6_EXT().
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
v1 -> v2
- normal SH_CLK_DIV6_EXT() macro
- drop un-needed NULL from clock parent table, and add array size in table
arch/sh/include/cpu-sh4/cpu/sh7724.h | 1 +
arch/sh/kernel/cpu/sh4a/clock-sh7724.c | 40 ++++++++++++++++++++------------
2 files changed, 26 insertions(+), 15 deletions(-)
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index cbc47e6..36ce466 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -314,5 +314,6 @@ enum {
extern struct clk sh7724_fsimcka_clk;
extern struct clk sh7724_fsimckb_clk;
+extern struct clk sh7724_dv_clki;
#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 7711838..9ee4b36 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -111,13 +111,16 @@ static struct clk div3_clk = {
.parent = &pll_clk,
};
-/* External input clock (pin name: FSIMCKA/FSIMCKB ) */
+/* External input clock (pin name: FSIMCKA/FSIMCKB/DV_CLKI ) */
struct clk sh7724_fsimcka_clk = {
};
struct clk sh7724_fsimckb_clk = {
};
+struct clk sh7724_dv_clki = {
+};
+
static struct clk *main_clks[] = {
&r_clk,
&extal_clk,
@@ -126,6 +129,7 @@ static struct clk *main_clks[] = {
&div3_clk,
&sh7724_fsimcka_clk,
&sh7724_fsimckb_clk,
+ &sh7724_dv_clki,
};
static void div4_kick(struct clk *clk)
@@ -163,17 +167,20 @@ struct clk div4_clks[DIV4_NR] = {
[DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
};
-enum { DIV6_V, DIV6_I, DIV6_S, DIV6_NR };
+enum { DIV6_V, DIV6_I, DIV6_S, DIV6_FA, DIV6_FB, DIV6_NR };
-static struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
- [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
- [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
+/* Indices are important - they are the actual src selecting values */
+static struct clk *common_parent[] = {
+ [0] = &div3_clk,
+ [1] = NULL,
};
-enum { DIV6_FA, DIV6_FB, DIV6_REPARENT_NR };
+static struct clk *vclkcr_parent[8] = {
+ [0] = &div3_clk,
+ [2] = &sh7724_dv_clki,
+ [4] = &extal_clk,
+};
-/* Indices are important - they are the actual src selecting values */
static struct clk *fclkacr_parent[] = {
[0] = &div3_clk,
[1] = NULL,
@@ -188,7 +195,13 @@ static struct clk *fclkbcr_parent[] = {
[3] = NULL,
};
-static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
+static struct clk div6_clks[DIV6_NR] = {
+ [DIV6_V] = SH_CLK_DIV6_EXT(VCLKCR, 0,
+ vclkcr_parent, ARRAY_SIZE(vclkcr_parent), 12, 3),
+ [DIV6_I] = SH_CLK_DIV6_EXT(IRDACLKCR, 0,
+ common_parent, ARRAY_SIZE(common_parent), 6, 1),
+ [DIV6_S] = SH_CLK_DIV6_EXT(SPUCLKCR, CLK_ENABLE_ON_INIT,
+ common_parent, ARRAY_SIZE(common_parent), 6, 1),
[DIV6_FA] = SH_CLK_DIV6_EXT(FCLKACR, 0,
fclkacr_parent, ARRAY_SIZE(fclkacr_parent), 6, 2),
[DIV6_FB] = SH_CLK_DIV6_EXT(FCLKBCR, 0,
@@ -269,8 +282,8 @@ static struct clk_lookup lookups[] = {
/* DIV6 clocks */
CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
- CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FA]),
- CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FB]),
+ CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FA]),
+ CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FB]),
CLKDEV_CON_ID("irda_clk", &div6_clks[DIV6_I]),
CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_S]),
@@ -356,10 +369,7 @@ int __init arch_clk_init(void)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
- if (!ret)
- ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
+ ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);
--
1.7.5.4
^ permalink raw reply related
* [PATCH v2 3/3] sh: clkfwk: clock-sh73a0: all div6_clks use SH_CLK_DIV6_EXT()
From: Kuninori Morimoto @ 2011-12-06 6:29 UTC (permalink / raw)
To: linux-sh
Current div6 clocks can specify their current parent clocks
from its register value if it is registered
by sh_clk_div6_reparent_register().
This patch modifies all div6 clocks into SH_CLK_DIV6_EXT().
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
v1 -> v2
- normal SH_CLK_DIV6_EXT()
- drop un-needed NULL from clock parent table, and add array size for table
arch/arm/mach-shmobile/clock-sh73a0.c | 146 ++++++++++++++++++++++----
arch/arm/mach-shmobile/include/mach/common.h | 2 +
2 files changed, 126 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 61a846b..8ea8c81 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -92,6 +92,24 @@ static struct clk_ops div2_clk_ops = {
.recalc = div2_recalc,
};
+static unsigned long div7_recalc(struct clk *clk)
+{
+ return clk->parent->rate / 7;
+}
+
+static struct clk_ops div7_clk_ops = {
+ .recalc = div7_recalc,
+};
+
+static unsigned long div13_recalc(struct clk *clk)
+{
+ return clk->parent->rate / 13;
+}
+
+static struct clk_ops div13_clk_ops = {
+ .recalc = div13_recalc,
+};
+
/* Divide extal1 by two */
static struct clk extal1_div2_clk = {
.ops = &div2_clk_ops,
@@ -113,6 +131,11 @@ static struct clk main_clk = {
.ops = &main_clk_ops,
};
+static struct clk main_div2_clk = {
+ .ops = &div2_clk_ops,
+ .parent = &main_clk,
+};
+
/* PLL0, PLL1, PLL2, PLL3 */
static unsigned long pll_recalc(struct clk *clk)
{
@@ -168,12 +191,29 @@ static struct clk pll3_clk = {
.enable_bit = 3,
};
-/* Divide PLL1 by two */
+/* Divide PLL */
static struct clk pll1_div2_clk = {
.ops = &div2_clk_ops,
.parent = &pll1_clk,
};
+static struct clk pll1_div7_clk = {
+ .ops = &div7_clk_ops,
+ .parent = &pll1_clk,
+};
+
+static struct clk pll1_div13_clk = {
+ .ops = &div13_clk_ops,
+ .parent = &pll1_clk,
+};
+
+/* External input clock */
+struct clk sh73a0_extcki_clk = {
+};
+
+struct clk sh73a0_extalr_clk = {
+};
+
static struct clk *main_clks[] = {
&r_clk,
&sh73a0_extal1_clk,
@@ -181,11 +221,16 @@ static struct clk *main_clks[] = {
&extal1_div2_clk,
&extal2_div2_clk,
&main_clk,
+ &main_div2_clk,
&pll0_clk,
&pll1_clk,
&pll2_clk,
&pll3_clk,
&pll1_div2_clk,
+ &pll1_div7_clk,
+ &pll1_div13_clk,
+ &sh73a0_extcki_clk,
+ &sh73a0_extalr_clk,
};
static void div4_kick(struct clk *clk)
@@ -239,27 +284,84 @@ enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1,
DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
DIV6_NR };
+static struct clk *vck_parent[8] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &sh73a0_extcki_clk,
+ [3] = &sh73a0_extal2_clk,
+ [4] = &main_div2_clk,
+ [5] = &sh73a0_extalr_clk,
+ [6] = &main_clk,
+};
+
+static struct clk *pll_parent[4] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &pll1_div13_clk,
+};
+
+static struct clk *hsi_parent[4] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &pll1_div7_clk,
+};
+
+static struct clk *pll_extal2_parent[] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &sh73a0_extal2_clk,
+ [3] = &sh73a0_extal2_clk,
+};
+
+static struct clk *dsi_parent[8] = {
+ [0] = &pll1_div2_clk,
+ [1] = &pll2_clk,
+ [2] = &main_clk,
+ [3] = &sh73a0_extal2_clk,
+ [4] = &sh73a0_extcki_clk,
+};
+
static struct clk div6_clks[DIV6_NR] = {
- [DIV6_VCK1] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR1, 0),
- [DIV6_VCK2] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR2, 0),
- [DIV6_VCK3] = SH_CLK_DIV6(&pll1_div2_clk, VCLKCR3, 0),
- [DIV6_ZB1] = SH_CLK_DIV6(&pll1_div2_clk, ZBCKCR, 0),
- [DIV6_FLCTL] = SH_CLK_DIV6(&pll1_div2_clk, FLCKCR, 0),
- [DIV6_SDHI0] = SH_CLK_DIV6(&pll1_div2_clk, SD0CKCR, 0),
- [DIV6_SDHI1] = SH_CLK_DIV6(&pll1_div2_clk, SD1CKCR, 0),
- [DIV6_SDHI2] = SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0),
- [DIV6_FSIA] = SH_CLK_DIV6(&pll1_div2_clk, FSIACKCR, 0),
- [DIV6_FSIB] = SH_CLK_DIV6(&pll1_div2_clk, FSIBCKCR, 0),
- [DIV6_SUB] = SH_CLK_DIV6(&sh73a0_extal2_clk, SUBCKCR, 0),
- [DIV6_SPUA] = SH_CLK_DIV6(&pll1_div2_clk, SPUACKCR, 0),
- [DIV6_SPUV] = SH_CLK_DIV6(&pll1_div2_clk, SPUVCKCR, 0),
- [DIV6_MSU] = SH_CLK_DIV6(&pll1_div2_clk, MSUCKCR, 0),
- [DIV6_HSI] = SH_CLK_DIV6(&pll1_div2_clk, HSICKCR, 0),
- [DIV6_MFG1] = SH_CLK_DIV6(&pll1_div2_clk, MFCK1CR, 0),
- [DIV6_MFG2] = SH_CLK_DIV6(&pll1_div2_clk, MFCK2CR, 0),
- [DIV6_DSIT] = SH_CLK_DIV6(&pll1_div2_clk, DSITCKCR, 0),
- [DIV6_DSI0P] = SH_CLK_DIV6(&pll1_div2_clk, DSI0PCKCR, 0),
- [DIV6_DSI1P] = SH_CLK_DIV6(&pll1_div2_clk, DSI1PCKCR, 0),
+ [DIV6_VCK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
+ vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
+ [DIV6_VCK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
+ vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
+ [DIV6_VCK3] = SH_CLK_DIV6_EXT(VCLKCR3, 0,
+ vck_parent, ARRAY_SIZE(vck_parent), 12, 3),
+ [DIV6_ZB1] = SH_CLK_DIV6_EXT(ZBCKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
+ [DIV6_FLCTL] = SH_CLK_DIV6_EXT(FLCKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
+ [DIV6_SDHI0] = SH_CLK_DIV6_EXT(SD0CKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
+ [DIV6_SDHI1] = SH_CLK_DIV6_EXT(SD1CKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
+ [DIV6_SDHI2] = SH_CLK_DIV6_EXT(SD2CKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 6, 2),
+ [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 6, 1),
+ [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 6, 1),
+ [DIV6_SUB] = SH_CLK_DIV6_EXT(SUBCKCR, 0,
+ pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
+ [DIV6_SPUA] = SH_CLK_DIV6_EXT(SPUACKCR, 0,
+ pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
+ [DIV6_SPUV] = SH_CLK_DIV6_EXT(SPUVCKCR, 0,
+ pll_extal2_parent, ARRAY_SIZE(pll_extal2_parent), 6, 2),
+ [DIV6_MSU] = SH_CLK_DIV6_EXT(MSUCKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
+ [DIV6_HSI] = SH_CLK_DIV6_EXT(HSICKCR, 0,
+ hsi_parent, ARRAY_SIZE(hsi_parent), 6, 2),
+ [DIV6_MFG1] = SH_CLK_DIV6_EXT(MFCK1CR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
+ [DIV6_MFG2] = SH_CLK_DIV6_EXT(MFCK2CR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
+ [DIV6_DSIT] = SH_CLK_DIV6_EXT(DSITCKCR, 0,
+ pll_parent, ARRAY_SIZE(pll_parent), 7, 1),
+ [DIV6_DSI0P] = SH_CLK_DIV6_EXT(DSI0PCKCR, 0,
+ dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
+ [DIV6_DSI1P] = SH_CLK_DIV6_EXT(DSI1PCKCR, 0,
+ dsi_parent, ARRAY_SIZE(dsi_parent), 12, 3),
};
enum { MSTP001,
@@ -387,7 +489,7 @@ void __init sh73a0_clock_init(void)
ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
if (!ret)
- ret = sh_clk_div6_register(div6_clks, DIV6_NR);
+ ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
if (!ret)
ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 834bd6c..d055d05 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -47,6 +47,8 @@ extern void sh73a0_clock_init(void);
extern void sh73a0_pinmux_init(void);
extern struct clk sh73a0_extal1_clk;
extern struct clk sh73a0_extal2_clk;
+extern struct clk sh73a0_extcki_clk;
+extern struct clk sh73a0_extalr_clk;
extern unsigned int sh73a0_get_core_count(void);
extern void sh73a0_secondary_init(unsigned int cpu);
--
1.7.5.4
^ permalink raw reply related
* [PATCH 00/07] ARM: mach-shmobile: r8a7779 and Marzen prototype V1
From: Magnus Damm @ 2011-12-06 16:51 UTC (permalink / raw)
To: linux-sh
ARM: mach-shmobile: r8a7779 and Marzen prototype V1
[PATCH 01/07] ARM: mach-shmobile: Marzen mach-type entry
[PATCH 02/07] sh: CPG MSTP ioremap() prototype hack
[PATCH 03/07] ARM: mach-shmobile: r8a7779 and Marzen base support
[PATCH 04/07] ARM: mach-shmobile: Marzen early console hack
[PATCH 05/07] ARM: mach-shmobile: r8a7779 PFC GPIO-only prototype
[PATCH 06/07] ARM: mach-shmobile: r8a7779 PFC ioremap() workaround
[PATCH 07/07] ARM: mach-shmobile: Marzen GPIO LED test code
On the SoC-level simple things like the SCIF console, the TMU timer,
the GIC interrupt controller, initial CPG clock framework code and
and GPIO-only PFC support are implemented. On the Marzen board the
only code for now is support for LED2, LED3 and LED4. The LEDs are
used to test the GPIO-only PFC and can be toggled from user space.
On the immediate todo is:
- Rewrite [PATCH 02/07] and submit separately
- Add ioremap() support to drivers/sh/pfc.c and drop [PATCH 06/07]
- Add variable bit field length to drivers/sh/pfc.c
- Update r8a7779 PFC code to support GPIO_FN (needs variable bit field)
List of things I'm not going to touch this week:
- r8a7779 clock framework (Special gift for Morimoto-san)
- r8a7779 external IRQ pin support (INTC2 sits between IRQ pins and GIC)
- Marzen LAN89218 support (hooked up to EX_CS0/GP_0_15 and IRQ1_B/GP_4_14)
Not-yet-signed-off-by: Magnus Damm <damm@opensource.se>
---
Do not merge - patches will be updated in the near future.
Will most likely clash with A1 support written by Morimoto-san.
Built on top of linus rc- git with Kota2 patches destined for -rc.
arch/arm/mach-shmobile/Kconfig | 12
arch/arm/mach-shmobile/Makefile | 4
arch/arm/mach-shmobile/board-marzen.c | 133 ++++++
arch/arm/mach-shmobile/clock-r8a7779.c | 105 +++++
arch/arm/mach-shmobile/include/mach/common.h | 6
arch/arm/mach-shmobile/include/mach/r8a7779.h | 69 +++
arch/arm/mach-shmobile/intc-r8a7779.c | 58 ++
arch/arm/mach-shmobile/pfc-r8a7779.c | 494 +++++++++++++++++++++++--
arch/arm/mach-shmobile/setup-r8a7779.c | 235 +++++++++++
arch/arm/tools/mach-types | 1
drivers/sh/clk/cpg.c | 4
11 files changed, 1097 insertions(+), 24 deletions(-)
^ permalink raw reply
* [PATCH 01/07] ARM: mach-shmobile: Marzen mach-type entry
From: Magnus Damm @ 2011-12-06 16:52 UTC (permalink / raw)
To: linux-sh
From: Magnus Damm <damm@opensource.se>
The marzen board has already been registered through the web interface,
but upstream does not include the mach-type entry yet.
Not-yet-signed-off-by: Magnus Damm <damm@opensource.se>
---
arch/arm/tools/mach-types | 1 +
1 file changed, 1 insertion(+)
--- 0002/arch/arm/tools/mach-types
+++ work/arch/arm/tools/mach-types 2011-12-07 00:30:13.000000000 +0900
@@ -1127,3 +1127,4 @@ m28evk MACH_M28EVK M28EVK 3613
kota2 MACH_KOTA2 KOTA2 3616
smdk4212 MACH_SMDK4212 SMDK4212 3638
smdk4412 MACH_SMDK4412 SMDK4412 3765
+marzen MACH_MARZEN MARZEN 3790
^ permalink raw reply
* [PATCH 02/07] sh: CPG MSTP ioremap() prototype hack
From: Magnus Damm @ 2011-12-06 16:52 UTC (permalink / raw)
To: linux-sh
From: Magnus Damm <damm@opensource.se>
Hack to use the cookie returned from ioremap(). Will be rewritten
and submitted separately in the near future. Needed by the r8a7779
clock code since entity mapping is out of the question.
Not-yet-signed-off-by: Magnus Damm <damm@opensource.se>
---
drivers/sh/clk/cpg.c | 4 ++++
1 file changed, 4 insertions(+)
--- 0001/drivers/sh/clk/cpg.c
+++ work/drivers/sh/clk/cpg.c 2011-12-07 00:32:11.000000000 +0900
@@ -42,6 +42,10 @@ int __init sh_clk_mstp32_register(struct
clkp = clks + k;
clkp->ops = &sh_clk_mstp32_clk_ops;
ret |= clk_register(clkp);
+ if (!ret && clkp->mapping->base) {
+ clkp->enable_reg -= clkp->mapping->phys;
+ clkp->enable_reg += (unsigned long)clkp->mapping->base;
+ }
}
return ret;
^ permalink raw reply
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