* [PATCH v3 01/81] sh: sh7264: Rename CRX0CRX1 mark to match GPIO names
From: Laurent Pinchart @ 2012-12-15 22:50 UTC (permalink / raw)
To: linux-sh
Rename CRX0CRX1_MARK to CRX0_CRX1_MARK to match the GPIO_FN_CRX0_CRX1
name.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
index b055b55..79a0d60 100644
--- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
+++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c
@@ -505,7 +505,7 @@ enum {
PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,
PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,
IERXD_MARK, IETXD_MARK,
- CRX0CRX1_MARK,
+ CRX0_CRX1_MARK,
WDTOVF_MARK,
CRX0X1_MARK,
@@ -1003,7 +1003,7 @@ static pinmux_enum_t pinmux_data[] = {
PINMUX_DATA(PJ2_DATA, PJ2MD_000),
PINMUX_DATA(CTX1_MARK, PJ2MD_001),
- PINMUX_DATA(CRX0CRX1_MARK, PJ2MD_010),
+ PINMUX_DATA(CRX0_CRX1_MARK, PJ2MD_010),
PINMUX_DATA(CS2_MARK, PJ2MD_011),
PINMUX_DATA(SCK0_MARK, PJ2MD_100),
PINMUX_DATA(LCD_M_DISP_MARK, PJ2MD_101),
@@ -1246,7 +1246,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
- PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0CRX1_MARK),
+ PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
/* DMAC */
PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 00/81] SH pin control and GPIO rework
From: Laurent Pinchart @ 2012-12-15 22:50 UTC (permalink / raw)
To: linux-sh
Hi everybody,
Here's the third version of the SH pin control and GPIO rework patches. I've
removed OF support and related DT patches, as the patch set was growing too
big for my tastes. OF support will be submitted as a separate patch set on top
of this one.
I've (hopefully) fixed all issues pointed out by the comments I've received on
v2, except for comments to which I've replied that a fix will be part of a
later patch series.
This set starts with additional platform-specific fixes (patches 4 to 7), I
would appreciate if someone could review them carefully.
The patches are based on top of the latest mainline tree master branch. You
can get them from my git tree at
git://linuxtv.org/pinchartl/fbdev.git pinmux
The code has been compile-tested on all modified platforms except SH7264 and
SH7269, and runtime tested on SH7372 (Mackerel), SH73A0 (KZM-A9-GT) and
R8A7740 (Armadillo) so far. I will runtime test it on R8A7779 (Marzen).
The SH7264 and SH7269 platforms have no gpiolib support so the PFC code can't
be compiled for them. As the currently implemented arch-level pinmux support
also depends on generic GPIO, we're moving from a situation where the code
isn't used to a different situation where the code isn't used. I don't
consider that as a regression.
Sorry for the numerous checkpatch warnings, patches that move code around or
rename files don't modify the content to make review easier, and thus carry
warnings from the existing code.
I would like to push this set to v3.9 independently of the later rework and
OF-related sets. Linus and Simon, which tree would you like me to push this
through ?
Changes since v2:
- Update to latest mainline tree master branch
- Rename marks to match GPIO names
- Fix GPIOs data for sh7757, sh7786 and shx3 platforms
- Remove __devinit/__devexit
- Use devm_* managed memory allocation and mapping functions
- Use the sh_pfc_ prefix for structures and functions
- Update module authors
- Drop OF support and related DT patches
Changes since v1:
- Split SoC changes in one patch per SoC to make backporting easier
- Dropped SH7267 and SH7277 changes as support for those SoCs will be removed
from the kernel
- Removed the sh_pfc_register() function on ARM
- Added OF support for PFC instantiation and GPIO bindings
- Added PFC DT nodes for the Mackerel and KZM9G boards
- Added GPIO LEDs DT nodes for the KZM9G board
Laurent Pinchart (81):
sh: sh7264: Rename CRX0CRX1 mark to match GPIO names
sh: sh7269: Rename CRX0CRX1(CRX2) marks to match GPIO names
sh: sh7723: Rename GPIO_FN_SIUOSPD to GPIO_FN_SIUAOSPD
sh: sh7757: Fix GPIO_FN_ET0_MDIO and GPIO_FN_ET1_MDIO GPIO entries
sh: sh7786: Fix port E, G and J GPIOs
sh: sh7786: Fix last GPIO index
sh: shx3: Fix last GPIO index
sh-pfc: Remove all use of __devinit/__devexit
sh-pfc: Split platform data from the sh_pfc structure
sh-pfc: Move private definitions and declarations to private header
sh-pfc: Merge PFC core and pinctrl
sh-pfc: Merge PFC core and gpio
sh-pfc: Move platform device and driver to the core
sh-pfc: Use devm_kzalloc()
sh-pfc: Use devm_ioremap_nocache()
sh-pfc: Let the compiler decide whether to inline functions
sh-pfc: Remove check for impossible error condition
sh-pfc: Sort headers alphabetically
sh-pfc: Use sh_pfc_ namespace prefix through the whole driver
sh-pfc: Split platform device and platform driver registration
sh-pfc: Support passing resources through platform device
ARM: shmobile: Select PINCTRL
ARM: shmobile: r8a7740: Register PFC platform device
ARM: shmobile: r8a7779: Register PFC platform device
ARM: shmobile: sh7372: Register PFC platform device
ARM: shmobile: sh73a0: Register PFC platform device
ARM: shmobile: r8a7740: Add pin control resources
ARM: shmobile: sh7372: Add pin control resources
ARM: shmobile: sh73a0: Add pin control resources
sh: Add PFC platform device registration helper function
sh: sh7203: Register PFC platform device
sh: sh7264: Register PFC platform device
sh: sh7269: Register PFC platform device
sh: sh7720: Register PFC platform device
sh: sh7722: Register PFC platform device
sh: sh7723: Register PFC platform device
sh: sh7724: Register PFC platform device
sh: sh7734: Register PFC platform device
sh: sh7757: Register PFC platform device
sh: sh7785: Register PFC platform device
sh: sh7786: Register PFC platform device
sh: shx3: Register PFC platform device
sh-pfc: Remove platform device registration
sh-pfc: Remove unused resource and num_resources platform data fields
sh-pfc: Move driver from drivers/sh/ to drivers/pinctrl/
sh-pfc: Support pinmux info in driver data instead of platform data
sh-pfc: Add r8a7740 pinmux support
sh-pfc: Add r8a7779 pinmux support
sh-pfc: Add sh7372 pinmux support
sh-pfc: Add sh73a0 pinmux support
ARM: shmobile: r8a7740: Use driver-provided pinmux info
ARM: shmobile: r8a7779: Use driver-provided pinmux info
ARM: shmobile: sh7372: Use driver-provided pinmux info
ARM: shmobile: sh73a0: Use driver-provided pinmux info
sh-pfc: Add sh7203 pinmux support
sh-pfc: Add sh7264 pinmux support
sh-pfc: Add sh7269 pinmux support
sh-pfc: Add sh7720 pinmux support
sh-pfc: Add sh7722 pinmux support
sh-pfc: Add sh7723 pinmux support
sh-pfc: Add sh7724 pinmux support
sh-pfc: Add sh7734 pinmux support
sh-pfc: Add sh7757 pinmux support
sh-pfc: Add sh7785 pinmux support
sh-pfc: Add sh7786 pinmux support
sh-pfc: Add shx3 pinmux support
sh: sh7203: pinmux: Use driver-provided pinmux info
sh: sh7264: pinmux: Use driver-provided pinmux info
sh: sh7269: pinmux: Use driver-provided pinmux info
sh: sh7720: pinmux: Use driver-provided pinmux info
sh: sh7722: pinmux: Use driver-provided pinmux info
sh: sh7723: pinmux: Use driver-provided pinmux info
sh: sh7724: pinmux: Use driver-provided pinmux info
sh: sh7734: pinmux: Use driver-provided pinmux info
sh: sh7757: pinmux: Use driver-provided pinmux info
sh: sh7785: pinmux: Use driver-provided pinmux info
sh: sh7786: pinmux: Use driver-provided pinmux info
sh: shx3: pinmux: Use driver-provided pinmux info
sh: Remove unused sh_pfc_register_info() function
sh-pfc: Remove pinmux_info definition
sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
arch/arm/Kconfig | 1 +
arch/arm/mach-shmobile/Makefile | 8 -
arch/arm/mach-shmobile/setup-r8a7740.c | 26 +
arch/arm/mach-shmobile/setup-r8a7779.c | 25 +
arch/arm/mach-shmobile/setup-sh7372.c | 26 +
arch/arm/mach-shmobile/setup-sh73a0.c | 25 +
arch/sh/Kconfig | 12 +
arch/sh/include/asm/gpio.h | 2 +-
arch/sh/include/cpu-common/cpu/pfc.h | 26 +
arch/sh/include/cpu-sh4/cpu/sh7723.h | 2 +-
arch/sh/include/cpu-sh4/cpu/sh7786.h | 8 +-
arch/sh/kernel/cpu/Makefile | 2 +-
arch/sh/kernel/cpu/pfc.c | 33 +
arch/sh/kernel/cpu/sh2a/pinmux-sh7203.c | 1582 +-----------
arch/sh/kernel/cpu/sh2a/pinmux-sh7264.c | 2121 +---------------
arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c | 2823 +-------------------
arch/sh/kernel/cpu/sh3/pinmux-sh7720.c | 1226 +---------
arch/sh/kernel/cpu/sh4a/pinmux-sh7722.c | 1778 +------------
arch/sh/kernel/cpu/sh4a/pinmux-sh7723.c | 1893 +-------------
arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c | 2210 +---------------
arch/sh/kernel/cpu/sh4a/pinmux-sh7734.c | 2470 +-----------------
arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c | 2267 +----------------
arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c | 1294 +---------
arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c | 822 +------
arch/sh/kernel/cpu/sh4a/pinmux-shx3.c | 573 +----
drivers/pinctrl/Kconfig | 2 +-
drivers/pinctrl/Makefile | 2 +
drivers/pinctrl/sh-pfc/Kconfig | 116 +
drivers/pinctrl/sh-pfc/Makefile | 21 +
drivers/{sh/pfc => pinctrl/sh-pfc}/core.c | 355 ++-
drivers/pinctrl/sh-pfc/core.h | 72 +
drivers/{sh/pfc => pinctrl/sh-pfc}/gpio.c | 114 +-
.../pinctrl/sh-pfc}/pfc-r8a7740.c | 11 +-
.../pinctrl/sh-pfc}/pfc-r8a7779.c | 29 +-
drivers/pinctrl/sh-pfc/pfc-sh7203.c | 1592 +++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7264.c | 2131 +++++++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7269.c | 2834 ++++++++++++++++++++
.../pinctrl/sh-pfc}/pfc-sh7372.c | 11 +-
.../pinctrl/sh-pfc}/pfc-sh73a0.c | 11 +-
drivers/pinctrl/sh-pfc/pfc-sh7720.c | 1236 +++++++++
drivers/pinctrl/sh-pfc/pfc-sh7722.c | 1779 ++++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7723.c | 1903 +++++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7724.c | 2225 +++++++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7734.c | 2475 +++++++++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7757.c | 2282 ++++++++++++++++
drivers/pinctrl/sh-pfc/pfc-sh7785.c | 1304 +++++++++
drivers/pinctrl/sh-pfc/pfc-sh7786.c | 837 ++++++
drivers/pinctrl/sh-pfc/pfc-shx3.c | 582 ++++
drivers/{sh/pfc => pinctrl/sh-pfc}/pinctrl.c | 170 +-
{include/linux => drivers/pinctrl/sh-pfc}/sh_pfc.h | 43 +-
drivers/sh/Kconfig | 1 -
drivers/sh/Makefile | 1 -
drivers/sh/pfc/Kconfig | 26 -
drivers/sh/pfc/Makefile | 3 -
54 files changed, 21899 insertions(+), 21524 deletions(-)
create mode 100644 arch/sh/include/cpu-common/cpu/pfc.h
create mode 100644 arch/sh/kernel/cpu/pfc.c
create mode 100644 drivers/pinctrl/sh-pfc/Kconfig
create mode 100644 drivers/pinctrl/sh-pfc/Makefile
rename drivers/{sh/pfc => pinctrl/sh-pfc}/core.c (50%)
create mode 100644 drivers/pinctrl/sh-pfc/core.h
rename drivers/{sh/pfc => pinctrl/sh-pfc}/gpio.c (57%)
rename {arch/arm/mach-shmobile => drivers/pinctrl/sh-pfc}/pfc-r8a7740.c (99%)
rename {arch/arm/mach-shmobile => drivers/pinctrl/sh-pfc}/pfc-r8a7779.c (99%)
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7203.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7264.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7269.c
rename {arch/arm/mach-shmobile => drivers/pinctrl/sh-pfc}/pfc-sh7372.c (99%)
rename {arch/arm/mach-shmobile => drivers/pinctrl/sh-pfc}/pfc-sh73a0.c (99%)
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7720.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7722.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7723.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7724.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7734.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7757.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7785.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-sh7786.c
create mode 100644 drivers/pinctrl/sh-pfc/pfc-shx3.c
rename drivers/{sh/pfc => pinctrl/sh-pfc}/pinctrl.c (73%)
rename {include/linux => drivers/pinctrl/sh-pfc}/sh_pfc.h (83%)
delete mode 100644 drivers/sh/pfc/Kconfig
delete mode 100644 drivers/sh/pfc/Makefile
--
Regards,
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH 6/7] ARM: mackerel: support booting with or without DT
From: Guennadi Liakhovetski @ 2012-12-15 19:02 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <20121215082955.GA17390@verge.net.au>
Hi Simon
Thanks for your comments. I'll reply to other your reviews later, I think,
let me just briefly clarify this one.
On Sat, 15 Dec 2012, Simon Horman wrote:
> On Fri, Dec 14, 2012 at 05:45:30PM +0100, Guennadi Liakhovetski wrote:
> > This patch adds dynamic switching to booting either with or without DT.
> > So far only a part of the board initialisation can be done via DT. Devices,
> > that still need platform data are kept that way. Devices, that can be
> > initialised from DT will not be supplied from the platform data, if a DT
> > image is detected.
>
> Hi Guennadi,
>
> I'm not sure that I'm entirely comfortable with the implications
> for users here.
>
> In the beginning there was no DT for Mackerel, all boots were non-DT,
> and in general the board and its devices have been well supported.
>
> At the present time Mackerel only boots using DT, though almost all
> the initialisation is done in C. Thus currently a DT boot fairly full
> support for the board and its devices.
>
> If I understand things correctly, with this change, a DT boot becomes a
> limited boot that basically only supports devices that can be initialised
> using DT. And users are expected to go back to a non-DT boot if they want
> fuller support. This seems undesirable.
No, it's in a way the contrary. As you correctly point out after a recent
change mackerel _must_ only be booted with DT, and, I think, this way an
undesirable change. After this series of patches both becomes possible:
booting with and without DT. And in both cases all devices are supported.
If booting without DT, all devices are supported in the "legacy" way from
the board file. If booting with DT _some_ devices, for which sufficient DT
support already exist are initialised from the .dts file, others are still
initialised from the .c. This way all devices are still supported. Note,
however, that some devices don't have a complete DT support yet, e.g., you
cannot specify card-detect GPIOs in .dts because of the lacking pincontrol
/ GPIO DT support. As soon as that is added, .dts will have to be
extended respectively. Similarly, as more devices get DT support they can
be added to the .dts and excluded from the DT boot by putting them under
+ if (!of_have_populated_dt()) {
clauses. If we ever come to a point, that no-DT booting will not have to
be supported any more, these clauses and respective devices can be easily
removed from board-mackerel.c. (Continued below)
> The approach that I took with the kzm9g was to provide an alternate dts and
> board file, and compatibility string. Clearly that is not an entirely
> elegant solution. But it does avoid the problem that I describe above.
>
> >
> > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > ---
> > arch/arm/mach-shmobile/board-mackerel.c | 84 ++++++++++++++++++++++++-------
> > 1 files changed, 66 insertions(+), 18 deletions(-)
> >
> > diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
> > index 39b8f2e..a6358c9 100644
> > --- a/arch/arm/mach-shmobile/board-mackerel.c
> > +++ b/arch/arm/mach-shmobile/board-mackerel.c
> > @@ -1326,7 +1326,6 @@ static struct platform_device mackerel_camera = {
> >
> > static struct platform_device *mackerel_devices[] __initdata = {
> > &nor_flash_device,
> > - &smc911x_device,
> > &lcdc_device,
> > &usbhs0_device,
> > &usbhs1_device,
> > @@ -1335,17 +1334,21 @@ static struct platform_device *mackerel_devices[] __initdata = {
> > &fsi_ak4643_device,
> > &fsi_hdmi_device,
> > &nand_flash_device,
> > + &ceu_device,
> > + &mackerel_camera,
> > + &hdmi_device,
> > + &hdmi_lcdc_device,
> > + &meram_device,
> > +};
> > +
> > +static struct platform_device *mackerel_devices_dt[] __initdata = {
> > + &smc911x_device,
> > &sdhi0_device,
> > #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
> > &sdhi1_device,
> > #endif
> > &sdhi2_device,
> > &sh_mmcif_device,
> > - &ceu_device,
> > - &mackerel_camera,
> > - &hdmi_device,
> > - &hdmi_lcdc_device,
> > - &meram_device,
> > };
> >
> > /* Keypad Initialization */
> > @@ -1404,6 +1407,24 @@ static struct i2c_board_info i2c1_devices[] = {
> > },
> > };
> >
> > +static int mackerel_i2c_bus_notify(struct notifier_block *nb,
> > + unsigned long action, void *data)
> > +{
> > + struct device *dev = data;
> > +
> > + if (action != BUS_NOTIFY_ADD_DEVICE ||
> > + strcmp(dev_name(dev->parent), "fff20000.i2c"))
> > + return NOTIFY_DONE;
> > +
> > + i2c_new_device(to_i2c_adapter(dev), &i2c0_devices[1]);
> > +
> > + return NOTIFY_OK;
> > +}
> > +
> > +static struct notifier_block mackerel_i2c_notifier = {
> > + .notifier_call = mackerel_i2c_bus_notify,
> > +};
> > +
> > #define GPIO_PORT9CR IOMEM(0xE6051009)
> > #define GPIO_PORT10CR IOMEM(0xE605100A)
> > #define GPIO_PORT167CR IOMEM(0xE60520A7)
> > @@ -1420,22 +1441,26 @@ static void __init mackerel_init(void)
>
> I wonder if it would be cleaner to achieve this by providing
> mackerel_init_dt().
I thought about this, but initialisation is interleaved and in some cases
order is important, so, you would need something like "early_dt(),"
"mid_early_common()," "late_dt()" etc., which doesn't seem an improvement
to me:-)
> > { "A3SP", &usbhs0_device, },
> > { "A3SP", &usbhs1_device, },
> > { "A3SP", &nand_flash_device, },
> > + { "A4R", &ceu_device, },
> > + };
> > + struct pm_domain_device domain_devices_dt[] = {
> > { "A3SP", &sh_mmcif_device, },
> > { "A3SP", &sdhi0_device, },
> > #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
> > { "A3SP", &sdhi1_device, },
> > #endif
> > { "A3SP", &sdhi2_device, },
> > - { "A4R", &ceu_device, },
> > };
> > u32 srcr4;
> > struct clk *clk;
> >
> > - regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
> > - ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
> > - regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
> > - ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
> > - regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
> > + if (!of_have_populated_dt()) {
> > + regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
> > + ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
> > + regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
> > + ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
> > + regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
> > + }
> >
> > /* External clock source */
> > clk_set_rate(&sh7372_dv_clki_clk, 27000000);
> > @@ -1633,22 +1658,35 @@ static void __init mackerel_init(void)
> > udelay(50);
> > __raw_writel(srcr4 & ~(1 << 13), SRCR4);
> >
> > - i2c_register_board_info(0, i2c0_devices,
> > - ARRAY_SIZE(i2c0_devices));
> > - i2c_register_board_info(1, i2c1_devices,
> > - ARRAY_SIZE(i2c1_devices));
> > + if (!of_have_populated_dt()) {
> > + i2c_register_board_info(0, i2c0_devices,
> > + ARRAY_SIZE(i2c0_devices));
> > + i2c_register_board_info(1, i2c1_devices,
> > + ARRAY_SIZE(i2c1_devices));
> > + } else {
> > + bus_register_notifier(&i2c_bus_type,
> > + &mackerel_i2c_notifier);
> > + }
> >
> > sh7372_add_standard_devices();
> >
> > platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
> > + if (!of_have_populated_dt())
> > + platform_add_devices(mackerel_devices_dt,
> > + ARRAY_SIZE(mackerel_devices_dt));
> >
> > rmobile_add_devices_to_domains(domain_devices,
> > ARRAY_SIZE(domain_devices));
> > + if (!of_have_populated_dt())
> > + rmobile_add_devices_to_domains(domain_devices_dt,
> > + ARRAY_SIZE(domain_devices_dt));
> >
> > hdmi_init_pm_clock();
> > sh7372_pm_init();
> > pm_clk_add(&fsi_device.dev, "spu2");
> > pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
> > +
> > + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> > }
> >
> > static const char *mackerel_boards_compat_dt[] __initdata = {
> > @@ -1659,10 +1697,20 @@ static const char *mackerel_boards_compat_dt[] __initdata = {
> > DT_MACHINE_START(MACKEREL_DT, "mackerel")
> > .map_io = sh7372_map_io,
> > .init_early = sh7372_add_early_devices,
> > - .init_irq = sh7372_init_irq,
> > + .init_irq = sh7372_init_irq_of,
> > + .handle_irq = shmobile_handle_irq_intc,
> > + .init_machine = mackerel_init,
> > + .init_late = sh7372_pm_init_late,
> > + .timer = &shmobile_timer,
> > + .dt_compat = mackerel_boards_compat_dt,
> > +MACHINE_END
> > +
> > +MACHINE_START(MACKEREL, "mackerel")
> > + .map_io = sh7372_map_io,
> > + .init_early = sh7372_add_early_devices,
> > + .init_irq = sh7372_init_irq_of,
>
> Could sh7372_init_irq be used here ?
Yes, it could. I'll reply to your other review separately, briefly, by
using the conditional, that I proposed in my patch 3/7 we could make the
non-dt version static and let everyone just use sh7372_init_irq_of. But
this is just an idea, we can keep sh7372_init_irq() too if this is
prefered.
Thanks
Guennadi
> > .handle_irq = shmobile_handle_irq_intc,
> > .init_machine = mackerel_init,
> > .init_late = sh7372_pm_init_late,
> > .timer = &shmobile_timer,
> > - .dt_compat = mackerel_boards_compat_dt,
> > MACHINE_END
> > --
> > 1.7.2.5
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
^ permalink raw reply
* [PATCH v2] ARM: mach-shmobile: mackerel: update defconfig
From: Simon Horman @ 2012-12-15 9:16 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <4D087CC8.6020803@renesas.com>
From: Simon Horman <horms+renesas@verge.net.au>
* Enable ARM_APPENDED_DTB
Typically the bootloader of a mackerel board does not support DT
so this option is useful
* Add "rw" to command line
This appears to be necessary for a successful NFS-root boot
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/configs/mackerel_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
v2
* Fix up comment to remove mention of adding INOTIFY_USER,
it is already present.
diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
index 2098ce1..8519721 100644
--- a/arch/arm/configs/mackerel_defconfig
+++ b/arch/arm/configs/mackerel_defconfig
@@ -23,7 +23,8 @@ CONFIG_AEABI=y
CONFIG_FORCE_MAX_ZONEORDER\x15
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp memchunk.vpudm memchunk.veu0=8m memchunk.spu0=2m mem$0m"
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp memchunk.vpudm memchunk.veu0=8m memchunk.spu0=2m mem$0m rw"
CONFIG_KEXEC=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM=y
--
1.7.10.4
^ permalink raw reply related
* Re: [PATCH] ARM: mach-shmobile: mackerel: update defconfig
From: Simon Horman @ 2012-12-15 9:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355559114-15523-1-git-send-email-horms@verge.net.au>
On Sat, Dec 15, 2012 at 05:11:54PM +0900, Simon Horman wrote:
> From: Simon Horman <horms+renesas@verge.net.au>
>
> * Enable ARM_APPENDED_DTB
>
> Typically the bootloader of a mackerel board does not support DT
> so this option is useful
>
> * Add "rw" to command line
>
> This appears to be necessary for a successful NFS-root boot
>
> * Do not disable INOTIFY_USER
>
> INOTIFY_USER is required by dbus which is common to many
> userspaces
I seemed to miss the INOTIFY_USER portion of the change somehow,
I will repost.
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
> ---
> arch/arm/configs/mackerel_defconfig | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
> index 2098ce1..8519721 100644
> --- a/arch/arm/configs/mackerel_defconfig
> +++ b/arch/arm/configs/mackerel_defconfig
> @@ -23,7 +23,8 @@ CONFIG_AEABI=y
> CONFIG_FORCE_MAX_ZONEORDER\x15
> CONFIG_ZBOOT_ROM_TEXT=0x0
> CONFIG_ZBOOT_ROM_BSS=0x0
> -CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp memchunk.vpudm memchunk.veu0=8m memchunk.spu0=2m mem$0m"
> +CONFIG_ARM_APPENDED_DTB=y
> +CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp memchunk.vpudm memchunk.veu0=8m memchunk.spu0=2m mem$0m rw"
> CONFIG_KEXEC=y
> # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
> CONFIG_PM=y
> --
> 1.7.10.4
>
^ permalink raw reply
* Re: [PATCH 1/7] ARM: sh7372: add missing "#interrupt-cells" properties
From: Simon Horman @ 2012-12-15 9:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-2-git-send-email-g.liakhovetski@gmx.de>
On Fri, Dec 14, 2012 at 05:45:25PM +0100, Guennadi Liakhovetski wrote:
> Two of four interrupt controllers in sh7372.dtsi are missing the compulsory
> "#interrupt-cells" properties. Fix this.
Thanks.
I think that is fixed in the latest INTC DT series that I posted just
a few moments ago "[RFC v7 00/10] ARM: shmobile: DT initialisation of INTC
and GIC".
Sorry for sitting on that code for so long. Could you check if the
problem you saw is resolved?
^ permalink raw reply
* [PATCH 10/10] ARM: shmobile: sh7372: Use DT initialisation of INTC
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/setup-sh7372.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 90af2e9..0f36e45 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -1103,7 +1103,7 @@ DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
.map_io = sh7372_map_io,
.init_early = sh7372_add_early_devices_dt,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = sh7372_init_irq,
+ .init_irq = sh7372_init_irq_of,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = sh7372_add_standard_devices_dt,
.timer = &shmobile_timer,
--
1.7.10.4
^ permalink raw reply related
* [PATCH 09/10] ARM: shmobile: sh7372: Do not initialise TMU when using DT
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
This is in preparation for initialising INTC using DT.
The proposed INTC configuration is not complete and does
not allow the TMU to be initialised, to exclude it when using DT.
Cc: Magnus Damm <damm@opensource.se>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/setup-sh7372.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954f..90af2e9 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -968,7 +968,7 @@ static struct platform_device spu1_device = {
.num_resources = ARRAY_SIZE(spu1_resources),
};
-static struct platform_device *sh7372_early_devices[] __initdata = {
+static struct platform_device *sh7372_early_devices_dt[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
@@ -977,6 +977,9 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
&scif5_device,
&scif6_device,
&cmt2_device,
+};
+
+static struct platform_device *sh7372_early_devices[] __initdata = {
&tmu00_device,
&tmu01_device,
};
@@ -1030,6 +1033,8 @@ void __init sh7372_add_standard_devices(void)
sh7372_init_pm_domains();
+ platform_add_devices(sh7372_early_devices_dt,
+ ARRAY_SIZE(sh7372_early_devices_dt));
platform_add_devices(sh7372_early_devices,
ARRAY_SIZE(sh7372_early_devices));
@@ -1048,6 +1053,8 @@ static void __init sh7372_earlytimer_init(void)
void __init sh7372_add_early_devices(void)
{
+ early_platform_add_devices(sh7372_early_devices_dt,
+ ARRAY_SIZE(sh7372_early_devices_dt));
early_platform_add_devices(sh7372_early_devices,
ARRAY_SIZE(sh7372_early_devices));
@@ -1064,8 +1071,8 @@ void __init sh7372_add_early_devices_dt(void)
{
shmobile_setup_delay(800, 1, 3); /* Cortex-A8 @ 800MHz */
- early_platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
+ early_platform_add_devices(sh7372_early_devices_dt,
+ ARRAY_SIZE(sh7372_early_devices_dt));
/* setup early console here as well */
shmobile_setup_console();
@@ -1080,8 +1087,8 @@ void __init sh7372_add_standard_devices_dt(void)
/* clocks are setup late during boot in the case of DT */
sh7372_clock_init();
- platform_add_devices(sh7372_early_devices,
- ARRAY_SIZE(sh7372_early_devices));
+ platform_add_devices(sh7372_early_devices_dt,
+ ARRAY_SIZE(sh7372_early_devices_dt));
of_platform_populate(NULL, of_default_bus_match_table,
sh7372_auxdata_lookup, NULL);
--
1.7.10.4
^ permalink raw reply related
* [PATCH 08/10] ARM: shmobile: r8a7740: Use DT initialisation of INTC
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/setup-r8a7740.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 11bb1d9..a8e57ab 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -750,7 +750,7 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)")
.map_io = r8a7740_map_io,
.init_early = r8a7740_add_early_devices_dt,
- .init_irq = r8a7740_init_irq,
+ .init_irq = r8a7740_init_irq_of,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = r8a7740_add_standard_devices_dt,
.timer = &shmobile_timer,
--
1.7.10.4
^ permalink raw reply related
* [PATCH 07/10] ARM: shmobile: Include DTSI of r8a7740 to armadillo800eva
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index a7505a9..a8e7bd9 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -9,7 +9,7 @@
*/
/dts-v1/;
-/include/ "skeleton.dtsi"
+/include/ "r8a7740.dtsi"
/ {
model = "armadillo 800 eva";
--
1.7.10.4
^ permalink raw reply related
* [PATCH 06/10] ARM: shmobile: Add DT table of INTC for r8a7740
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/r8a7740.dtsi | 743 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 742 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 798fa35..6340ab8 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -1,5 +1,5 @@
/*
- * Device Tree Source for the r8a7740 SoC
+ * Device Tree Source for Renesas r8a7740
*
* Copyright (C) 2012 Renesas Solutions Corp.
*
@@ -18,4 +18,745 @@
compatible = "arm,cortex-a9";
};
};
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intca: interrupt-controller@0 {
+ compatible = "renesas,sh_intc";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6940000 0x200>, <0xe6950000 0x200>;
+ group_size = <19>;
+
+ DIRC: intsrc1 { vector = <0x0560>; };
+ ATAPI: intsrc2 { vector = <0x05E0>; };
+ IIC1_ALI: intsrc3 { vector = <0x0780>; };
+ IIC1_TACKI: intsrc4 { vector = <0x07A0>; };
+ IIC1_WAITI: intsrc5 { vector = <0x07C0>; };
+ IIC1_DTEI: intsrc6 { vector = <0x07E0>; };
+ AP_ARM_COMMTX: intsrc7 { vector = <0x0840>; };
+ AP_ARM_COMMRX: intsrc8 { vector = <0x0860>; };
+ MFI: intsrc9 { vector = <0x0900>; };
+ MFIS: intsrc10 { vector = <0x0920>; };
+ BBIF1: intsrc11 { vector = <0x0940>; };
+ BBIF2: intsrc12 { vector = <0x0960>; };
+ USBHSDMAC: intsrc13 { vector = <0x0A00>; };
+ USBF_OUL_SOF: intsrc14 { vector = <0x0A20>; };
+ USBF_IXL_INT: intsrc15 { vector = <0x0A40>; };
+ SGX540: intsrc16 { vector = <0x0A60>; };
+ CMT1_0: intsrc17 { vector = <0x0B00>; };
+ CMT1_1: intsrc18 { vector = <0x0B20>; };
+ CMT1_2: intsrc19 { vector = <0x0B40>; };
+ CMT1_3: intsrc20 { vector = <0x0B60>; };
+ CMT2: intsrc21 { vector = <0x0B80>; };
+ CMT3: intsrc22 { vector = <0x0BA0>; };
+ KEYSC: intsrc23 { vector = <0x0BE0>; };
+ SCIFA0: intsrc24 { vector = <0x0C00>; };
+ SCIFA1: intsrc25 { vector = <0x0C20>; };
+ SCIFA2: intsrc26 { vector = <0x0C40>; };
+ SCIFA3: intsrc27 { vector = <0x0C60>; };
+ MSIOF2: intsrc28 { vector = <0x0C80>; };
+ MSIOF1: intsrc29 { vector = <0x0D00>; };
+ SCIFA4: intsrc30 { vector = <0x0D20>; };
+ SCIFA5: intsrc31 { vector = <0x0D40>; };
+ SCIFB: intsrc32 { vector = <0x0D60>; };
+ FLCTL_FLSTEI: intsrc33 { vector = <0x0D80>; };
+ FLCTL_FLTENDI: intsrc34 { vector = <0x0DA0>; };
+ FLCTL_FLTREQ0I: intsrc35 { vector = <0x0DC0>; };
+ FLCTL_FLTREQ1I: intsrc36 { vector = <0x0DE0>; };
+ SDHI0_0: intsrc37 { vector = <0x0E00>; };
+ SDHI0_1: intsrc38 { vector = <0x0E20>; };
+ SDHI0_2: intsrc39 { vector = <0x0E40>; };
+ SDHI0_3: intsrc40 { vector = <0x0E60>; };
+ SDHI1_0: intsrc41 { vector = <0x0E80>; };
+ SDHI1_1: intsrc42 { vector = <0x0EA0>; };
+ SDHI1_2: intsrc43 { vector = <0x0EC0>; };
+ SDHI1_3: intsrc44 { vector = <0x0EE0>; };
+ AP_ARM_L2CINT: intsrc45 { vector = <0x0FA0>; };
+ IRDA: intsrc46 { vector = <0x0480>; };
+ TPU0: intsrc47 { vector = <0x04A0>; };
+ SCIFA6: intsrc48 { vector = <0x04C0>; };
+ SCIFA7: intsrc49 { vector = <0x04E0>; };
+ GETHER: intsrc50 { vector = <0x0500>; };
+ ICBS0: intsrc51 { vector = <0x0540>; };
+ DDM: intsrc52 { vector = <0x1140>; };
+ SDHI2_0: intsrc53 { vector = <0x1200>; };
+ SDHI2_1: intsrc54 { vector = <0x1220>; };
+ SDHI2_2: intsrc55 { vector = <0x1240>; };
+ SDHI2_3: intsrc56 { vector = <0x1260>; };
+ RWDT0: intsrc57 { vector = <0x1280>; };
+ DMAC1_1_DEI0: intsrc58 { vector = <0x2000>; };
+ DMAC1_1_DEI1: intsrc59 { vector = <0x2020>; };
+ DMAC1_1_DEI2: intsrc60 { vector = <0x2040>; };
+ DMAC1_1_DEI3: intsrc61 { vector = <0x2060>; };
+ DMAC1_2_DEI4: intsrc62 { vector = <0x2080>; };
+ DMAC1_2_DEI5: intsrc63 { vector = <0x20A0>; };
+ DMAC1_2_DADERR: intsrc64 { vector = <0x20C0>; };
+ DMAC2_1_DEI0: intsrc65 { vector = <0x2100>; };
+ DMAC2_1_DEI1: intsrc66 { vector = <0x2120>; };
+ DMAC2_1_DEI2: intsrc67 { vector = <0x2140>; };
+ DMAC2_1_DEI3: intsrc68 { vector = <0x2160>; };
+ DMAC2_2_DEI4: intsrc69 { vector = <0x2180>; };
+ DMAC2_2_DEI5: intsrc70 { vector = <0x21A0>; };
+ DMAC2_2_DADERR: intsrc71 { vector = <0x21C0>; };
+ DMAC3_1_DEI0: intsrc72 { vector = <0x2200>; };
+ DMAC3_1_DEI1: intsrc73 { vector = <0x2220>; };
+ DMAC3_1_DEI2: intsrc74 { vector = <0x2240>; };
+ DMAC3_1_DEI3: intsrc75 { vector = <0x2260>; };
+ DMAC3_2_DEI4: intsrc76 { vector = <0x2280>; };
+ DMAC3_2_DEI5: intsrc77 { vector = <0x22A0>; };
+ DMAC3_2_DADERR: intsrc78 { vector = <0x22C0>; };
+ SHWYSTAT_RT: intsrc79 { vector = <0x1300>; };
+ SHWYSTAT_HS: intsrc80 { vector = <0x1320>; };
+ SHWYSTAT_COM: intsrc81 { vector = <0x1340>; };
+ HDMI: intsrc82 { vector = <0x1700>; };
+ USBH_INT: intsrc83 { vector = <0x1540>; };
+ USBH_OHCI: intsrc84 { vector = <0x1560>; };
+ USBH_EHCI: intsrc85 { vector = <0x1580>; };
+ USBH_PME: intsrc86 { vector = <0x15A0>; };
+ USBH_BIND: intsrc87 { vector = <0x15C0>; };
+ RSPI_OVRF: intsrc88 { vector = <0x1780>; };
+ RSPI_SPTEF: intsrc89 { vector = <0x17A0>; };
+ RSPI_SPRF: intsrc90 { vector = <0x17C0>; };
+ SPU2_0: intsrc91 { vector = <0x1800>; };
+ SPU2_1: intsrc92 { vector = <0x1820>; };
+ FSI: intsrc93 { vector = <0x1840>; };
+ FMSI: intsrc94 { vector = <0x1860>; };
+ HDMI_SSS: intsrc95 { vector = <0x18A0>; };
+ HDMI_KEY: intsrc96 { vector = <0x18C0>; };
+ IPMMU: intsrc97 { vector = <0x1920>; };
+ AP_ARM_CTIIRQ: intsrc98 { vector = <0x1980>; };
+ AP_ARM_PMURQ: intsrc99 { vector = <0x19A0>; };
+ MFIS2: intsrc100 { vector = <0x1A00>; };
+ CPORTR2S: intsrc101 { vector = <0x1A20>; };
+ CMT14: intsrc102 { vector = <0x1A40>; };
+ CMT15: intsrc103 { vector = <0x1A60>; };
+ MMCIF_0: intsrc104 { vector = <0x1AA0>; };
+ MMCIF_1: intsrc105 { vector = <0x1AC0>; };
+ MMCIF_2: intsrc106 { vector = <0x1AE0>; };
+ SIM_ERI: intsrc107 { vector = <0x1C00>; };
+ SIM_RXI: intsrc108 { vector = <0x1C20>; };
+ SIM_TXI: intsrc109 { vector = <0x1C40>; };
+ SIM_TEI: intsrc110 { vector = <0x1C60>; };
+ STPRO_0: intsrc111 { vector = <0x1C80>; };
+ STPRO_1: intsrc112 { vector = <0x1CA0>; };
+ STPRO_2: intsrc113 { vector = <0x1CC0>; };
+ STPRO_3: intsrc114 { vector = <0x1CE0>; };
+ STPRO_4: intsrc115 { vector = <0x1D00>; };
+
+ DMAC1_1: intc_group0 {
+ group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1
+ &DMAC1_1_DEI2 &DMAC1_1_DEI3>;
+ };
+
+ DMAC1_2: intc_group1 {
+ group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5
+ &DMAC1_2_DADERR>;
+ };
+
+ DMAC2_1: intc_group2 {
+ group = <&DMAC2_1_DEI0 &DMAC2_1_DEI1
+ &DMAC2_1_DEI2 &DMAC2_1_DEI3>;
+ };
+
+ DMAC2_2: intc_group3 {
+ group = <&DMAC2_2_DEI4 &DMAC2_2_DEI5
+ &DMAC2_2_DADERR>;
+ };
+
+ DMAC3_1: intc_group4 {
+ group = <&DMAC3_1_DEI0 &DMAC3_1_DEI1
+ &DMAC3_1_DEI2 &DMAC3_1_DEI3>;
+ };
+
+ DMAC3_2: intc_group5 {
+ group = <&DMAC3_2_DEI4 &DMAC3_2_DEI5
+ &DMAC3_2_DADERR>;
+ };
+
+ AP_ARM1: intc_group6 {
+ group = <&AP_ARM_COMMTX &AP_ARM_COMMRX>;
+ };
+
+ AP_ARM2: intc_group7 {
+ group = <&AP_ARM_CTIIRQ &AP_ARM_PMURQ>;
+ };
+
+ USBF: intc_group8 {
+ group = <&USBF_OUL_SOF &USBF_IXL_INT>;
+ };
+
+ SDHI0: intc_group9 {
+ group = <&SDHI0_0 &SDHI0_1 &SDHI0_2 &SDHI0_3>;
+ };
+
+ SDHI1: intc_group10 {
+ group = <&SDHI1_0 &SDHI1_1 &SDHI1_2 &SDHI1_3>;
+ };
+
+ SDHI2: intc_group11 {
+ group = <&SDHI2_0 &SDHI2_1 &SDHI2_2 &SDHI2_3>;
+ };
+
+ SHWYSTAT: intc_group12 {
+ group = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM>;
+ };
+
+ USBH1: intc_group13 {
+ group = <&USBH_INT &USBH_OHCI>;
+ };
+
+ USBH2: intc_group14 {
+ group = <&USBH_EHCI &USBH_PME &USBH_BIND>;
+ };
+
+ RSPI: intc_group15 {
+ group = <&RSPI_OVRF &RSPI_SPTEF &RSPI_SPRF>;
+ };
+
+ SPU2: intc_group16 {
+ group = <&SPU2_0 &SPU2_1>;
+ };
+
+ FLCTL: intc_group17 {
+ group = <&FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I
+ &FLCTL_FLTREQ1I>;
+ };
+
+ IIC1: intc_group18 {
+ group = <&IIC1_ALI &IIC1_TACKI &IIC1_WAITI &IIC1_DTEI>;
+ };
+
+ intc_vectors {
+ vector_table = <&DIRC &ATAPI &IIC1_ALI &IIC1_TACKI &IIC1_WAITI
+ &IIC1_DTEI &AP_ARM_COMMTX &AP_ARM_COMMRX &MFI &MFIS &BBIF1
+ &BBIF2 &USBHSDMAC &USBF_OUL_SOF &USBF_IXL_INT &SGX540 &CMT1_0
+ &CMT1_1 &CMT1_2 &CMT1_3 &CMT2 &CMT3 &KEYSC &SCIFA0 &SCIFA1
+ &SCIFA2 &SCIFA3 &MSIOF2 &MSIOF1 &SCIFA4 &SCIFA5 &SCIFB
+ &FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I &FLCTL_FLTREQ1I
+ &SDHI0_0 &SDHI0_1 &SDHI0_2 &SDHI0_3
+ &SDHI1_0 &SDHI1_1 &SDHI1_2 &SDHI1_3
+ &AP_ARM_L2CINT &IRDA &TPU0 &SCIFA6 &SCIFA7
+ &GETHER &ICBS0 &DDM &SDHI2_0 &SDHI2_1 &SDHI2_2 &SDHI2_3
+ &RWDT0
+ &DMAC1_1_DEI0 &DMAC1_1_DEI1 &DMAC1_1_DEI2 &DMAC1_1_DEI3
+ &DMAC1_2_DEI4 &DMAC1_2_DEI5 &DMAC1_2_DADERR
+ &DMAC2_1_DEI0 &DMAC2_1_DEI1 &DMAC2_1_DEI2 &DMAC2_1_DEI3
+ &DMAC2_2_DEI4 &DMAC2_2_DEI5 &DMAC2_2_DADERR
+ &DMAC3_1_DEI0 &DMAC3_1_DEI1 &DMAC3_1_DEI2 &DMAC3_1_DEI3
+ &DMAC3_2_DEI4 &DMAC3_2_DEI5 &DMAC3_2_DADERR
+ &SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM
+ &USBH_INT &USBH_OHCI &USBH_EHCI &USBH_PME &USBH_BIND
+ &HDMI
+ &RSPI_OVRF &RSPI_SPTEF &RSPI_SPRF
+ &SPU2_0 &SPU2_1 &FSI &FMSI &HDMI_SSS &HDMI_KEY
+ &IPMMU &AP_ARM_CTIIRQ &AP_ARM_PMURQ &MFIS2
+ &CPORTR2S
+ &CMT14 &CMT15 &MMCIF_0 &MMCIF_1 &MMCIF_2
+ &SIM_ERI &SIM_RXI &SIM_TXI &SIM_TEI
+ &STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3 &STPRO_4>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6940080 1>, <0xe69400c0 1>;
+ reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1
+ &DMAC2_1_DEI0 0 0 &AP_ARM_COMMTX &AP_ARM_COMMRX>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6940084 1>, <0xe69400c4 1>;
+ reginfo = <&ATAPI 0 &DIRC 0 &DMAC1_1_DEI3 &DMAC1_1_DEI2
+ &DMAC1_1_DEI1 &DMAC1_1_DEI0>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6940088 1>, <0xe69400c8 1>;
+ reginfo = <0 0 0 0 &BBIF1 &BBIF2 &MFIS &MFI>;
+ };
+
+ intc_mask3 {
+ reg = <0xe694008c 1>, <0xe69400cc 1>;
+ reginfo = <&DMAC3_1_DEI3 &DMAC3_1_DEI2 &DMAC3_1_DEI1
+ &DMAC3_1_DEI0 &DMAC3_2_DADERR &DMAC3_2_DEI5
+ &DMAC3_2_DEI4 &IRDA>;
+ };
+
+ intc_mask4 {
+ reg = <0xe6940090 1>, <0xe69400d0 1>;
+ reginfo = <&DDM 0 0 0 0 0 0 0>;
+ };
+
+ intc_mask5 {
+ reg = <0xe6940094 1>, <0xe69400d4 1>;
+ reginfo = <&KEYSC &DMAC1_2_DADERR &DMAC1_2_DEI5 &DMAC1_2_DEI4
+ &SCIFA3 &SCIFA2 &SCIFA1 &SCIFA0>;
+ };
+
+ intc_mask6 {
+ reg = <0xe6940098 1>, <0xe69400d8 1>;
+ reginfo = <&SCIFB &SCIFA5 &SCIFA4 &MSIOF1 0 0 &MSIOF2 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xe694009c 1>, <0xe69400dc 1>;
+ reginfo = <&SDHI0_3 &SDHI0_2 &SDHI0_1 &SDHI0_0 &FLCTL_FLTREQ1I
+ &FLCTL_FLTREQ0I &FLCTL_FLTENDI &FLCTL_FLSTEI>;
+ };
+
+ intc_mask8 {
+ reg = <0xe69400a0 1>, <0xe69400e0 1>;
+ reginfo = <&SDHI1_3 &SDHI1_2 &SDHI1_1 &SDHI1_0 0
+ &USBHSDMAC 0 &AP_ARM_L2CINT>;
+ };
+
+ intc_mask9 {
+ reg = <0xe69400a4 1>, <0xe69400e4 1>;
+ reginfo = <&CMT1_3 &CMT1_2 &CMT1_1
+ &CMT1_0 &CMT2 &USBF_IXL_INT &USBF_OUL_SOF &SGX540>;
+ };
+
+ intc_mask10 {
+ reg = <0xe69400a8 1>, <0xe69400e8 1>;
+ reginfo = <0 &DMAC2_2_DADERR &DMAC2_2_DEI5 &DMAC2_2_DEI4
+ 0 0 0 0>;
+ };
+
+ intc_mask11 {
+ reg = <0xe69400ac 1>, <0xe69400ec 1>;
+ reginfo = <&IIC1_DTEI &IIC1_WAITI
+ &IIC1_TACKI &IIC1_ALI &ICBS0 0 0 0>;
+ };
+
+ intc_mask12 {
+ reg = <0xe69400b0 1>, <0xe69400f0 1>;
+ reginfo = <0 0 &TPU0 &SCIFA6 &SCIFA7 &GETHER 0 0>;
+ };
+
+ intc_mask13 {
+ reg = <0xe69400b4 1>, <0xe69400f4 1>;
+ reginfo = <&SDHI2_3 &SDHI2_2 &SDHI2_1
+ &SDHI2_0 0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_mask14 {
+ reg = <0xe6950080 1>, <0xe69500c0 1>;
+ reginfo = <&SHWYSTAT_RT &SHWYSTAT_HS
+ &SHWYSTAT_COM 0 0 0 0 0>;
+ };
+
+ intc_mask15 {
+ reg = <0xe6950088 1>, <0xe69500c8 1>;
+ reginfo = <0 0 &USBH_INT &USBH_OHCI
+ &USBH_EHCI &USBH_PME &USBH_BIND 0>;
+ };
+
+ intc_mask16 {
+ reg = <0xe6950090 1>, <0xe69500d0 1>;
+ reginfo = <&HDMI 0 0 0 &RSPI_OVRF
+ &RSPI_SPTEF &RSPI_SPRF 0>;
+ };
+
+ intc_mask17 {
+ reg = <0xe6950094 1>, <0xe69500d4 1>;
+ reginfo = <&SPU2_0 &SPU2_1 &FSI &FMSI 0
+ &HDMI_SSS &HDMI_KEY 0>;
+ };
+
+ intc_mask18 {
+ reg = <0xe6950098 1>, <0xe69500d8 1>;
+ reginfo = <0 &IPMMU 0 0 &AP_ARM_CTIIRQ
+ &AP_ARM_PMURQ 0 0>;
+ };
+
+ intc_mask19 {
+ reg = <0xe695009c 1>, <0xe69500dc 1>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15
+ 0 &MMCIF_0 &MMCIF_1 &MMCIF_2>;
+ };
+
+ intc_mask20 {
+ reg = <0xe69500a4 1>, <0xe69500e4 1>;
+ reginfo = <&SIM_ERI &SIM_RXI &SIM_TXI
+ &SIM_TEI &STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3>;
+ };
+
+ intc_mask21 {
+ reg = <0xe69500a8 1>, <0xe69500e8 1>;
+ reginfo = <&STPRO_4 0 0 0 0 0 0 0>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6940000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 &ICBS0>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6940004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo =<&IRDA 0 &BBIF1 &BBIF2>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6940008 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&ATAPI 0 &CMT1_1 &AP_ARM1>;
+ };
+
+ intc_prio3 {
+ reg = <0xe694000c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &CMT1_2 0>;
+ };
+
+ intc_prio4 {
+ reg = <0xe6940010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC1_1 &MFIS &MFI &USBF>;
+ };
+
+ intc_prio5 {
+ reg = <0xe6940014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&KEYSC &DMAC1_2 &SGX540 &CMT1_0>;
+ };
+
+ intc_prio6 {
+ reg = <0xe6940018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3>;
+ };
+
+ intc_prio7 {
+ reg = <0xe694001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF2 &USBHSDMAC &FLCTL &SDHI0>;
+ };
+
+ intc_prio8 {
+ reg = <0xe6940020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF1 &SCIFA4 0 &IIC1>;
+ };
+
+ intc_prio9 {
+ reg = <0xe6940024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC2_1 &DMAC2_2 &AP_ARM_L2CINT 0>;
+ };
+
+ intc_prio10 {
+ reg = <0xe6940028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT1_3 0 &SDHI1>;
+ };
+
+ intc_prio11 {
+ reg = <0xe694002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TPU0 &SCIFA6 &SCIFA7 &GETHER>;
+ };
+
+ intc_prio12 {
+ reg = <0xe6940030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_prio13 {
+ reg = <0xe6940034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFB &SCIFA5 0 &DDM>;
+ };
+
+ intc_prio14 {
+ reg = <0xe6940038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &DIRC &SDHI2>;
+ };
+
+ intc_prio15 {
+ reg = <0xe6950000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SHWYSTAT 0 0 0>;
+ };
+
+ intc_prio16 {
+ reg = <0xe6950010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USBH1 0 0 0>;
+ };
+
+ intc_prio17 {
+ reg = <0xe6950014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USBH2 0 0 0>;
+ };
+
+ intc_prio18 {
+ reg = <0xe6950020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&HDMI 0 0 0>;
+ };
+
+ intc_prio19 {
+ reg = <0xe6950024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RSPI 0 0 0>;
+ };
+
+ intc_prio20 {
+ reg = <0xe6950028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SPU2 0 &FSI &FMSI>;
+ };
+
+ intc_prio21 {
+ reg = <0xe695002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &HDMI_SSS &HDMI_KEY 0>;
+ };
+
+ intc_prio22 {
+ reg = <0xe6950030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IPMMU 0 0 0>;
+ };
+
+ intc_prio23 {
+ reg = <0xe6950034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&AP_ARM2 0 0 0>;
+ };
+
+ intc_prio24 {
+ reg = <0xe6950038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15>;
+ };
+
+ intc_prio25 {
+ reg = <0xe695003c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &MMCIF_0 &MMCIF_1 &MMCIF_2>;
+ };
+
+ intc_prio26 {
+ reg = <0xe6950048 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SIM_ERI &SIM_RXI &SIM_TXI &SIM_TEI>;
+ };
+
+ intc_prio27 {
+ reg = <0xe695004c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3>;
+ };
+
+ intc_prio28 {
+ reg = <0xe6950050 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&STPRO_4 0 0 0>;
+ };
+ };
+ };
+
+ intca_irq_pins: interrupt-controller@1{
+ compatible = "renesas,sh_intc";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6900000 0x6c>;
+
+ IRQ0: intsrc1 { vector = <0x200>; };
+ IRQ1: intsrc2 { vector = <0x220>; };
+ IRQ2: intsrc3 { vector = <0x240>; };
+ IRQ3: intsrc4 { vector = <0x260>; };
+ IRQ4: intsrc5 { vector = <0x280>; };
+ IRQ5: intsrc6 { vector = <0x2a0>; };
+ IRQ6: intsrc7 { vector = <0x2c0>; };
+ IRQ7: intsrc8 { vector = <0x2e0>; };
+ IRQ8: intsrc9 { vector = <0x300>; };
+ IRQ9: intsrc10 { vector = <0x320>; };
+ IRQ10: intsrc11 { vector = <0x340>; };
+ IRQ11: intsrc12 { vector = <0x360>; };
+ IRQ12: intsrc13 { vector = <0x380>; };
+ IRQ13: intsrc14 { vector = <0x3a0>; };
+ IRQ14: intsrc15 { vector = <0x3c0>; };
+ IRQ15: intsrc16 { vector = <0x3e0>; };
+ IRQ16: intsrc17 { vector = <0x3200>; };
+ IRQ17: intsrc18 { vector = <0x3220>; };
+ IRQ18: intsrc19 { vector = <0x3240>; };
+ IRQ19: intsrc20 { vector = <0x3260>; };
+ IRQ20: intsrc21 { vector = <0x3280>; };
+ IRQ21: intsrc22 { vector = <0x32a0>; };
+ IRQ22: intsrc23 { vector = <0x32c0>; };
+ IRQ23: intsrc24 { vector = <0x32e0>; };
+ IRQ24: intsrc25 { vector = <0x3300>; };
+ IRQ25: intsrc26 { vector = <0x3320>; };
+ IRQ26: intsrc27 { vector = <0x3340>; };
+ IRQ27: intsrc28 { vector = <0x3360>; };
+ IRQ28: intsrc29 { vector = <0x3380>; };
+ IRQ29: intsrc30 { vector = <0x33a0>; };
+ IRQ30: intsrc31 { vector = <0x33c0>; };
+ IRQ31: intsrc32 { vector = <0x33e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5
+ &IRQ6 &IRQ7 &IRQ8 &IRQ9 &IRQ10
+ &IRQ11 &IRQ12 &IRQ13 &IRQ14 &IRQ15
+ &IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23 &IRQ24 &IRQ25
+ &IRQ26 &IRQ27 &IRQ28 &IRQ29 &IRQ30
+ &IRQ31>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900040 1>, <0xe6900060 1>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6900044 1>, <0xe6900064 1>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6900048 1>, <0xe6900068 1>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_mask3 {
+ reg = <0xe690004C 1>, <0xe690006C 1>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900010 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6900014 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6900018 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_prio3 {
+ reg = <0xe690001C 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900000 4>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe6900004 4>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_sense2 {
+ reg = <0xe6900008 4>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_sense3 {
+ reg = <0xe690000C 4>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900020 1>, <0x0 0>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_ack1 {
+ reg = <0xe6900024 1>, <0x0 0>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_ack2 {
+ reg = <0xe6900028 1>, <0x0 0>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_ack3 {
+ reg = <0xe690002C 1>, <0x0 0>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+ };
+ };
};
--
1.7.10.4
^ permalink raw reply related
* [PATCH 05/10] ARM: shmobile: Add DT table of INTC for sh7372
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/boot/dts/sh7372.dtsi | 784 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 784 insertions(+)
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 677fc60..2c033d3 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -18,4 +18,788 @@
compatible = "arm,cortex-a8";
};
};
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intca: interrupt-controller@0 {
+ compatible = "renesas,sh_intc";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+ group_size = <15>;
+
+ reg = <0xe6940000 0x200>, <0xe6950000 0x200>;
+
+ DIRC: intsrc1 { vector = <0x0560>; };
+ CRYPT_STD: intsrc2 { vector = <0x0700>; };
+ IIC1_ALI1: intsrc3 { vector = <0x0780>; };
+ IIC1_TACKI1:intsrc4 { vector = <0x07a0>; };
+ IIC1_WAITI1:intsrc5 { vector = <0x07c0>; };
+ IIC1_DTEI1: intsrc6 { vector = <0x07e0>; };
+ AP_ARM_IRQPMU: intsrc7 { vector = <0x0800>; };
+ AP_ARM_COMMTX: intsrc8 { vector = <0x0840>; };
+ AP_ARM_COMMRX: intsrc9 { vector = <0x0860>; };
+ MFI_MFIM: intsrc10 { vector = <0x0900>; };
+ MFI_MFIS: intsrc11 { vector = <0x0920>; };
+ BBIF1: intsrc12 { vector = <0x0940>; };
+ BBIF2: intsrc13 { vector = <0x0960>; };
+ USBHSDMAC0_USHDMI: intsrc14 { vector = <0x0a00>; };
+ _3DG_SGX540: intsrc15 { vector = <0x0a60>; };
+ CMT1_CMT10: intsrc16 { vector = <0x0b00>; };
+ CMT1_CMT11: intsrc17 { vector = <0x0b20>; };
+ CMT1_CMT12: intsrc18 { vector = <0x0b40>; };
+ CMT1_CMT13: intsrc19 { vector = <0x0b60>; };
+ CMT2: intsrc20 { vector = <0x0b80>; };
+ CMT3: intsrc21 { vector = <0x0ba0>; };
+ KEYSC_KEY: intsrc22 { vector = <0x0be0>; };
+ SCIFA0: intsrc23 { vector = <0x0c00>; };
+ SCIFA1: intsrc24 { vector = <0x0c20>; };
+ SCIFA2: intsrc25 { vector = <0x0c40>; };
+ SCIFA3: intsrc26 { vector = <0x0c60>; };
+ MSIOF2: intsrc27 { vector = <0x0c80>; };
+ MSIOF1: intsrc28 { vector = <0x0d00>; };
+ SCIFA4: intsrc29 { vector = <0x0d20>; };
+ SCIFA5: intsrc30 { vector = <0x0d40>; };
+ SCIFB: intsrc31 { vector = <0x0d60>; };
+ FLCTL_FLSTEI: intsrc32 { vector = <0x0d80>; };
+ FLCTL_FLTENDI: intsrc33 { vector = <0x0da0>; };
+ FLCTL_FLTREQ0I: intsrc34 { vector = <0x0dc0>; };
+ FLCTL_FLTREQ1I: intsrc35 { vector = <0x0de0>; };
+ SDHI0_SDHI0I0: intsrc36 { vector = <0x0e00>; };
+ SDHI0_SDHI0I1: intsrc37 { vector = <0x0e20>; };
+ SDHI0_SDHI0I2: intsrc38 { vector = <0x0e40>; };
+ SDHI0_SDHI0I3: intsrc39 { vector = <0x0e60>; };
+ SDHI1_SDHI1I0: intsrc40 { vector = <0x0e80>; };
+ SDHI1_SDHI1I1: intsrc41 { vector = <0x0ea0>; };
+ SDHI1_SDHI1I2: intsrc42 { vector = <0x0ec0>; };
+ IRREM: intsrc43 { vector = <0x0f60>; };
+ IRDA: intsrc44 { vector = <0x0480>; };
+ TPU0: intsrc45 { vector = <0x04a0>; };
+ TTI20: intsrc46 { vector = <0x1100>; };
+ DDM: intsrc47 { vector = <0x1140>; };
+ SDHI2_SDHI2I0: intsrc48 { vector = <0x1200>; };
+ SDHI2_SDHI2I1: intsrc49 { vector = <0x1220>; };
+ SDHI2_SDHI2I2: intsrc50 { vector = <0x1240>; };
+ SDHI2_SDHI2I3: intsrc51 { vector = <0x1260>; };
+ RWDT0: intsrc52 { vector = <0x1280>; };
+ DMAC1_1_DEI0: intsrc53 { vector = <0x2000>; };
+ DMAC1_1_DEI1: intsrc54 { vector = <0x2020>; };
+ DMAC1_1_DEI2: intsrc55 { vector = <0x2040>; };
+ DMAC1_1_DEI3: intsrc56 { vector = <0x2060>; };
+ DMAC1_2_DEI4: intsrc57 { vector = <0x2080>; };
+ DMAC1_2_DEI5: intsrc58 { vector = <0x20a0>; };
+ DMAC1_2_DADERR: intsrc59 { vector = <0x20c0>; };
+ DMAC2_1_DEI0: intsrc60 { vector = <0x2100>; };
+ DMAC2_1_DEI1: intsrc61 { vector = <0x2120>; };
+ DMAC2_1_DEI2: intsrc62 { vector = <0x2140>; };
+ DMAC2_1_DEI3: intsrc63 { vector = <0x2160>; };
+ DMAC2_2_DEI4: intsrc64 { vector = <0x2180>; };
+ DMAC2_2_DEI5: intsrc65 { vector = <0x21a0>; };
+ DMAC2_2_DADERR: intsrc66 { vector = <0x21c0>; };
+ DMAC3_1_DEI0: intsrc67 { vector = <0x2200>; };
+ DMAC3_1_DEI1: intsrc68 { vector = <0x2220>; };
+ DMAC3_1_DEI2: intsrc69 { vector = <0x2240>; };
+ DMAC3_1_DEI3: intsrc70 { vector = <0x2260>; };
+ DMAC3_2_DEI4: intsrc71 { vector = <0x2280>; };
+ DMAC3_2_DEI5: intsrc72 { vector = <0x22a0>; };
+ DMAC3_2_DADERR: intsrc73 { vector = <0x22c0>; };
+ SHWYSTAT_RT: intsrc74 { vector = <0x1300>; };
+ SHWYSTAT_HS: intsrc75 { vector = <0x1320>; };
+ SHWYSTAT_COM: intsrc76 { vector = <0x1340>; };
+ HDMI: intsrc77 { vector = <0x17e0>; };
+ SPU2_SPU0: intsrc78 { vector = <0x1800>; };
+ SPU2_SPU1: intsrc79 { vector = <0x1820>; };
+ FSI: intsrc80 { vector = <0x1840>; };
+ FMSI: intsrc81 { vector = <0x1860>; };
+ MIPI_HSI: intsrc82 { vector = <0x18e0>; };
+ IPMMU_IPMMUD: intsrc83 { vector = <0x1920>; };
+ CEC_1: intsrc84 { vector = <0x1940>; };
+ CEC_2: intsrc85 { vector = <0x1960>; };
+ AP_ARM_CTIIRQ: intsrc86 { vector = <0x1980>; };
+ AP_ARM_DMAEXTERRIRQ: intsrc87 { vector = <0x19a0>; };
+ AP_ARM_DMAIRQ: intsrc88 { vector = <0x19c0>; };
+ AP_ARM_DMASIRQ: intsrc89 { vector = <0x19e0>; };
+ MFIS2: intsrc90 { vector = <0x1a00>; };
+ CPORTR2S: intsrc91 { vector = <0x1a20>; };
+ CMT14: intsrc92 { vector = <0x1a40>; };
+ CMT15: intsrc93 { vector = <0x1a60>; };
+ MMC_MMC_ERR: intsrc94 { vector = <0x1ac0>; };
+ MMC_MMC_NOR: intsrc95 { vector = <0x1ae0>; };
+ IIC4_ALI4: intsrc96 { vector = <0x1b00>; };
+ IIC4_TACKI4: intsrc97 { vector = <0x1b20>; };
+ IIC4_WAITI4: intsrc98 { vector = <0x1b40>; };
+ IIC4_DTEI4: intsrc99 { vector = <0x1b60>; };
+ IIC3_ALI3: intsrc100 { vector = <0x1b80>; };
+ IIC3_TACKI3: intsrc101 { vector = <0x1ba0>; };
+ IIC3_WAITI3: intsrc102 { vector = <0x1bc0>; };
+ IIC3_DTEI3: intsrc103 { vector = <0x1be0>; };
+ USB0_USB0I1: intsrc104 { vector = <0x1c80>; };
+ USB0_USB0I0: intsrc105 { vector = <0x1ca0>; };
+ USB1_USB1I1: intsrc106 { vector = <0x1cc0>; };
+ USB1_USB1I0: intsrc107 { vector = <0x1ce0>; };
+ USBHSDMAC1_USHDMI: intsrc108 { vector = <0x1d00>; };
+
+ DMAC1_1: intc_group0 {
+ group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1
+ &DMAC1_1_DEI2 &DMAC1_1_DEI3>;
+ };
+
+ DMAC1_2: intc_group1 {
+ group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5
+ &DMAC1_2_DADERR>;
+ };
+
+ DMAC2_1: intc_group2 {
+ group = <&DMAC2_1_DEI0 &DMAC2_1_DEI1
+ &DMAC2_1_DEI2 &DMAC2_1_DEI3>;
+ };
+
+ DMAC2_2: intc_group3 {
+ group = <&DMAC2_2_DEI4 &DMAC2_2_DEI5
+ &DMAC2_2_DADERR>;
+ };
+
+ DMAC3_1: intc_group4 {
+ group = <&DMAC3_1_DEI0 &DMAC3_1_DEI1
+ &DMAC3_1_DEI2 &DMAC3_1_DEI3>;
+ };
+
+ DMAC3_2: intc_group5 {
+ group = <&DMAC3_2_DEI4 &DMAC3_2_DEI5
+ &DMAC3_2_DADERR>;
+ };
+
+ AP_ARM1: intc_group6 {
+ group = <&AP_ARM_IRQPMU &AP_ARM_COMMTX
+ &AP_ARM_COMMRX>;
+ };
+
+ AP_ARM2: intc_group7 {
+ group = <&AP_ARM_CTIIRQ &AP_ARM_DMAEXTERRIRQ
+ &AP_ARM_DMAIRQ &AP_ARM_DMASIRQ>;
+ };
+
+ SPU2: intc_group8 {
+ group = <&SPU2_SPU0 &SPU2_SPU1>;
+ };
+
+ FLCTL: intc_group9 {
+ group = <&FLCTL_FLSTEI &FLCTL_FLTENDI
+ &FLCTL_FLTREQ0I &FLCTL_FLTREQ1I>;
+ };
+
+ IIC1: intc_group10 {
+ group = <&IIC1_ALI1 &IIC1_TACKI1 &IIC1_WAITI1
+ &IIC1_DTEI1>;
+ };
+
+ SDHI0: intc_group11 {
+ group = <&SDHI0_SDHI0I0 &SDHI0_SDHI0I1
+ &SDHI0_SDHI0I2 &SDHI0_SDHI0I3>;
+ };
+
+ SDHI1: intc_group12 {
+ group = <&SDHI1_SDHI1I0 &SDHI1_SDHI1I1
+ &SDHI1_SDHI1I2>;
+ };
+
+ SDHI2: intc_group13 {
+ group = <&SDHI2_SDHI2I0 &SDHI2_SDHI2I1
+ &SDHI2_SDHI2I2 &SDHI2_SDHI2I3>;
+ };
+
+ SHWYSTAT: intc_group14 {
+ group = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM>;
+ };
+
+ intc_vectors {
+ vector_table = <&DIRC &CRYPT_STD
+ &IIC1_ALI1 &IIC1_TACKI1 &IIC1_WAITI1 &IIC1_DTEI1
+ &AP_ARM_IRQPMU &AP_ARM_COMMTX &AP_ARM_COMMRX
+ &MFI_MFIM &MFI_MFIS &BBIF1 &BBIF2
+ &USBHSDMAC0_USHDMI
+ &_3DG_SGX540
+ &CMT1_CMT10 &CMT1_CMT11 &CMT1_CMT12
+ &CMT1_CMT13 &CMT2 &CMT3
+ &KEYSC_KEY
+ &SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3
+ &MSIOF2 &MSIOF1
+ &SCIFA4 &SCIFA5 &SCIFB
+ &FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I
+ &FLCTL_FLTREQ1I
+ &SDHI0_SDHI0I0 &SDHI0_SDHI0I1 &SDHI0_SDHI0I2
+ &SDHI0_SDHI0I3
+ &SDHI1_SDHI1I0 &SDHI1_SDHI1I1 &SDHI1_SDHI1I2
+ &IRREM &IRDA &TPU0 &TTI20 &DDM
+ &SDHI2_SDHI2I0 &SDHI2_SDHI2I1 &SDHI2_SDHI2I2
+ &SDHI2_SDHI2I3
+ &RWDT0
+ &DMAC1_1_DEI0 &DMAC1_1_DEI1 &DMAC1_1_DEI2
+ &DMAC1_1_DEI3
+ &DMAC1_2_DEI4 &DMAC1_2_DEI5 &DMAC1_2_DADERR
+ &DMAC2_1_DEI0 &DMAC2_1_DEI1 &DMAC2_1_DEI2
+ &DMAC2_1_DEI3
+ &DMAC2_2_DEI4 &DMAC2_2_DEI5 &DMAC2_2_DADERR
+ &DMAC3_1_DEI0 &DMAC3_1_DEI1 &DMAC3_1_DEI2
+ &DMAC3_1_DEI3
+ &DMAC3_2_DEI4 &DMAC3_2_DEI5 &DMAC3_2_DADERR
+ &SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM
+ &HDMI
+ &SPU2_SPU0 &SPU2_SPU1
+ &FSI &FMSI
+ &MIPI_HSI
+ &IPMMU_IPMMUD
+ &CEC_1 &CEC_2
+ &AP_ARM_CTIIRQ &AP_ARM_DMAEXTERRIRQ &AP_ARM_DMAIRQ
+ &AP_ARM_DMASIRQ
+ &MFIS2
+ &CPORTR2S
+ &CMT14 &CMT15
+ &MMC_MMC_ERR &MMC_MMC_NOR
+ &IIC4_ALI4 &IIC4_TACKI4 &IIC4_WAITI4 &IIC4_DTEI4
+ &IIC3_ALI3 &IIC3_TACKI3 &IIC3_WAITI3 &IIC3_DTEI3
+ &USB0_USB0I1 &USB0_USB0I0
+ &USB1_USB1I1 &USB1_USB1I0
+ &USBHSDMAC1_USHDMI>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6940080 1>, <0xe69400c0 1>;
+ reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1
+ &DMAC2_1_DEI0 &AP_ARM_IRQPMU 0 &AP_ARM_COMMTX
+ &AP_ARM_COMMRX>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6940084 1>, <0xe69400c4 1>;
+ reginfo = <0 &CRYPT_STD &DIRC 0 &DMAC1_1_DEI3 &DMAC1_1_DEI2
+ &DMAC1_1_DEI1 &DMAC1_1_DEI0>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6940088 1>, <0xe69400c8 1>;
+ reginfo = <0 0 0 0 &BBIF1 &BBIF2 &MFI_MFIS &MFI_MFIM>;
+ };
+
+ intc_mask3 {
+ reg = <0xe694008c 1>, <0xe69400cc 1>;
+ reginfo = <&DMAC3_1_DEI3 &DMAC3_1_DEI2 &DMAC3_1_DEI1
+ &DMAC3_1_DEI0 &DMAC3_2_DADERR &DMAC3_2_DEI5
+ &DMAC3_2_DEI4 &IRDA>;
+ };
+
+ intc_mask4 {
+ reg = <0xe6940090 1>, <0xe69400d0 1>;
+ reginfo = <&DDM 0 0 0 0 0 0 0>;
+ };
+
+ intc_mask5 {
+ reg = <0xe6940094 1>, <0xe69400d4 1>;
+ reginfo = <&KEYSC_KEY &DMAC1_2_DADERR &DMAC1_2_DEI5
+ &DMAC1_2_DEI4 &SCIFA3 &SCIFA2 &SCIFA1 &SCIFA0>;
+ };
+
+ intc_mask6 {
+ reg = <0xe6940098 1>, <0xe69400d8 1>;
+ reginfo = <&SCIFB &SCIFA5 &SCIFA4 &MSIOF1 0 0 &MSIOF2 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xe694009c 1>, <0xe69400dc 1>;
+ reginfo = <&SDHI0_SDHI0I3 &SDHI0_SDHI0I2 &SDHI0_SDHI0I1
+ &SDHI0_SDHI0I0 &FLCTL_FLTREQ1I &FLCTL_FLTREQ0I
+ &FLCTL_FLTENDI &FLCTL_FLSTEI>;
+ };
+
+ intc_mask8 {
+ reg = <0xe69400a0 1>, <0xe69400e0 1>;
+ reginfo = <0 &SDHI1_SDHI1I2 &SDHI1_SDHI1I1 &SDHI1_SDHI1I0
+ &TTI20 &USBHSDMAC0_USHDMI 0 0>;
+ };
+
+ intc_mask9 {
+ reg = <0xe69400a4 1>, <0xe69400e4 1>;
+ reginfo = <&CMT1_CMT13 &CMT1_CMT12 &CMT1_CMT11 &CMT1_CMT10
+ &CMT2 0 0 &_3DG_SGX540>;
+ };
+
+ intc_mask10 {
+ reg = <0xe69400a8 1>, <0xe69400e8 1>;
+ reginfo = <0 &DMAC2_2_DADERR &DMAC2_2_DEI5 &DMAC2_2_DEI4
+ 0 0 0 0>;
+ };
+
+ intc_mask11 {
+ reg = <0xe69400ac 1>, <0xe69400ec 1>;
+ reginfo = <&IIC1_DTEI1 &IIC1_WAITI1 &IIC1_TACKI1
+ &IIC1_ALI1 0 0 &IRREM 0>;
+ };
+
+ intc_mask12 {
+ reg = <0xe69400b0 1>, <0xe69400f0 1>;
+ reginfo = <0 0 &TPU0 0 0 0 0 0>;
+ };
+
+ intc_mask13 {
+ reg = <0xe69400b4 1>, <0xe69400f4 1>;
+ reginfo = <&SDHI2_SDHI2I3 &SDHI2_SDHI2I2 &SDHI2_SDHI2I1
+ &SDHI2_SDHI2I0 0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_mask14 {
+ reg = <0xe6950080 1>, <0xe69500c0 1>;
+ reginfo = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM
+ 0 0 0 0 0>;
+ };
+
+ intc_mask15 {
+ reg = <0xe6950090 1>, <0xe69500d0 1>;
+ reginfo = <0 0 0 0 0 0 0 &HDMI>;
+ };
+
+ intc_mask16 {
+ reg = <0xe6950094 1>, <0xe69500d4 1>;
+ reginfo = <&SPU2_SPU0 &SPU2_SPU1 &FSI &FMSI
+ 0 0 0 &MIPI_HSI>;
+ };
+
+ intc_mask17 {
+ reg = <0xe6950098 1>, <0xe69500d8 1>;
+ reginfo = <0 &IPMMU_IPMMUD &CEC_1 &CEC_2
+ &AP_ARM_CTIIRQ &AP_ARM_DMAEXTERRIRQ
+ &AP_ARM_DMAIRQ &AP_ARM_DMASIRQ>;
+ };
+
+ intc_mask18 {
+ reg = <0xe695009c 1>, <0xe69500dc 1>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15
+ 0 0 &MMC_MMC_ERR &MMC_MMC_NOR>;
+ };
+
+ intc_mask19 {
+ reg = <0xe69500a0 1>, <0xe69500e0 1>;
+ reginfo = <&IIC4_ALI4 &IIC4_TACKI4 &IIC4_WAITI4
+ &IIC4_DTEI4 &IIC3_ALI3 &IIC3_TACKI3
+ &IIC3_WAITI3 &IIC3_DTEI3>;
+ };
+
+ intc_mask20 {
+ reg = <0xe69500a4 1>, <0xe69500e4 1>;
+ reginfo = <0 0 0 0 &USB0_USB0I1 &USB0_USB0I0
+ &USB1_USB1I1 &USB1_USB1I0>;
+ };
+
+ intc_mask21 {
+ reg = <0xe69500a8 1>, <0xe69500e8 1>;
+ reginfo = <&USBHSDMAC1_USHDMI 0 0 0 0 0 0 0>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6940000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 0>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6940004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRDA 0 &BBIF1 &BBIF2>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6940008 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CRYPT_STD &CMT1_CMT11 &AP_ARM1>;
+ };
+
+ intc_prio3 {
+ reg = <0xe694000c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &CMT1_CMT12 0>;
+ };
+
+ intc_prio4 {
+ reg = <0xe6940010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC1_1 &MFI_MFIS &MFI_MFIM 0>;
+ };
+
+ intc_prio5 {
+ reg = <0xe6940014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&KEYSC_KEY &DMAC1_2 &_3DG_SGX540 &CMT1_CMT10>;
+ };
+
+ intc_prio6 {
+ reg = <0xe6940018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3>;
+ };
+
+ intc_prio7 {
+ reg = <0xe694001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF2 &USBHSDMAC0_USHDMI &FLCTL &SDHI0>;
+ };
+
+ intc_prio8 {
+ reg = <0xe6940020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF1 &SCIFA4 0 &IIC1>;
+ };
+
+ intc_prio9 {
+ reg = <0xe6940024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC2_1 &DMAC2_2 0 &TTI20>;
+ };
+
+ intc_prio10 {
+ reg = <0xe6940028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT1_CMT13 &IRREM &SDHI1>;
+ };
+
+ intc_prio11 {
+ reg = <0xe694002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TPU0 0 0 0>;
+ };
+
+ intc_prio12 {
+ reg = <0xe6940030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_prio13 {
+ reg = <0xe6940034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFB &SCIFA5 0 &DDM>;
+ };
+
+ intc_prio14 {
+ reg = <0xe6940038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &DIRC &SDHI2>;
+ };
+
+ intc_prio15 {
+ reg = <0xe6950000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SHWYSTAT 0 0 0>;
+ };
+
+ intc_prio16 {
+ reg = <0xe6950024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &HDMI>;
+ };
+
+ intc_prio17 {
+ reg = <0xe6950028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SPU2 0 &FSI &FMSI>;
+ };
+
+ intc_prio18 {
+ reg = <0xe695002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &MIPI_HSI>;
+ };
+
+ intc_prio19 {
+ reg = <0xe6950030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IPMMU_IPMMUD 0 &CEC_1 &CEC_2>;
+ };
+
+ intc_prio20 {
+ reg = <0xe6950034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&AP_ARM2 0 0 0>;
+ };
+
+ intc_prio21 {
+ reg = <0xe6950038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15>;
+ };
+
+ intc_prio22 {
+ reg = <0xe695003c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &MMC_MMC_ERR &MMC_MMC_NOR>;
+ };
+
+ intc_prio23 {
+ reg = <0xe6950040 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IIC4_ALI4 &IIC4_TACKI4 &IIC4_WAITI4 &IIC4_DTEI4>;
+ };
+
+ intc_prio24 {
+ reg = <0xe6950044 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IIC3_ALI3 &IIC3_TACKI3 &IIC3_WAITI3 &IIC3_DTEI3>;
+ };
+
+ intc_prio25 {
+ reg = <0xe6950048 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 0>;
+ };
+
+ intc_prio26 {
+ reg = <0xe695004c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USB0_USB0I1 &USB0_USB0I0 &USB1_USB1I1 &USB1_USB1I0>;
+ };
+
+ intc_prio27 {
+ reg = <0xe6950050 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USBHSDMAC1_USHDMI 0 0 0>;
+ };
+
+ };
+ };
+
+ intca_irq_pins_lo: interrupt-controller@1 {
+ compatible = "renesas,sh_intc";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6900000 0x70>;
+
+ IRQ0: intsrc1 { vector = <0x200>; };
+ IRQ1: intsrc2 { vector = <0x220>; };
+ IRQ2: intsrc3 { vector = <0x240>; };
+ IRQ3: intsrc4 { vector = <0x260>; };
+ IRQ4: intsrc5 { vector = <0x280>; };
+ IRQ5: intsrc6 { vector = <0x2a0>; };
+ IRQ6: intsrc7 { vector = <0x2c0>; };
+ IRQ7: intsrc8 { vector = <0x2e0>; };
+ IRQ8: intsrc9 { vector = <0x300>; };
+ IRQ9: intsrc10 { vector = <0x320>; };
+ IRQ10: intsrc11 { vector = <0x340>; };
+ IRQ11: intsrc12 { vector = <0x360>; };
+ IRQ12: intsrc13 { vector = <0x380>; };
+ IRQ13: intsrc14 { vector = <0x3a0>; };
+ IRQ14: intsrc15 { vector = <0x3c0>; };
+ IRQ15: intsrc16 { vector = <0x3e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5
+ &IRQ6 &IRQ7 &IRQ8 &IRQ9 &IRQ10
+ &IRQ11 &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900040 1>, <0xe6900060 1>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6900044 1>, <0xe6900064 1>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900010 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6900014 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900000 4>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe6900004 4>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900020 1>, <0x0 0>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_ack1 {
+ reg = <0xe6900024 1>, <0x0 0>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+ };
+
+ intca_irq_pins_hi: interrupt-controller@2 {
+ compatible = "renesas,sh_intc";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6900008 0x70>;
+
+ IRQ16: intsrc1 { vector = <0x3200>; };
+ IRQ17: intsrc2 { vector = <0x3220>; };
+ IRQ18: intsrc3 { vector = <0x3240>; };
+ IRQ19: intsrc4 { vector = <0x3260>; };
+ IRQ20: intsrc5 { vector = <0x3280>; };
+ IRQ21: intsrc6 { vector = <0x32a0>; };
+ IRQ22: intsrc7 { vector = <0x32c0>; };
+ IRQ23: intsrc8 { vector = <0x32e0>; };
+ IRQ24: intsrc9 { vector = <0x3300>; };
+ IRQ25: intsrc10 { vector = <0x3320>; };
+ IRQ26: intsrc11 { vector = <0x3340>; };
+ IRQ27: intsrc12 { vector = <0x3360>; };
+ IRQ28: intsrc13 { vector = <0x3380>; };
+ IRQ29: intsrc14 { vector = <0x33a0>; };
+ IRQ30: intsrc15 { vector = <0x33c0>; };
+ IRQ31: intsrc16 { vector = <0x33e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20 &IRQ21
+ &IRQ22 &IRQ23 &IRQ24 &IRQ25 &IRQ26
+ &IRQ27 &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900048 1>, <0xe6900068 1>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_mask1 {
+ reg = <0xe690004c 1>, <0xe690006c 1>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900018 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_prio1 {
+ reg = <0xe690001c 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900008 4>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_sense1 {
+ reg = <0xe690000c 4>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900028 1>, <0x0 0>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_ack1 {
+ reg = <0xe690002c 1>, <0x0 0>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+ };
+ };
};
--
1.7.10.4
^ permalink raw reply related
* [PATCH 04/10] ARM: shmobile: Add support OF of INTC for sh7372
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This CPU has four interrupt controllers (INTCA, pins-High and pins-Low).
This supports these.
Note: This supports DT of INTCA only.
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/include/mach/common.h | 1 +
arch/arm/mach-shmobile/intc-sh7372.c | 113 ++++++++++++++++++++------
2 files changed, 89 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 8402b5d..444dfed 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -36,6 +36,7 @@ extern void sh7377_pinmux_init(void);
extern struct clk sh7377_extalc1_clk;
extern struct clk sh7377_extal2_clk;
+extern void sh7372_init_irq_of(void);
extern void sh7372_init_irq(void);
extern void sh7372_map_io(void);
extern void sh7372_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index a91caad..85486f0 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -16,6 +16,8 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#define pr_fmt(fmt) "intc: " fmt
+
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
@@ -551,23 +553,28 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc)
static void __iomem *intcs_ffd2;
static void __iomem *intcs_ffd5;
-
-void __init sh7372_init_irq(void)
+static void __iomem *intca_e694;
+static void __iomem *intca_e695;
+
+static void __init sh7372_init_intc(resource_size_t intca0_start,
+ resource_size_t intca1_start,
+ resource_size_t intcs0_start,
+ resource_size_t intcs1_start,
+ unsigned short vect)
{
void __iomem *intevtsa;
int n;
- intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
- intevtsa = intcs_ffd2 + 0x100;
- intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
+ intca_e694 = IOMEM(intca0_start);
+ intca_e695 = IOMEM(intca1_start);
- register_intc_controller(&intca_desc);
- register_intc_controller(&intca_irq_pins_lo_desc);
- register_intc_controller(&intca_irq_pins_hi_desc);
- register_intc_controller(&intcs_desc);
+ intcs_ffd2 = ioremap_nocache(intcs0_start, PAGE_SIZE);
+ intevtsa = intcs_ffd2 + 0x100;
+ intcs_ffd5 = ioremap_nocache(intcs1_start, PAGE_SIZE);
/* setup dummy cascade chip for INTCS */
- n = evt2irq(0xf80);
+ n = evt2irq(vect);
+
irq_alloc_desc_at(n, numa_node_id());
irq_set_chip_and_handler_name(n, &dummy_irq_chip,
handle_level_irq, "level");
@@ -581,6 +588,65 @@ void __init sh7372_init_irq(void)
iowrite16(0, intcs_ffd2 + 0x104);
}
+#ifdef CONFIG_OF
+static unsigned short intevtsa_vect;
+
+#define INTC_RES_MAX 2
+static struct {
+ struct intc_desc intc_desc;
+ struct resource intc_res[INTC_RES_MAX];
+} intc_data __initdata;
+
+static int __init intc_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret, i;
+
+ memset(&intc_data, 0, sizeof(intc_data));
+
+ for (i = 0; i < INTC_RES_MAX; i++) {
+ ret = of_address_to_resource(np, i, &intc_data.intc_res[i]);
+ if (ret < 0)
+ break;
+ }
+
+ intc_data.intc_desc.name = (char *)of_node_full_name(np);
+ intc_data.intc_desc.resource = intc_data.intc_res;
+ intc_data.intc_desc.num_resources = i;
+
+ ret = of_sh_intc_get_intc(np, &intc_data.intc_desc);
+ if (ret)
+ return ret;
+
+ of_sh_intc_get_intevtsa_vect(np, &intevtsa_vect);
+
+ register_intc_controller(&intc_data.intc_desc);
+ return 0;
+}
+
+static const struct of_device_id irq_of_match[] __initconst = {
+ { .compatible = "renesas,sh_intc", .data = intc_of_init },
+ { /*sentinel*/ }
+};
+
+void __init sh7372_init_irq_of(void)
+{
+ of_irq_init(irq_of_match);
+
+ register_intc_controller(&intcs_desc);
+}
+#endif /* CONFIG_OF */
+
+void __init sh7372_init_irq(void)
+{
+ register_intc_controller(&intca_desc);
+ register_intc_controller(&intca_irq_pins_lo_desc);
+ register_intc_controller(&intca_irq_pins_hi_desc);
+ register_intc_controller(&intcs_desc);
+
+ sh7372_init_intc(0xe6940000, 0xe6950000, 0xffd20000, 0xffd50000, 0xf80);
+}
+
static unsigned short ffd2[0x200];
static unsigned short ffd5[0x100];
@@ -624,9 +690,6 @@ void sh7372_intcs_resume(void)
__raw_writeb(ffd5[k], intcs_ffd5 + k);
}
-#define E694_BASE IOMEM(0xe6940000)
-#define E695_BASE IOMEM(0xe6950000)
-
static unsigned short e694[0x200];
static unsigned short e695[0x200];
@@ -635,22 +698,22 @@ void sh7372_intca_suspend(void)
int k;
for (k = 0x00; k <= 0x38; k += 4)
- e694[k] = __raw_readw(E694_BASE + k);
+ e694[k] = __raw_readw(intca_e694 + k);
for (k = 0x80; k <= 0xb4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
+ e694[k] = __raw_readb(intca_e694 + k);
for (k = 0x180; k <= 0x1b4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
+ e694[k] = __raw_readb(intca_e694 + k);
for (k = 0x00; k <= 0x50; k += 4)
- e695[k] = __raw_readw(E695_BASE + k);
+ e695[k] = __raw_readw(intca_e695 + k);
for (k = 0x80; k <= 0xa8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
+ e695[k] = __raw_readb(intca_e695 + k);
for (k = 0x180; k <= 0x1a8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
+ e695[k] = __raw_readb(intca_e695 + k);
}
void sh7372_intca_resume(void)
@@ -658,20 +721,20 @@ void sh7372_intca_resume(void)
int k;
for (k = 0x00; k <= 0x38; k += 4)
- __raw_writew(e694[k], E694_BASE + k);
+ __raw_writew(e694[k], intca_e694 + k);
for (k = 0x80; k <= 0xb4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
+ __raw_writeb(e694[k], intca_e694 + k);
for (k = 0x180; k <= 0x1b4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
+ __raw_writeb(e694[k], intca_e694 + k);
for (k = 0x00; k <= 0x50; k += 4)
- __raw_writew(e695[k], E695_BASE + k);
+ __raw_writew(e695[k], intca_e695 + k);
for (k = 0x80; k <= 0xa8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
+ __raw_writeb(e695[k], intca_e695 + k);
for (k = 0x180; k <= 0x1a8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
+ __raw_writeb(e695[k], intca_e695 + k);
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH 03/10] ARM: shmobile: Add support OF of INTC for r8a7740
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This CPU has three interrupt controllers (INTCA and INTCA IRQ pins).
This supports these.
NOTE: This supports DT of INTCA only.
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/include/mach/common.h | 1 +
arch/arm/mach-shmobile/intc-r8a7740.c | 70 +++++++++++++++++++++++---
2 files changed, 65 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index d47e215..8402b5d 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -59,6 +59,7 @@ extern struct clk sh73a0_extal2_clk;
extern struct clk sh73a0_extcki_clk;
extern struct clk sh73a0_extalr_clk;
+extern void r8a7740_init_irq_of(void);
extern void r8a7740_init_irq(void);
extern void r8a7740_map_io(void);
extern void r8a7740_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
index 9a69a31..cde5cc3 100644
--- a/arch/arm/mach-shmobile/intc-r8a7740.c
+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
@@ -1,8 +1,9 @@
/*
* R8A7740 processor support
*
- * Copyright (C) 2011 Renesas Solutions Corp.
+ * Copyright (C) 2011, 2012 Renesas Solutions Corp.
* Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,6 +18,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#define pr_fmt(fmt) "intc: " fmt
#include <linux/kernel.h>
#include <linux/init.h>
@@ -623,15 +625,71 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(intcs_evt2irq(evtcodeas));
}
-void __init r8a7740_init_irq(void)
+static void __init r8a7740_init_intc(resource_size_t intcs0_start,
+ unsigned short vect)
+{
+ void __iomem *intevtsa;
+
+ /* demux using INTEVTSA */
+ intevtsa = ioremap_nocache(intcs0_start + 0x100, PAGE_SIZE);
+ irq_set_handler_data(evt2irq(vect), (void *)intevtsa);
+ irq_set_chained_handler(evt2irq(vect), intcs_demux);
+}
+
+#ifdef CONFIG_OF
+static unsigned short intevtsa_vect;
+
+#define INTC_RES_MAX 2
+static struct {
+ struct intc_desc intc_desc;
+ struct resource intc_res[INTC_RES_MAX];
+} intc_data __initdata;
+
+static int __init intc_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret, i;
+
+ memset(&intc_data, 0, sizeof(intc_data));
+
+ for (i = 0; i < INTC_RES_MAX; i++) {
+ ret = of_address_to_resource(np, i, &intc_data.intc_res[i]);
+ if (ret < 0)
+ break;
+ }
+
+ intc_data.intc_desc.name = (char *)of_node_full_name(np);
+ intc_data.intc_desc.resource = intc_data.intc_res;
+ intc_data.intc_desc.num_resources = i;
+
+ ret = of_sh_intc_get_intc(np, &intc_data.intc_desc);
+ if (ret)
+ return ret;
+
+ of_sh_intc_get_intevtsa_vect(np, &intevtsa_vect);
+
+ register_intc_controller(&intc_data.intc_desc);
+ return 0;
+}
+
+static const struct of_device_id irq_of_match[] __initconst = {
+ { .compatible = "renesas,sh_intc", .data = intc_of_init },
+ { /*sentinel*/ }
+};
+
+void __init r8a7740_init_irq_of(void)
{
- void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+ of_irq_init(irq_of_match);
+ register_intc_controller(&intcs_desc);
+}
+#endif /* CONFIG_OF */
+
+void __init r8a7740_init_irq(void)
+{
register_intc_controller(&intca_desc);
register_intc_controller(&intca_irq_pins_desc);
register_intc_controller(&intcs_desc);
- /* demux using INTEVTSA */
- irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
- irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
+ r8a7740_init_intc(0xffd20000, 0xf80);
}
--
1.7.10.4
^ permalink raw reply related
* [PATCH 02/10] SH: intc: Add support OF of IRQ
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Add information of device node to struct intc_desc.
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
v7
* Delete "renesas,sh_intcs" and "renesas,sh_intca_irq_pins" as compatible.
Update their documentation.
* Remove of_sh_intc_get_meminfo() and of_sh_intc_get_pint and
of_sh_intc_get_intc(). They are not used.
v2 - v6
* No change
---
Documentation/devicetree/bindings/sh/intc.txt | 15 +----
drivers/sh/intc/core.c | 2 +-
drivers/sh/intc/internals.h | 3 +-
drivers/sh/intc/irqdomain.c | 6 +-
drivers/sh/intc/of_intc.c | 76 -------------------------
include/linux/sh_intc.h | 29 +---------
6 files changed, 9 insertions(+), 122 deletions(-)
diff --git a/Documentation/devicetree/bindings/sh/intc.txt b/Documentation/devicetree/bindings/sh/intc.txt
index ebb2398..04b7f73 100644
--- a/Documentation/devicetree/bindings/sh/intc.txt
+++ b/Documentation/devicetree/bindings/sh/intc.txt
@@ -7,10 +7,7 @@ is managed by DT, in order to maintain compatibility.
Main node required properties:
-- compatible : should be one of:
- "renesas,sh_intca"
- "renesas,sh_intcs"
- "renesas,sh_intca_irq_pins"
+- compatible : "renesas,sh_intc"
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Set already 1.
@@ -100,18 +97,10 @@ Optional:
This node required properties:
* vector : This specifies the address phandle of INTCS.
-Note:
-- "renesas,sh_intca" needs group_size, intc_group*, intc_vectors,
- intc_mask_registers and intc_prio_registers.
-- "renesas,sh_intcs" needs group_size, intc_group*, intc_vectors,
- intc_mask_registers, intc_prio_registers and intc_intevtsa.
-- "renesas,sh_intca_irq_pins" needs intc_vectors, intc_mask_registers,
- intc_prio_registers, intc_sense_registers and intc_ack_registers.
-
Example:
intca: interrupt-controller@0 {
- compatible = "renesas,sh_intca";
+ compatible = "renesas,sh_intc";
interrupt-controller;
#address-cells = <1>;
#size-cells = <1>;
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
index 8f32a13..3963af3 100644
--- a/drivers/sh/intc/core.c
+++ b/drivers/sh/intc/core.c
@@ -311,7 +311,7 @@ int __init register_intc_controller(struct intc_desc *desc)
BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
- intc_irq_domain_init(d, hw);
+ intc_irq_domain_init(d, hw, desc->of_node);
/* register the vectors one by one */
for (i = 0; i < hw->nr_vectors; i++) {
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index 7dff08e..e6f64bf 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -190,7 +190,8 @@ void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
intc_enum enum_id, int enable);
/* irqdomain.c */
-void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
+void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw,
+ struct device_node *of_node);
/* virq.c */
void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
diff --git a/drivers/sh/intc/irqdomain.c b/drivers/sh/intc/irqdomain.c
index 3968f1c..c56c736 100644
--- a/drivers/sh/intc/irqdomain.c
+++ b/drivers/sh/intc/irqdomain.c
@@ -42,7 +42,7 @@ static const struct irq_domain_ops intc_evt_ops = {
};
void __init intc_irq_domain_init(struct intc_desc_int *d,
- struct intc_hw_desc *hw)
+ struct intc_hw_desc *hw, struct device_node *np)
{
unsigned int irq_base, irq_end;
@@ -59,10 +59,10 @@ void __init intc_irq_domain_init(struct intc_desc_int *d,
* tree penalty for linear cases with non-zero hwirq bases.
*/
if (irq_base = 0 && irq_end = (irq_base + hw->nr_vectors - 1))
- d->domain = irq_domain_add_linear(NULL, hw->nr_vectors,
+ d->domain = irq_domain_add_linear(np, hw->nr_vectors,
&intc_evt_ops, NULL);
else
- d->domain = irq_domain_add_tree(NULL, &intc_evt_ops, NULL);
+ d->domain = irq_domain_add_tree(np, &intc_evt_ops, NULL);
BUG_ON(!d->domain);
}
diff --git a/drivers/sh/intc/of_intc.c b/drivers/sh/intc/of_intc.c
index 04b0732..8a466f7 100644
--- a/drivers/sh/intc/of_intc.c
+++ b/drivers/sh/intc/of_intc.c
@@ -530,49 +530,6 @@ void __init of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
d->skip_syscore_suspend = false;
}
-int __init of_sh_intc_get_meminfo(struct device_node *np,
- struct resource *res, int res_no)
-{
- int ret = 0, i;
-
- for (i = 0 ; i < res_no ; i++) {
- ret = of_address_to_resource(np, i, &res[i]);
- if (ret) {
- pr_err("could not determine device base address\n");
- return ret;
- }
-
- pr_debug("%s: Address 0x%x, size %d\n",
- __func__, res[i].start, resource_size(&res[i]));
- }
-
- return ret;
-}
-
-int __init of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d)
-{
- /* pint uses vector, mask and sence. */
- int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
- &d->hw.nr_vectors);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
- &d->hw.nr_mask_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
- &d->hw.nr_sense_regs);
- /* INTC may not need Sence register. */
- if (ret && ret != -ENOENT)
- return ret;
-
- d->of_node = np;
-
- return 0;
-}
-
int __init of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d)
{
int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
@@ -612,36 +569,3 @@ int __init of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d)
return 0;
}
-
-int __init of_sh_intc_get_intc_pins(struct device_node *np,
- struct intc_desc *d)
-{
- int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
- &d->hw.nr_vectors);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
- &d->hw.nr_mask_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_prio(np, &d->hw.prio_regs,
- &d->hw.nr_prio_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
- &d->hw.nr_sense_regs);
- if (ret)
- return ret;
-
- ret = of_sh_intc_get_ack(np, &d->hw.ack_regs,
- &d->hw.nr_ack_regs);
- if (ret)
- return ret;
-
- d->of_node = np;
-
- return 0;
-}
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index b0e7925..c7954ee 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -118,6 +118,7 @@ struct intc_desc {
intc_enum force_disable;
bool skip_syscore_suspend;
struct intc_hw_desc hw;
+ struct device_node *of_node;
};
#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
@@ -160,26 +161,6 @@ static inline int register_intc_userimask(unsigned long addr)
int of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d);
/*
- * of_sh_initc_get_intc_pins() - Get INTC Pins table.
- * @np: device node to get INTC from
- * @d: a pointer of intc pins table
- *
- * Return: one of the errno value on the error condition
- */
-int of_sh_intc_get_intc_pins(struct device_node *np, struct intc_desc *d);
-
-/*
- * of_sh_intc_get_meminfo() - Get and set INTC register of memory.
- * @np: device node to get INTC from
- * @res_mem: a pointer of resource
- * @res_no: resource number
- *
- * Return: one of the errno value on the error condition
- */
-int of_sh_intc_get_meminfo(struct device_node *np,
- struct resource *res_mem, int resno);
-
-/*
* of_sh_intc_get_force_enable - Get and set force_enable vector in
* struct intc_desc.
* @np: device node to get INTC from
@@ -220,13 +201,5 @@ void of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
* Return: one of the errno value on the error condition
*/
int of_sh_intc_get_intevtsa_vect(struct device_node *np, unsigned short *vect);
-/*
- * of_sh_initc_get_intc_pint() - Get INTC Pint table.
- * @np: device node to get INTC from
- * @d: a pointer of intc pint table
- *
- * Return: one of the errno value on the error condition
- */
-int of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d);
#endif /* __SH_INTC_H */
--
1.7.10.4
^ permalink raw reply related
* [PATCH 01/10] ARM: shmobile: Add support OF for INTC of shmobile
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355562224-29448-1-git-send-email-horms+renesas@verge.net.au>
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This provides OF support of SH/INTC.
The SH/INTC driver is used by SuperH and ARM/SH-MOBILE.
At the moment, SuperH does not have the plan corresponding to DT.
DT of SH/INTC has taken the form where the table data of the C
is managed by DT, in order to maintain compatibility.
Cc: Magnus Damm <damm@opensource.se>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
Documentation/devicetree/bindings/sh/intc.txt | 163 +++++++
drivers/sh/intc/Makefile | 1 +
drivers/sh/intc/of_intc.c | 647 +++++++++++++++++++++++++
include/linux/sh_intc.h | 83 ++++
4 files changed, 894 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sh/intc.txt
create mode 100644 drivers/sh/intc/of_intc.c
diff --git a/Documentation/devicetree/bindings/sh/intc.txt b/Documentation/devicetree/bindings/sh/intc.txt
new file mode 100644
index 0000000..ebb2398
--- /dev/null
+++ b/Documentation/devicetree/bindings/sh/intc.txt
@@ -0,0 +1,163 @@
+* Renesas SuperH / SH-MOBILE Interrupt Controller
+
+The SH/INTC driver is used by SuperH and ARM/SH-MOBILE.
+At the moment, SuperH does not have the plan corresponding to DT.
+DT of SH/INTC has taken the form where the table data of the C
+is managed by DT, in order to maintain compatibility.
+
+Main node required properties:
+
+- compatible : should be one of:
+ "renesas,sh_intca"
+ "renesas,sh_intcs"
+ "renesas,sh_intca_irq_pins"
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Set already 1.
+- #address-cells : Set already 1.
+- #size-cells : Set already 1.
+- ranges : Non value.
+- reg : Specifies base physical address(s) and size of the INTC
+ registers.
+- intsrc* : This sets up the vector for every device.
+
+- *_registers : There are vector table, mask, priority, ack, and sense
+ register in INTC. In order to hold these data, it is
+ necessary to set up the following contents.
+
+ -- intc_vectors: This needs to have vector_table.
+ This specifies phandle which intsrc* defined.
+
+ -- intc_mask_registers : This specifies the contents of the mask register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_mask* : This has regs and reginfo.
+ ** reg : This specifies the address of mask register. First specifies
+ mask register, and 2nd specifies mask clear register.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** reginfo: This specifies phandle of devices.
+
+ -- intc_prio_registers : This sets up the contents of the priority register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_prio*: This has regs and reginfo.
+ ** reg : This specifies the address of priority register. First specifies
+ priority set register, and 2nd specifies priority clear register.
+ If there is not priority clear register, specifies 0x00.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** field-width : Bit size is specified for every device.
+ ** reginfo: This specifies phandle of devices.
+
+ -- intc_sense_registers : This sets up the contents of the sense register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_sense*: This has regs and reginfo.
+ ** reg : This specifies the address of sense register.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** field-width : Bit size is specified for every device.
+ ** reginfo: This specifies phandle of devices.
+
+-- intc_ack_registers : This sets up the contents of the ACK register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_ack*: This has regs and reginfo.
+ ** reg : This specifies the address of ack register.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** reginfo: This specifies phandle of devices.
+
+Optional:
+
+- group_size : If this INTC register has Group, set up this value.
+- intc_group* : This needs to have group, If INTC device have group.
+ This node required properties:
+ * group : This specifies the address phandle of group.
+ For example, when TMU1 of priority regisdter is sharing with TMU1_0,
+ TMU1_1 and TMU1_2, it describes like below.
+
+ TMU1: intc_group2 { group = <&TMU1_0 &TMU1_1 &TMU1_2>; };
+
+ And the phandle is specified as priority regisdter.
+
+ intc_prio11 {
+ reg = <0xffd50030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU1 0 0 0>;
+ };
+
+- intc_intevtsa : This set up the contents of INTEVTSA.
+ This node required properties:
+ * vector : This specifies the address phandle of INTCS.
+
+Note:
+- "renesas,sh_intca" needs group_size, intc_group*, intc_vectors,
+ intc_mask_registers and intc_prio_registers.
+- "renesas,sh_intcs" needs group_size, intc_group*, intc_vectors,
+ intc_mask_registers, intc_prio_registers and intc_intevtsa.
+- "renesas,sh_intca_irq_pins" needs intc_vectors, intc_mask_registers,
+ intc_prio_registers, intc_sense_registers and intc_ack_registers.
+
+Example:
+
+ intca: interrupt-controller@0 {
+ compatible = "renesas,sh_intca";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6940000 0x200>, <0xe6950000 0x200>;
+ group_size = <19>;
+
+ DIRC: intsrc1 { vector = <0x0560>; };
+ ATAPI: intsrc2 { vector = <0x05E0>; };
+ ....
+
+ DMAC1_1: intc_group0 { group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1
+ &DMAC1_1_DEI2 &DMAC1_1_DEI3>; };
+ DMAC1_2: intc_group1 { group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5
+ &DMAC1_2_DADERR>; };
+ ....
+ intc_vectors {
+ vector_table = <&DIRC &ATAPI &IIC1_ALI &IIC1_TACKI &IIC1_WAITI,
+ ....
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6940080 1>, <0xe69400c0 1>;
+ reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1
+ &DMAC2_1_DEI0 0 0 &AP_ARM_COMMTX &AP_ARM_COMMRX>;
+ };
+ ....
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6940000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 &ICBS0>;
+ };
+ ....
+ };
+ };
diff --git a/drivers/sh/intc/Makefile b/drivers/sh/intc/Makefile
index 54ec2a0..b53ab7e 100644
--- a/drivers/sh/intc/Makefile
+++ b/drivers/sh/intc/Makefile
@@ -3,3 +3,4 @@ obj-y := access.o chip.o core.o handle.o irqdomain.o virq.o
obj-$(CONFIG_INTC_BALANCING) += balancing.o
obj-$(CONFIG_INTC_USERIMASK) += userimask.o
obj-$(CONFIG_INTC_MAPPING_DEBUG) += virq-debugfs.o
+obj-$(CONFIG_OF) += of_intc.o
diff --git a/drivers/sh/intc/of_intc.c b/drivers/sh/intc/of_intc.c
new file mode 100644
index 0000000..04b0732
--- /dev/null
+++ b/drivers/sh/intc/of_intc.c
@@ -0,0 +1,647 @@
+/*
+ * OF helpers for SH intc
+ *
+ * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/sh_intc.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+
+static void __init of_sh_intc_get_reg_addrs(struct device_node *np,
+ unsigned long *set_reg, unsigned long *clr_reg,
+ unsigned long *reg_width,
+ unsigned long *field_width)
+{
+ struct resource res;
+
+ if (set_reg) {
+ of_address_to_resource(np, 0, &res);
+ *set_reg = res.start;
+ }
+
+ if (resource_size(&res) && reg_width)
+ *reg_width = resource_size(&res) * 8; /* byte */
+
+ if (clr_reg) {
+ of_address_to_resource(np, 1, &res);
+ *clr_reg = res.start;
+ }
+
+ if (field_width) {
+ u32 width;
+ of_property_read_u32(np, "field-width", &width);
+ *field_width = width;
+ }
+}
+
+static int of_sh_intc_parse_vector(struct device_node *np, uint32_t *vect)
+{
+ return of_property_read_u32(np, "vector", vect);
+}
+
+static int of_sh_intc_parse_group(struct device_node *np,
+ struct intc_group *grp)
+{
+ const __be32 *list, *list_end;
+ int size, ret = 0, count = 0;
+ phandle phandle;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(np, "group", &size);
+ if (!list)
+ return -ENOENT;
+
+ list_end = list + size / sizeof(*list);
+
+ grp->enum_id = np->phandle;
+ /* Loop over the phandles until all the requested entry is found */
+ while (list < list_end) {
+ /* If phandle is 0, then it is an empty entry with
+ no arguments. */
+ phandle = be32_to_cpup(list);
+ if (phandle)
+ grp->enum_ids[count] = phandle;
+ list++;
+ count++;
+ }
+
+ pr_debug("%d:[", grp->enum_id);
+ for (size = 0 ; size < count ; size++)
+ pr_debug(" %d ", grp->enum_ids[size]);
+
+ pr_debug("]\n");
+
+ return ret;
+}
+
+static int of_sh_intc_parse_vectortbl(struct device_node *np,
+ struct intc_vect **vect, int *tbl_size)
+{
+ const __be32 *list, *list_end;
+ int size, ret = 0, count = 0;
+ struct device_node *node = NULL;
+ phandle phandle;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(np, "vector_table", &size);
+ if (!list)
+ return -ENOENT;
+
+ *tbl_size = size / sizeof(*list);
+
+ pr_debug("vector table size: %d\n", *tbl_size);
+
+ *vect = kzalloc(sizeof(struct intc_vect) * *tbl_size,
+ GFP_KERNEL);
+ if (!*vect)
+ return -ENOMEM;
+
+ list_end = list + *tbl_size;
+
+ /* Loop over the phandles until all the requested entry is found */
+ while (list < list_end) {
+ /* If phandle is 0, then it is an empty entry with
+ no arguments. */
+ phandle = be32_to_cpup(list);
+ if (phandle) {
+ uint32_t vector_id;
+
+ (*vect)[count].enum_id = phandle;
+ node = of_find_node_by_phandle(phandle);
+
+ ret = of_sh_intc_parse_vector(node, &vector_id);
+ if (ret)
+ return ret;
+
+ (*vect)[count].vect = vector_id;
+ pr_debug("id %d : vector 0x%x\n",
+ (*vect)[count].enum_id, (*vect)[count].vect);
+ } else {
+ ret = -EINVAL;
+ goto error;
+ }
+ list++;
+ count++;
+ }
+ return ret;
+
+error:
+ kfree(*vect);
+
+ return ret;
+}
+
+static int of_sh_intc_parse_reginfo(struct device_node *np,
+ struct intc_mask_reg *mask,
+ struct intc_prio_reg *prio,
+ struct intc_sense_reg *sense)
+{
+ const __be32 *list, *list_end;
+ int size, id, ret = 0, count = 0;
+ phandle phandle;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(np, "reginfo", &size);
+ if (!list)
+ return -ENOENT;
+
+ list_end = list + size / sizeof(*list);
+
+ /* Loop over the phandles until all the requested entry is found */
+ while (list < list_end) {
+ /* If phandle is 0, then it is an empty entry with
+ no arguments. */
+ phandle = be32_to_cpup(list);
+ if (phandle)
+ id = phandle;
+ else
+ id = 0;
+
+ if (mask)
+ mask->enum_ids[count] = id;
+ if (prio)
+ prio->enum_ids[count] = id;
+ if (sense)
+ sense->enum_ids[count] = id;
+
+ pr_debug("reg: [%d] %d\n", count, id);
+ list++;
+ count++;
+ }
+
+ return ret;
+}
+
+static struct device_node *
+__init of_sh_intc_check_base_node(struct device_node *np,
+ const char *node_name, int *tbl_size)
+{
+ struct device_node *node;
+
+ node = of_find_node_by_name(np, node_name);
+ if (!node) {
+ pr_err("%s table not found\n", node_name);
+ return NULL;
+ }
+
+ pr_debug("%s\n", node->full_name);
+
+ *tbl_size = of_get_child_count(node);
+
+ pr_debug("Size of %s: %d\n", node_name, *tbl_size);
+
+ return node;
+}
+
+static int __init of_sh_intc_get_mask_ack(struct device_node *np,
+ struct intc_mask_reg **masks, int *tbl_size,
+ const char *base_name, const char *reg_name)
+{
+ struct device_node *intc_node, *reg_node;
+ int i, ret;
+ char node_name[13]; /* intc_mask + 999 */
+
+ intc_node = of_sh_intc_check_base_node(np, base_name, tbl_size);
+ if (!intc_node)
+ return -ENOENT;
+
+ *masks = kzalloc(sizeof(struct intc_mask_reg) * *tbl_size, GFP_KERNEL);
+ if (!*masks)
+ return -ENOMEM;
+
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "%s%d", reg_name, i);
+
+ pr_debug("intc node[%d]: name: %s\n", i, node_name);
+
+ reg_node = of_find_node_by_name(intc_node, node_name);
+ if (!reg_node) {
+ pr_warn("%s not found\n", node_name);
+ ret = -EINVAL;
+ goto error;
+ }
+
+ of_sh_intc_get_reg_addrs(reg_node, &(*masks)[i].set_reg,
+ &(*masks)[i].clr_reg,
+ &(*masks)[i].reg_width, NULL);
+
+#ifdef CONFIG_INTC_BALANCING
+ of_property_read_u32(reg_node, "dist_reg",
+ &(*masks)[i].dist_reg);
+#endif
+#ifdef CONFIG_SMP
+ of_property_read_u32(reg_node, "smp",
+ (u32 *)&(*masks)[i].smp);
+#endif
+
+ pr_debug("set reg: 0x%lx clr reg: 0x%lx reg_width: %ld\n",
+ (*masks)[i].set_reg, (*masks)[i].clr_reg,
+ (*masks)[i].reg_width);
+
+ ret = of_sh_intc_parse_reginfo(reg_node, &(*masks)[i], NULL,
+ NULL);
+ if (ret)
+ goto error;
+ }
+
+ return ret;
+
+error:
+ kfree(*masks);
+ return ret;
+}
+
+static int __init of_sh_intc_get_vector(struct device_node *np,
+ struct intc_vect **vectors, int *tbl_size)
+{
+ struct device_node *intc_node;
+
+ /* Get INTCA vector register info */
+ intc_node = of_find_node_by_name(np, "intc_vectors");
+ if (!intc_node) {
+ pr_err("Get INTC vector table not found\n");
+ return -ENOENT;
+ }
+
+ return of_sh_intc_parse_vectortbl(intc_node, vectors, tbl_size);
+}
+
+static int __init of_sh_intc_get_prio(struct device_node *np,
+ struct intc_prio_reg **prios, int *tbl_size)
+{
+ struct device_node *intc_node, *reg_node;
+ int i, ret;
+ char node_name[13]; /* intc_prio + 999 */
+
+ intc_node = of_sh_intc_check_base_node(np, "intc_prio_registers",
+ tbl_size);
+ if (!intc_node)
+ return -ENOENT;
+
+ *prios = kzalloc(sizeof(struct intc_prio_reg) * *tbl_size, GFP_KERNEL);
+ if (!*prios)
+ return -ENOMEM;
+
+ /* Get INTC priority register info */
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "intc_prio%d", i);
+
+ pr_debug("INTC node name: %s\n", node_name);
+
+ reg_node = of_find_node_by_name(intc_node, node_name);
+
+ if (!intc_node) {
+ pr_err("INTC prio register not found\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ of_sh_intc_get_reg_addrs(reg_node, &(*prios)[i].set_reg,
+ &(*prios)[i].clr_reg, &(*prios)[i].reg_width,
+ &(*prios)[i].field_width);
+
+ pr_debug("\tset reg: 0x%lx clr reg: 0x%lx\n",
+ (*prios)[i].set_reg, (*prios)[i].clr_reg);
+ pr_debug("\treg_width: %ld field_width: %ld\n",
+ (*prios)[i].reg_width, (*prios)[i].field_width);
+
+ ret = of_sh_intc_parse_reginfo(reg_node, NULL, &(*prios)[i],
+ NULL);
+ if (ret)
+ goto error;
+ }
+
+ return ret;
+
+error:
+ kfree(*prios);
+ return ret;
+}
+
+static int __init of_sh_intc_get_sense(struct device_node *np,
+ struct intc_sense_reg **senses, int *tbl_size)
+{
+ struct device_node *intc_node, *reg_node;
+ int i, ret;
+ char node_name[14]; /* intc_sense + 999 */
+
+ intc_node = of_sh_intc_check_base_node(np, "intc_sense_registers",
+ tbl_size);
+ if (!intc_node)
+ return -ENOENT;
+
+ *senses = kzalloc(sizeof(struct intc_sense_reg) * *tbl_size,
+ GFP_KERNEL);
+ if (!*senses)
+ return -ENOMEM;
+
+ /* Get INTC priority register info */
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "intc_sense%d", i);
+
+ pr_debug("INTC node name: %s\n", node_name);
+
+ reg_node = of_find_node_by_name(intc_node, node_name);
+
+ if (!intc_node) {
+ pr_err("INTC senses register not found\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ of_sh_intc_get_reg_addrs(reg_node, &(*senses)[i].reg, NULL,
+ &(*senses)[i].reg_width,
+ &(*senses)[i].field_width);
+
+ pr_debug("\tset reg: 0x%lx\n", (*senses)[i].reg);
+ pr_debug("\treg_width: %ld field_width: %ld\n",
+ (*senses)[i].reg_width,
+ (*senses)[i].field_width);
+
+ ret = of_sh_intc_parse_reginfo(reg_node, NULL, NULL,
+ &(*senses)[i]);
+ if (ret)
+ goto error;
+ }
+
+ return ret;
+
+error:
+ kfree(*senses);
+ return ret;
+}
+
+static int __init of_sh_intc_get_ack(struct device_node *np,
+ struct intc_mask_reg **masks, int *tbl_size)
+{
+ return of_sh_intc_get_mask_ack(np, masks, tbl_size,
+ "intc_ack_registers", "intc_ack");
+}
+
+static int __init of_sh_intc_get_mask(struct device_node *np,
+ struct intc_mask_reg **masks, int *tbl_size)
+{
+ return of_sh_intc_get_mask_ack(np, masks, tbl_size,
+ "intc_mask_registers", "intc_mask");
+}
+
+static int __init of_sh_intc_get_group(struct device_node *np,
+ struct intc_group **groups, int *tbl_size)
+{
+ int i, ret, size;
+ const __be32 *list;
+ struct device_node *grp_node;
+ char node_name[15]; /* intc_group@999 */
+
+ /* Get size of group */
+ if (of_property_read_u32(np, "group_size", tbl_size)) {
+ pr_debug("%s size infomation not found\n", node_name);
+ return -ENOENT;
+ }
+
+ pr_debug("Group size %d\n", *tbl_size);
+ pr_debug("%s\n", np->full_name);
+
+ *groups = kzalloc(sizeof(struct intc_group) * *tbl_size, GFP_KERNEL);
+ if (!*groups)
+ return -ENOMEM;
+
+ /* Get INTCA node info */
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "intc_group%d", i);
+
+ pr_debug("intc group[%d]: name: %s\n", i, node_name);
+
+ grp_node = of_find_node_by_name(np, node_name);
+ if (!grp_node) {
+ pr_warn("%s not found\n", node_name);
+ ret = -EINVAL;
+ goto error;
+ }
+
+ list = of_get_property(np, node_name, &size);
+ ret = of_sh_intc_parse_group(grp_node, &(*groups)[i]);
+ if (ret) {
+ pr_err("intc group not found\n");
+ goto error;
+ }
+ }
+
+ return ret;
+
+error:
+ kfree(*groups);
+ return ret;
+}
+
+int __init of_sh_intc_get_intevtsa_vect(struct device_node *np,
+ unsigned short *vect)
+{
+ int size;
+ const __be32 *list;
+ struct device_node *node;
+ phandle phandle;
+
+ node = of_find_node_by_name(np, "intc_intevtsa");
+ if (!node)
+ return -ENOENT;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(node, "vector", &size);
+ if (!list)
+ return -ENOENT;
+
+ phandle = be32_to_cpup(list);
+ if (phandle) {
+ uint32_t tmp;
+ struct device_node *vect_node + of_find_node_by_phandle(phandle);
+
+ if (!of_sh_intc_parse_vector(vect_node, &tmp))
+ *vect = tmp;
+ else
+ return -ENOENT;
+ } else {
+ pr_debug("intc_intevtsa data not found\n");
+ return -ENOENT;
+ }
+ return 0;
+}
+
+static int of_sh_intc_get_force_flags(struct device_node *np,
+ const char *node_name)
+{
+ int size;
+ const __be32 *list = of_get_property(np, node_name, &size);
+ if (list)
+ return be32_to_cpup(list);
+
+ return 0;
+}
+
+void __init of_sh_intc_get_force_enable(struct device_node *np,
+ struct intc_desc *d)
+{
+ d->force_enable + of_sh_intc_get_force_flags(np, "force_enable");
+}
+
+void __init of_sh_intc_get_force_disable(struct device_node *np,
+ struct intc_desc *d)
+{
+ d->force_disable + of_sh_intc_get_force_flags(np, "force_disable");
+}
+
+void __init of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
+ struct intc_desc *d)
+{
+ if (of_find_property(np, "skip_syscore_suspend", NULL))
+ d->skip_syscore_suspend = true;
+ else
+ d->skip_syscore_suspend = false;
+}
+
+int __init of_sh_intc_get_meminfo(struct device_node *np,
+ struct resource *res, int res_no)
+{
+ int ret = 0, i;
+
+ for (i = 0 ; i < res_no ; i++) {
+ ret = of_address_to_resource(np, i, &res[i]);
+ if (ret) {
+ pr_err("could not determine device base address\n");
+ return ret;
+ }
+
+ pr_debug("%s: Address 0x%x, size %d\n",
+ __func__, res[i].start, resource_size(&res[i]));
+ }
+
+ return ret;
+}
+
+int __init of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d)
+{
+ /* pint uses vector, mask and sence. */
+ int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
+ &d->hw.nr_vectors);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
+ &d->hw.nr_mask_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
+ &d->hw.nr_sense_regs);
+ /* INTC may not need Sence register. */
+ if (ret && ret != -ENOENT)
+ return ret;
+
+ d->of_node = np;
+
+ return 0;
+}
+
+int __init of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d)
+{
+ int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
+ &d->hw.nr_vectors);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_group(np, &d->hw.groups,
+ &d->hw.nr_groups);
+ /* INTC may not need groups. */
+ if (ret && ret != -ENOENT)
+ return ret;
+
+ ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
+ &d->hw.nr_mask_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_prio(np, &d->hw.prio_regs,
+ &d->hw.nr_prio_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
+ &d->hw.nr_sense_regs);
+ /* INTC may not need Sense register. */
+ if (ret && ret != -ENOENT)
+ return ret;
+
+ ret = of_sh_intc_get_ack(np, &d->hw.ack_regs,
+ &d->hw.nr_ack_regs);
+ /* INTC may not need Ack register. */
+ if (ret && ret != -ENOENT)
+ return ret;
+
+ d->of_node = np;
+
+ return 0;
+}
+
+int __init of_sh_intc_get_intc_pins(struct device_node *np,
+ struct intc_desc *d)
+{
+ int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
+ &d->hw.nr_vectors);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
+ &d->hw.nr_mask_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_prio(np, &d->hw.prio_regs,
+ &d->hw.nr_prio_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
+ &d->hw.nr_sense_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_ack(np, &d->hw.ack_regs,
+ &d->hw.nr_ack_regs);
+ if (ret)
+ return ret;
+
+ d->of_node = np;
+
+ return 0;
+}
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 3238328..b0e7925 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -2,6 +2,10 @@
#define __SH_INTC_H
#include <linux/ioport.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
#ifdef CONFIG_SUPERH
#define INTC_NR_IRQS 512
@@ -146,4 +150,83 @@ static inline int register_intc_userimask(unsigned long addr)
}
#endif
+/*
+ * of_sh_initc_get_intc() - Get INTC table.
+ * @np: device node to get INTC from
+ * @d: a pointer of intc table
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d);
+
+/*
+ * of_sh_initc_get_intc_pins() - Get INTC Pins table.
+ * @np: device node to get INTC from
+ * @d: a pointer of intc pins table
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_intc_pins(struct device_node *np, struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_meminfo() - Get and set INTC register of memory.
+ * @np: device node to get INTC from
+ * @res_mem: a pointer of resource
+ * @res_no: resource number
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_meminfo(struct device_node *np,
+ struct resource *res_mem, int resno);
+
+/*
+ * of_sh_intc_get_force_enable - Get and set force_enable vector in
+ * struct intc_desc.
+ * @np: device node to get INTC from
+ * @d: a pointer of struct intc_desc
+ *
+ * Return: none
+ */
+void of_sh_intc_get_force_enable(struct device_node *np,
+ struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_force_disable - Get and set force_disable vector in
+ * struct intc_desc.
+ * @np: device node to get INTC from
+ * @d: a pointer of struct intc_desc
+ *
+ * Return: none
+ */
+void of_sh_intc_get_force_disable(struct device_node *np,
+ struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_skip_syscore_suspend - Get and set skip_syscore_suspend
+ * flag in struct intc_desc.
+ * @np: device node to get INTC from
+ * @d: a pointer of struct intc_desc
+ *
+ * Return: none
+ */
+void of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
+ struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_intevtsa_vect - Get using vector by intevtsa
+ * @np: device node to get INTC from
+ * @vect:a pointer of value for vector
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_intevtsa_vect(struct device_node *np, unsigned short *vect);
+/*
+ * of_sh_initc_get_intc_pint() - Get INTC Pint table.
+ * @np: device node to get INTC from
+ * @d: a pointer of intc pint table
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d);
+
#endif /* __SH_INTC_H */
--
1.7.10.4
^ permalink raw reply related
* [RFC v7 00/10] ARM: shmobile: DT initialisation of INTC and GIC
From: Simon Horman @ 2012-12-15 9:03 UTC (permalink / raw)
To: linux-arm-kernel
The aims of this series are:
* Add DT bindings to to INTC
* Allowing sh7372 and r8a7740 ARM shmobile SoCs to use DT
to initialise INTCA
Key Changes since v5 (previous public revision of this series)
* Drop support for sh73a0 SoC.
To be useful this requires a fuller initialisation than jsut INCA.
In particular, cascade IRQs that are shared between INTC and GIC
need to be handled.
* Drop board support
This will be revisited on a per-board basis, ideally with
filler INTC initialisation via DT in place
* Drop GIC initialisation
This will also be revisited on a per-board basis.
* Remove unused INTC DT helper functions
Status:
I am reasonably happy with this series and plan to merge the shmobile portions.
Paul, I forget if I asked you this before or not, but could you let me know
if you would like to handle the intc patches, the first two patches in the
series, or if you are comfortable with them going through my tree.
Git and diffstat information provided for review.
----------------------------------------------------------------------
The following changes since commit ddffeb8c4d0331609ef2581d84de4d763607bd37:
Linux 3.7-rc1 (2012-10-14 14:41:04 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git devel/intc-of
for you to fetch changes up to 91cb8c20ebbaaf35482cc256b9ab97279bbe753c:
ARM: shmobile: sh7372: Use DT initialisation of INTC (2012-12-15 17:50:28 +0900)
----------------------------------------------------------------
Nobuhiro Iwamatsu (9):
ARM: shmobile: Add support OF for INTC of shmobile
SH: intc: Add support OF of IRQ
ARM: shmobile: Add support OF of INTC for r8a7740
ARM: shmobile: Add support OF of INTC for sh7372
ARM: shmobile: Add DT table of INTC for sh7372
ARM: shmobile: Add DT table of INTC for r8a7740
ARM: shmobile: Include DTSI of r8a7740 to armadillo800eva
ARM: shmobile: r8a7740: Use DT initialisation of INTC
ARM: shmobile: sh7372: Use DT initialisation of INTC
Simon Horman (1):
ARM: shmobile: sh7372: Do not initialise TMU when using DT
Documentation/devicetree/bindings/sh/intc.txt | 152 +++++
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +-
arch/arm/boot/dts/r8a7740.dtsi | 743 ++++++++++++++++++++++-
arch/arm/boot/dts/sh7372.dtsi | 784 +++++++++++++++++++++++++
arch/arm/mach-shmobile/include/mach/common.h | 2 +
arch/arm/mach-shmobile/intc-r8a7740.c | 70 ++-
arch/arm/mach-shmobile/intc-sh7372.c | 113 +++-
arch/arm/mach-shmobile/setup-r8a7740.c | 2 +-
arch/arm/mach-shmobile/setup-sh7372.c | 19 +-
drivers/sh/intc/Makefile | 1 +
drivers/sh/intc/core.c | 2 +-
drivers/sh/intc/internals.h | 3 +-
drivers/sh/intc/irqdomain.c | 6 +-
drivers/sh/intc/of_intc.c | 571 ++++++++++++++++++
include/linux/sh_intc.h | 56 ++
15 files changed, 2481 insertions(+), 45 deletions(-)
create mode 100644 Documentation/devicetree/bindings/sh/intc.txt
create mode 100644 drivers/sh/intc/of_intc.c
^ permalink raw reply
* Re: [PATCH 2/7] ARM: mackerel: include the correct .dtsi file
From: Simon Horman @ 2012-12-15 8:37 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-3-git-send-email-g.liakhovetski@gmx.de>
On Fri, Dec 14, 2012 at 05:45:26PM +0100, Guennadi Liakhovetski wrote:
> Mackerel's .dts Device Tree description file should derive from the SoC's
> .dtsi, not from skeleton.dtsi directly.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Thanks applied.
I have applied this to a temporary 'boards4' branch which is based on 3.7-rc1.
I will rebase this on 3.8-rc1 once it is released and rename the branch
to the more sane 'boards'.
I have also merged this change into the next branch.
^ permalink raw reply
* Re: [PATCH 4/7] ARM: sh7372: add clock lookup entries for DT-based devices
From: Simon Horman @ 2012-12-15 8:36 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-5-git-send-email-g.liakhovetski@gmx.de>
On Fri, Dec 14, 2012 at 05:45:28PM +0100, Guennadi Liakhovetski wrote:
> When booting with DT, devices are named differently. To get their clocks
> additional entries have to be added to the lookup table.
Thanks applied.
I have applied this to a temporary 'soc5' branch which is based on 3.7-rc1.
I will rebase this on 3.8-rc1 once it is released and rename the branch
to the more sane 'soc'.
I have also merged this change into the next branch.
^ permalink raw reply
* Re: [PATCH 6/7] ARM: mackerel: support booting with or without DT
From: Simon Horman @ 2012-12-15 8:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-7-git-send-email-g.liakhovetski@gmx.de>
On Fri, Dec 14, 2012 at 05:45:30PM +0100, Guennadi Liakhovetski wrote:
> This patch adds dynamic switching to booting either with or without DT.
> So far only a part of the board initialisation can be done via DT. Devices,
> that still need platform data are kept that way. Devices, that can be
> initialised from DT will not be supplied from the platform data, if a DT
> image is detected.
Hi Guennadi,
I'm not sure that I'm entirely comfortable with the implications
for users here.
In the beginning there was no DT for Mackerel, all boots were non-DT,
and in general the board and its devices have been well supported.
At the present time Mackerel only boots using DT, though almost all
the initialisation is done in C. Thus currently a DT boot fairly full
support for the board and its devices.
If I understand things correctly, with this change, a DT boot becomes a
limited boot that basically only supports devices that can be initialised
using DT. And users are expected to go back to a non-DT boot if they want
fuller support. This seems undesirable.
The approach that I took with the kzm9g was to provide an alternate dts and
board file, and compatibility string. Clearly that is not an entirely
elegant solution. But it does avoid the problem that I describe above.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> ---
> arch/arm/mach-shmobile/board-mackerel.c | 84 ++++++++++++++++++++++++-------
> 1 files changed, 66 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
> index 39b8f2e..a6358c9 100644
> --- a/arch/arm/mach-shmobile/board-mackerel.c
> +++ b/arch/arm/mach-shmobile/board-mackerel.c
> @@ -1326,7 +1326,6 @@ static struct platform_device mackerel_camera = {
>
> static struct platform_device *mackerel_devices[] __initdata = {
> &nor_flash_device,
> - &smc911x_device,
> &lcdc_device,
> &usbhs0_device,
> &usbhs1_device,
> @@ -1335,17 +1334,21 @@ static struct platform_device *mackerel_devices[] __initdata = {
> &fsi_ak4643_device,
> &fsi_hdmi_device,
> &nand_flash_device,
> + &ceu_device,
> + &mackerel_camera,
> + &hdmi_device,
> + &hdmi_lcdc_device,
> + &meram_device,
> +};
> +
> +static struct platform_device *mackerel_devices_dt[] __initdata = {
> + &smc911x_device,
> &sdhi0_device,
> #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
> &sdhi1_device,
> #endif
> &sdhi2_device,
> &sh_mmcif_device,
> - &ceu_device,
> - &mackerel_camera,
> - &hdmi_device,
> - &hdmi_lcdc_device,
> - &meram_device,
> };
>
> /* Keypad Initialization */
> @@ -1404,6 +1407,24 @@ static struct i2c_board_info i2c1_devices[] = {
> },
> };
>
> +static int mackerel_i2c_bus_notify(struct notifier_block *nb,
> + unsigned long action, void *data)
> +{
> + struct device *dev = data;
> +
> + if (action != BUS_NOTIFY_ADD_DEVICE ||
> + strcmp(dev_name(dev->parent), "fff20000.i2c"))
> + return NOTIFY_DONE;
> +
> + i2c_new_device(to_i2c_adapter(dev), &i2c0_devices[1]);
> +
> + return NOTIFY_OK;
> +}
> +
> +static struct notifier_block mackerel_i2c_notifier = {
> + .notifier_call = mackerel_i2c_bus_notify,
> +};
> +
> #define GPIO_PORT9CR IOMEM(0xE6051009)
> #define GPIO_PORT10CR IOMEM(0xE605100A)
> #define GPIO_PORT167CR IOMEM(0xE60520A7)
> @@ -1420,22 +1441,26 @@ static void __init mackerel_init(void)
I wonder if it would be cleaner to achieve this by providing
mackerel_init_dt().
> { "A3SP", &usbhs0_device, },
> { "A3SP", &usbhs1_device, },
> { "A3SP", &nand_flash_device, },
> + { "A4R", &ceu_device, },
> + };
> + struct pm_domain_device domain_devices_dt[] = {
> { "A3SP", &sh_mmcif_device, },
> { "A3SP", &sdhi0_device, },
> #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
> { "A3SP", &sdhi1_device, },
> #endif
> { "A3SP", &sdhi2_device, },
> - { "A4R", &ceu_device, },
> };
> u32 srcr4;
> struct clk *clk;
>
> - regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
> - ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
> - regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
> - ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
> - regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
> + if (!of_have_populated_dt()) {
> + regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
> + ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
> + regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
> + ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
> + regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
> + }
>
> /* External clock source */
> clk_set_rate(&sh7372_dv_clki_clk, 27000000);
> @@ -1633,22 +1658,35 @@ static void __init mackerel_init(void)
> udelay(50);
> __raw_writel(srcr4 & ~(1 << 13), SRCR4);
>
> - i2c_register_board_info(0, i2c0_devices,
> - ARRAY_SIZE(i2c0_devices));
> - i2c_register_board_info(1, i2c1_devices,
> - ARRAY_SIZE(i2c1_devices));
> + if (!of_have_populated_dt()) {
> + i2c_register_board_info(0, i2c0_devices,
> + ARRAY_SIZE(i2c0_devices));
> + i2c_register_board_info(1, i2c1_devices,
> + ARRAY_SIZE(i2c1_devices));
> + } else {
> + bus_register_notifier(&i2c_bus_type,
> + &mackerel_i2c_notifier);
> + }
>
> sh7372_add_standard_devices();
>
> platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
> + if (!of_have_populated_dt())
> + platform_add_devices(mackerel_devices_dt,
> + ARRAY_SIZE(mackerel_devices_dt));
>
> rmobile_add_devices_to_domains(domain_devices,
> ARRAY_SIZE(domain_devices));
> + if (!of_have_populated_dt())
> + rmobile_add_devices_to_domains(domain_devices_dt,
> + ARRAY_SIZE(domain_devices_dt));
>
> hdmi_init_pm_clock();
> sh7372_pm_init();
> pm_clk_add(&fsi_device.dev, "spu2");
> pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
> +
> + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> }
>
> static const char *mackerel_boards_compat_dt[] __initdata = {
> @@ -1659,10 +1697,20 @@ static const char *mackerel_boards_compat_dt[] __initdata = {
> DT_MACHINE_START(MACKEREL_DT, "mackerel")
> .map_io = sh7372_map_io,
> .init_early = sh7372_add_early_devices,
> - .init_irq = sh7372_init_irq,
> + .init_irq = sh7372_init_irq_of,
> + .handle_irq = shmobile_handle_irq_intc,
> + .init_machine = mackerel_init,
> + .init_late = sh7372_pm_init_late,
> + .timer = &shmobile_timer,
> + .dt_compat = mackerel_boards_compat_dt,
> +MACHINE_END
> +
> +MACHINE_START(MACKEREL, "mackerel")
> + .map_io = sh7372_map_io,
> + .init_early = sh7372_add_early_devices,
> + .init_irq = sh7372_init_irq_of,
Could sh7372_init_irq be used here ?
> .handle_irq = shmobile_handle_irq_intc,
> .init_machine = mackerel_init,
> .init_late = sh7372_pm_init_late,
> .timer = &shmobile_timer,
> - .dt_compat = mackerel_boards_compat_dt,
> MACHINE_END
> --
> 1.7.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* [PATCH] ARM: mach-shmobile: mackerel: update defconfig
From: Simon Horman @ 2012-12-15 8:11 UTC (permalink / raw)
To: linux-arm-kernel
From: Simon Horman <horms+renesas@verge.net.au>
* Enable ARM_APPENDED_DTB
Typically the bootloader of a mackerel board does not support DT
so this option is useful
* Add "rw" to command line
This appears to be necessary for a successful NFS-root boot
* Do not disable INOTIFY_USER
INOTIFY_USER is required by dbus which is common to many
userspaces
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/configs/mackerel_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/configs/mackerel_defconfig b/arch/arm/configs/mackerel_defconfig
index 2098ce1..8519721 100644
--- a/arch/arm/configs/mackerel_defconfig
+++ b/arch/arm/configs/mackerel_defconfig
@@ -23,7 +23,8 @@ CONFIG_AEABI=y
CONFIG_FORCE_MAX_ZONEORDER\x15
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp memchunk.vpudm memchunk.veu0=8m memchunk.spu0=2m mem$0m"
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_CMDLINE="console=tty0, console=ttySC0,115200 earlyprintk=sh-sci.0,115200 root=/dev/nfs nfsroot=,tcp,v3 ip=dhcp memchunk.vpudm memchunk.veu0=8m memchunk.spu0=2m mem$0m rw"
CONFIG_KEXEC=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_PM=y
--
1.7.10.4
^ permalink raw reply related
* Re: [PATCH 5/7] ARM: sh7372: allow boards supporting booting with or without DT
From: Simon Horman @ 2012-12-15 8:05 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-6-git-send-email-g.liakhovetski@gmx.de>
On Fri, Dec 14, 2012 at 05:45:29PM +0100, Guennadi Liakhovetski wrote:
> For boards booting without DT no changes should be caused by this patch.
> When booting with DT, devices, whose drivers support DT probing, will not
> be registered.
This relates in part to my comment on "ARM: sh7372: support mixed DT and
board code interrupt controller init".
It is my understanding that sh7372_add_standard_devices_dt() already
exists in setup-sh7372.c and that it is appropriate to use for bring
up boards with DT.
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> ---
> arch/arm/mach-shmobile/setup-sh7372.c | 17 ++++++++++++++---
> 1 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
> index bbe6e2a..3e6bf3d 100644
> --- a/arch/arm/mach-shmobile/setup-sh7372.c
> +++ b/arch/arm/mach-shmobile/setup-sh7372.c
> @@ -981,9 +981,12 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
> &tmu01_device,
> };
>
> -static struct platform_device *sh7372_late_devices[] __initdata = {
> +static struct platform_device *sh7372_late_devices_dt[] __initdata = {
> &iic0_device,
> &iic1_device,
> +};
> +
> +static struct platform_device *sh7372_late_devices[] __initdata = {
> &dma0_device,
> &dma1_device,
> &dma2_device,
> @@ -1012,13 +1015,11 @@ void __init sh7372_add_standard_devices(void)
> { "A3SP", &scif4_device, },
> { "A3SP", &scif5_device, },
> { "A3SP", &scif6_device, },
> - { "A3SP", &iic1_device, },
> { "A3SP", &dma0_device, },
> { "A3SP", &dma1_device, },
> { "A3SP", &dma2_device, },
> { "A3SP", &usb_dma0_device, },
> { "A3SP", &usb_dma1_device, },
> - { "A4R", &iic0_device, },
> { "A4R", &veu0_device, },
> { "A4R", &veu1_device, },
> { "A4R", &veu2_device, },
> @@ -1027,6 +1028,10 @@ void __init sh7372_add_standard_devices(void)
> { "A4R", &tmu00_device, },
> { "A4R", &tmu01_device, },
> };
> + struct pm_domain_device domain_devices_dt[] = {
> + { "A3SP", &iic1_device, },
> + { "A4R", &iic0_device, },
> + };
>
> sh7372_init_pm_domains();
>
> @@ -1035,9 +1040,15 @@ void __init sh7372_add_standard_devices(void)
>
> platform_add_devices(sh7372_late_devices,
> ARRAY_SIZE(sh7372_late_devices));
> + if (!of_have_populated_dt())
> + platform_add_devices(sh7372_late_devices_dt,
> + ARRAY_SIZE(sh7372_late_devices_dt));
>
> rmobile_add_devices_to_domains(domain_devices,
> ARRAY_SIZE(domain_devices));
> + if (!of_have_populated_dt())
> + rmobile_add_devices_to_domains(domain_devices_dt,
> + ARRAY_SIZE(domain_devices_dt));
> }
>
> static void __init sh7372_earlytimer_init(void)
> --
> 1.7.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-sh" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 3/7] ARM: sh7372: support mixed DT and board code interrupt controller init
From: Simon Horman @ 2012-12-15 7:52 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-4-git-send-email-g.liakhovetski@gmx.de>
On Fri, Dec 14, 2012 at 05:45:27PM +0100, Guennadi Liakhovetski wrote:
> Extend DT interrupt controller initialisation to automatically fall back to
> platform data based configuration, if booting without DT. This simplifies
> implementing boards, capable of booting in either mode with a single kernel.
Hi Guennadi,
Do you have a case in mind where this will be used?
My thinking until now has been that sh7372_init_irq_of() should only be called
when a board is being initialised using DT.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> ---
> arch/arm/mach-shmobile/intc-sh7372.c | 6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
> index c923518..9c13ecc 100644
> --- a/arch/arm/mach-shmobile/intc-sh7372.c
> +++ b/arch/arm/mach-shmobile/intc-sh7372.c
> @@ -23,6 +23,7 @@
> #include <linux/irq.h>
> #include <linux/io.h>
> #include <linux/sh_intc.h>
> +#include <mach/common.h>
> #include <mach/intc.h>
> #include <mach/irqs.h>
> #include <asm/mach-types.h>
> @@ -629,6 +630,11 @@ static const struct of_device_id irq_of_match[] __initconst = {
>
> void __init sh7372_init_irq_of(void)
> {
> + if (!of_have_populated_dt()) {
> + sh7372_init_irq();
> + return;
> + }
> +
> of_irq_init(irq_of_match);
>
> sh7372_init_intc(0xe6940000, 0xe6950000, 0xffd20000, 0xffd50000,
> --
> 1.7.2.5
>
^ permalink raw reply
* Re: [PATCH 4/7] ARM: sh7372: add clock lookup entries for DT-based devices
From: Grant Likely @ 2012-12-15 7:29 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355503531-7276-5-git-send-email-g.liakhovetski@gmx.de>
On Fri, 14 Dec 2012 17:45:28 +0100, Guennadi Liakhovetski <g.liakhovetski@gmx.de> wrote:
> When booting with DT, devices are named differently. To get their clocks
> additional entries have to be added to the lookup table.
>
> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Please use AUXDATA to manipulate the device name for consistency with
other platforms. When clock bindings get added to the device tree for
this platform then all the AUXDATA declarations can be removed.
g.
^ permalink raw reply
* Re: [PATCH 2/2] ARM: SH-Mobile: sh73a0: Add CPU Hotplug
From: Rob Herring @ 2012-12-14 18:08 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <CABYn4syb8yBRwUqbS=2dp1i3FYFt1edYPRh9xa=aHTY9RsWw8A@mail.gmail.com>
On 12/14/2012 09:33 AM, Bastian Hecht wrote:
> Hi,
>
> 2012/12/14 Rob Herring <robherring2@gmail.com>:
>> On 12/06/2012 06:08 AM, Bastian Hecht wrote:
>>> From: Bastian Hecht <hechtb@gmail.com>
>>>
>>> Add the capability to add and remove CPUs on the fly.
>>> The Cortex-A9 offers the possibility to take single cores out of the
>>> MP Core. We add this capabilty taking care that caches are kept
>>> coherent. For the actual shutdown via a WFI instruction, a code snippet
>>> from the omap2 code tree is copied. Thanks for that! For verifying the
>>> shutdown we rely on the internal SH73A0 Power Status Register
>>> PSTR.
>>>
>>> Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
>>> ---
>>> arch/arm/mach-shmobile/headsmp-sh73a0.S | 46 ++++++++++++++++++++++++++
>>> arch/arm/mach-shmobile/include/mach/common.h | 1 +
>>> arch/arm/mach-shmobile/smp-sh73a0.c | 41 +++++++++++++++++++----
>>> 3 files changed, 82 insertions(+), 6 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-shmobile/headsmp-sh73a0.S b/arch/arm/mach-shmobile/headsmp-sh73a0.S
>>> index bec4c0d..be463a3 100644
>>> --- a/arch/arm/mach-shmobile/headsmp-sh73a0.S
>>> +++ b/arch/arm/mach-shmobile/headsmp-sh73a0.S
>>> @@ -23,6 +23,52 @@
>>> #include <linux/init.h>
>>> #include <asm/memory.h>
>>>
>>> +/* Taken from arch/arm/mach-omap2/sleep44xx.S. Thanks! */
>>> +ENTRY(sh73a0_do_wfi)
>>> + stmfd sp!, {lr}
>>
>> Why does the lr need to be pushed to the stack?
>
> Yes I must admit this is paradox - we never return but prepare to do
> so... In the OMAP code they've got a lead out code in case the WFI
> doesn't succeed. I see no reason how this could ever happen here but
> to take a safe route I've decided to keep the mechanism to be able to
> return and spit out an error message back in the C code.
It's not clear to me that OMAP needed this either. The lr value would
have to get lost during wfi.
>>> +
>>> + /*
>>> + * Execute an ISB instruction to ensure that all of the
>>> + * CP15 register changes have been committed.
>>> + */
>>> + isb
>>
>> Generally writes to cp15 registers that need an isb already do so.
>
> Ok nice, I'll check that and throw it out.
>
>>> +
>>> + /*
>>> + * Execute a barrier instruction to ensure that all cache,
>>> + * TLB and branch predictor maintenance operations issued
>>> + * by any CPU in the cluster have completed.
>>> + */
>>> + dsb
>>> + dmb
>>
>> A dsb is a superset of a dmb, so you should not need both.
>
> Same here.
>
>>> +
>>> + /*
>>> + * Execute a WFI instruction and wait until the
>>> + * STANDBYWFI output is asserted to indicate that the
>>> + * CPU is in idle and low power state. CPU can specualatively
>>> + * prefetch the instructions so add NOPs after WFI. Sixteen
>>> + * NOPs as per Cortex-A9 pipeline.
>>
>> Why do you care what is prefetched? You're never coming back here, right?
>
> We can jump back to the paradox top. The idea seems to be to have a
> clean pipeline in case the WFI doesn't succeed.
> The thing about this whole code snippet is: I saw no reason to
> reinvent the wheel and tinker on my own solution when there is code
> that does the job in a clean way. I thought this could maybe be moved
> to a general ARM code base when more people rely on it.
>
Blindly copying code is reinventing the wheel. You are making it appear
that this is needed, but don't seem to have any reason why other than
OMAP did it. If it is in fact needed, then it should be common.
Use cpu_do_idle or figure out and explain why you can't. It's important
to know that if we do go and consolidate this code later.
Rob
^ permalink raw reply
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