* [PATCH/WIP/RFC 13/14] shmobile-ipmmu: Remove unneeded lock_add spinlock
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
ipmmu_add_device() can never race with
shmobile_iommu_attach_all_devices(), called by ipmmu_iommu_init() as the
former is called from an arch initcall and the later from a subsys
initcall.
Remove the unneeded spinlock as well as the arm_iommu_attach_device() in
ipmmu_add_device(), as the condition that guards the call is always
false.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-iommu.c | 18 +++---------------
1 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index bf1d0a4..2592d25 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -51,7 +51,6 @@ static struct dma_iommu_mapping *iommu_mapping;
static struct device *ipmmu_devices;
static struct dma_pool *l1pool, *l2pool;
static spinlock_t lock;
-static DEFINE_SPINLOCK(lock_add);
static struct shmobile_iommu_domain *attached;
static int num_attached_devices;
@@ -313,15 +312,12 @@ static struct iommu_ops shmobile_iommu_ops = {
static int shmobile_iommu_attach_all_devices(struct shmobile_ipmmu *ipmmu)
{
struct device *dev;
- int ret = 0;
- spin_lock(&lock_add);
iommu_mapping = arm_iommu_create_mapping(&platform_bus_type, 0x0,
L1_LEN << 20, 0);
- if (IS_ERR_OR_NULL(iommu_mapping)) {
- ret = PTR_ERR(iommu_mapping);
- goto err;
- }
+ if (IS_ERR_OR_NULL(iommu_mapping))
+ return PTR_ERR(iommu_mapping);
+
for (dev = ipmmu_devices; dev; ) {
struct shmobile_iommu_arch_data *data = dev->archdata.iommu;
@@ -332,8 +328,6 @@ static int shmobile_iommu_attach_all_devices(struct shmobile_ipmmu *ipmmu)
dev = data->next;
}
-err:
- spin_unlock(&lock_add);
return 0;
}
@@ -347,14 +341,8 @@ int ipmmu_add_device(struct device *dev)
dev->archdata.iommu = data;
- spin_lock(&lock_add);
data->next = ipmmu_devices;
ipmmu_devices = dev;
- if (!IS_ERR_OR_NULL(iommu_mapping)) {
- if (arm_iommu_attach_device(dev, iommu_mapping))
- pr_err("arm_iommu_attach_device failed\n");
- }
- spin_unlock(&lock_add);
return 0;
}
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 12/14] shmobile-ipmmu: Store ipmmu pointer in iommu arch data and iommu domain
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
This gets rid of the global ipmmu_access_device pointer.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-iommu.c | 37 ++++++++++++++++++++++++++-----------
include/linux/sh_iommu.h | 2 ++
2 files changed, 28 insertions(+), 11 deletions(-)
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index f27d842..bf1d0a4 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -41,6 +41,7 @@ struct shmobile_iommu_domain_pgtable {
};
struct shmobile_iommu_domain {
+ struct shmobile_ipmmu *ipmmu;
struct shmobile_iommu_domain_pgtable l1, l2[L1_LEN];
spinlock_t map_lock;
atomic_t active;
@@ -53,7 +54,17 @@ static spinlock_t lock;
static DEFINE_SPINLOCK(lock_add);
static struct shmobile_iommu_domain *attached;
static int num_attached_devices;
-static struct shmobile_ipmmu *ipmmu_access_device;
+
+/**
+ * dev_to_ipmmu() - retrieves an shmobile ipmmu object from a user device
+ * @dev: ipmmu client device
+ */
+static inline struct shmobile_ipmmu *dev_to_ipmmu(struct device *dev)
+{
+ struct shmobile_iommu_arch_data *arch_data = dev->archdata.iommu;
+
+ return arch_data->ipmmu;
+}
static int shmobile_iommu_domain_init(struct iommu_domain *domain)
{
@@ -97,6 +108,7 @@ static int shmobile_iommu_attach_device(struct iommu_domain *domain,
struct device *dev)
{
struct shmobile_iommu_domain *sh_domain = domain->priv;
+ struct shmobile_ipmmu *ipmmu = dev_to_ipmmu(dev);
int ret = -EBUSY;
spin_lock(&lock);
@@ -104,12 +116,12 @@ static int shmobile_iommu_attach_device(struct iommu_domain *domain,
if (attached)
goto err;
atomic_set(&sh_domain->active, 1);
- ipmmu_tlb_set(ipmmu_access_device, sh_domain->l1.handle, L1_SIZE,
- 0);
+ ipmmu_tlb_set(ipmmu, sh_domain->l1.handle, L1_SIZE, 0);
wmb();
- ipmmu_tlb_flush(ipmmu_access_device);
+ ipmmu_tlb_flush(ipmmu);
attached = sh_domain;
num_attached_devices = 0;
+ sh_domain->ipmmu = ipmmu;
}
num_attached_devices++;
ret = 0;
@@ -122,14 +134,16 @@ static void shmobile_iommu_detach_device(struct iommu_domain *domain,
struct device *dev)
{
struct shmobile_iommu_domain *sh_domain = domain->priv;
+ struct shmobile_ipmmu *ipmmu = dev_to_ipmmu(dev);
spin_lock(&lock);
atomic_set(&sh_domain->active, 0);
num_attached_devices--;
if (!num_attached_devices) {
- ipmmu_tlb_set(ipmmu_access_device, 0, 0, 0);
- ipmmu_tlb_flush(ipmmu_access_device);
+ ipmmu_tlb_set(ipmmu, 0, 0, 0);
+ ipmmu_tlb_flush(ipmmu);
attached = NULL;
+ sh_domain->ipmmu = NULL;
}
spin_unlock(&lock);
}
@@ -208,7 +222,7 @@ static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova,
}
if (!ret && atomic_read(&sh_domain->active)) {
wmb();
- ipmmu_tlb_flush(ipmmu_access_device);
+ ipmmu_tlb_flush(sh_domain->ipmmu);
l2realfree(&l2);
}
return ret;
@@ -252,7 +266,7 @@ static size_t shmobile_iommu_unmap(struct iommu_domain *domain,
done:
if (ret && atomic_read(&sh_domain->active)) {
wmb();
- ipmmu_tlb_flush(ipmmu_access_device);
+ ipmmu_tlb_flush(sh_domain->ipmmu);
l2realfree(&l2);
}
return ret;
@@ -296,7 +310,7 @@ static struct iommu_ops shmobile_iommu_ops = {
.pgsize_bitmap = 0x111000,
};
-static int shmobile_iommu_attach_all_devices(void)
+static int shmobile_iommu_attach_all_devices(struct shmobile_ipmmu *ipmmu)
{
struct device *dev;
int ret = 0;
@@ -311,6 +325,8 @@ static int shmobile_iommu_attach_all_devices(void)
for (dev = ipmmu_devices; dev; ) {
struct shmobile_iommu_arch_data *data = dev->archdata.iommu;
+ data->ipmmu = ipmmu;
+
if (arm_iommu_attach_device(dev, iommu_mapping))
pr_err("arm_iommu_attach_device failed\n");
@@ -356,9 +372,8 @@ int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu)
goto nomem_pool2;
spin_lock_init(&lock);
attached = NULL;
- ipmmu_access_device = ipmmu;
bus_set_iommu(&platform_bus_type, &shmobile_iommu_ops);
- if (shmobile_iommu_attach_all_devices())
+ if (shmobile_iommu_attach_all_devices(ipmmu))
pr_err("shmobile_iommu_attach_all_devices failed\n");
return 0;
nomem_pool2:
diff --git a/include/linux/sh_iommu.h b/include/linux/sh_iommu.h
index 8b7b51d..76b6e51 100644
--- a/include/linux/sh_iommu.h
+++ b/include/linux/sh_iommu.h
@@ -2,8 +2,10 @@
#define __SH_IOMMU_H__
struct device;
+struct shmobile_ipmmu;
struct shmobile_iommu_arch_data {
+ struct shmobile_ipmmu *ipmmu;
struct device *next;
};
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 11/14] shmobile-ipmmu: Store a struct shmobile_iommu_arch_data in archdata.iommu
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-iommu.c | 20 +++++++++++++++++---
include/linux/sh_iommu.h | 10 ++++++++--
2 files changed, 25 insertions(+), 5 deletions(-)
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index 423993c..f27d842 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -308,25 +308,39 @@ static int shmobile_iommu_attach_all_devices(void)
ret = PTR_ERR(iommu_mapping);
goto err;
}
- for (dev = ipmmu_devices; dev; dev = dev->archdata.iommu) {
+ for (dev = ipmmu_devices; dev; ) {
+ struct shmobile_iommu_arch_data *data = dev->archdata.iommu;
+
if (arm_iommu_attach_device(dev, iommu_mapping))
pr_err("arm_iommu_attach_device failed\n");
+
+ dev = data->next;
}
err:
spin_unlock(&lock_add);
return 0;
}
-void ipmmu_add_device(struct device *dev)
+int ipmmu_add_device(struct device *dev)
{
+ struct shmobile_iommu_arch_data *data;
+
+ data = kzalloc(sizeof(*data), GFP_KERNEL);
+ if (data = NULL)
+ return -ENOMEM;
+
+ dev->archdata.iommu = data;
+
spin_lock(&lock_add);
- dev->archdata.iommu = ipmmu_devices;
+ data->next = ipmmu_devices;
ipmmu_devices = dev;
if (!IS_ERR_OR_NULL(iommu_mapping)) {
if (arm_iommu_attach_device(dev, iommu_mapping))
pr_err("arm_iommu_attach_device failed\n");
}
spin_unlock(&lock_add);
+
+ return 0;
}
int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu)
diff --git a/include/linux/sh_iommu.h b/include/linux/sh_iommu.h
index cc669a0..8b7b51d 100644
--- a/include/linux/sh_iommu.h
+++ b/include/linux/sh_iommu.h
@@ -1,10 +1,16 @@
#ifndef __SH_IOMMU_H__
#define __SH_IOMMU_H__
+struct device;
+
+struct shmobile_iommu_arch_data {
+ struct device *next;
+};
+
#ifdef CONFIG_SHMOBILE_IPMMU_TLB
-void ipmmu_add_device(struct device *dev);
+int ipmmu_add_device(struct device *dev);
#else
-static inline void ipmmu_add_device(struct device *dev)
+static inline int ipmmu_add_device(struct device *dev)
{
}
#endif
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 10/14] shmobile-ipmmu: Pass a struct shmobile_ipmmu to IPMMU functions
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-iommu.c | 12 +++---
drivers/iommu/shmobile-ipmmu.c | 90 +++++++++++++++++++--------------------
drivers/iommu/shmobile-ipmmu.h | 9 ++--
3 files changed, 55 insertions(+), 56 deletions(-)
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index 1a37be2..423993c 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -53,7 +53,7 @@ static spinlock_t lock;
static DEFINE_SPINLOCK(lock_add);
static struct shmobile_iommu_domain *attached;
static int num_attached_devices;
-static struct device *ipmmu_access_device;
+static struct shmobile_ipmmu *ipmmu_access_device;
static int shmobile_iommu_domain_init(struct iommu_domain *domain)
{
@@ -329,20 +329,20 @@ void ipmmu_add_device(struct device *dev)
spin_unlock(&lock_add);
}
-int ipmmu_iommu_init(struct device *dev)
+int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu)
{
- dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
- l1pool = dma_pool_create("shmobile-iommu-pgtable1", dev,
+ dma_set_coherent_mask(ipmmu->dev, DMA_BIT_MASK(32));
+ l1pool = dma_pool_create("shmobile-iommu-pgtable1", ipmmu->dev,
L1_SIZE, L1_ALIGN, 0);
if (!l1pool)
goto nomem_pool1;
- l2pool = dma_pool_create("shmobile-iommu-pgtable2", dev,
+ l2pool = dma_pool_create("shmobile-iommu-pgtable2", ipmmu->dev,
L2_SIZE, L2_ALIGN, 0);
if (!l2pool)
goto nomem_pool2;
spin_lock_init(&lock);
attached = NULL;
- ipmmu_access_device = dev;
+ ipmmu_access_device = ipmmu;
bus_set_iommu(&platform_bus_type, &shmobile_iommu_ops);
if (shmobile_iommu_attach_all_devices())
pr_err("shmobile_iommu_attach_all_devices failed\n");
diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
index b308292..9858c91 100644
--- a/drivers/iommu/shmobile-ipmmu.c
+++ b/drivers/iommu/shmobile-ipmmu.c
@@ -34,99 +34,97 @@
#define IMCTR1_TLBEN (1 << 0)
#define IMCTR1_FLUSH (1 << 1)
-static void ipmmu_reg_write(struct shmobile_ipmmu *priv, unsigned long reg_off,
+static void ipmmu_reg_write(struct shmobile_ipmmu *ipmmu, unsigned long reg_off,
unsigned long data)
{
- iowrite32(data, priv->ipmmu_base + reg_off);
+ iowrite32(data, ipmmu->ipmmu_base + reg_off);
}
-void ipmmu_tlb_flush(struct device *dev)
+void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu)
{
- struct shmobile_ipmmu *priv;
-
- if (!dev)
+ if (!ipmmu)
return;
- priv = dev_get_drvdata(dev);
- mutex_lock(&priv->flush_lock);
- if (priv->tlb_enabled)
- ipmmu_reg_write(priv, IMCTR1, IMCTR1_FLUSH | IMCTR1_TLBEN);
+
+ mutex_lock(&ipmmu->flush_lock);
+ if (ipmmu->tlb_enabled)
+ ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH | IMCTR1_TLBEN);
else
- ipmmu_reg_write(priv, IMCTR1, IMCTR1_FLUSH);
- mutex_unlock(&priv->flush_lock);
+ ipmmu_reg_write(ipmmu, IMCTR1, IMCTR1_FLUSH);
+ mutex_unlock(&ipmmu->flush_lock);
}
-void ipmmu_tlb_set(struct device *dev, unsigned long phys, int size, int asid)
+void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size,
+ int asid)
{
- struct shmobile_ipmmu *priv;
-
- if (!dev)
+ if (!ipmmu)
return;
- priv = dev_get_drvdata(dev);
- mutex_lock(&priv->flush_lock);
+
+ mutex_lock(&ipmmu->flush_lock);
switch (size) {
default:
- priv->tlb_enabled = 0;
+ ipmmu->tlb_enabled = 0;
break;
case 0x2000:
- ipmmu_reg_write(priv, IMTTBCR, 1);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 1);
+ ipmmu->tlb_enabled = 1;
break;
case 0x1000:
- ipmmu_reg_write(priv, IMTTBCR, 2);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 2);
+ ipmmu->tlb_enabled = 1;
break;
case 0x800:
- ipmmu_reg_write(priv, IMTTBCR, 3);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 3);
+ ipmmu->tlb_enabled = 1;
break;
case 0x400:
- ipmmu_reg_write(priv, IMTTBCR, 4);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 4);
+ ipmmu->tlb_enabled = 1;
break;
case 0x200:
- ipmmu_reg_write(priv, IMTTBCR, 5);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 5);
+ ipmmu->tlb_enabled = 1;
break;
case 0x100:
- ipmmu_reg_write(priv, IMTTBCR, 6);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 6);
+ ipmmu->tlb_enabled = 1;
break;
case 0x80:
- ipmmu_reg_write(priv, IMTTBCR, 7);
- priv->tlb_enabled = 1;
+ ipmmu_reg_write(ipmmu, IMTTBCR, 7);
+ ipmmu->tlb_enabled = 1;
break;
}
- ipmmu_reg_write(priv, IMTTBR, phys);
- ipmmu_reg_write(priv, IMASID, asid);
- mutex_unlock(&priv->flush_lock);
+ ipmmu_reg_write(ipmmu, IMTTBR, phys);
+ ipmmu_reg_write(ipmmu, IMASID, asid);
+ mutex_unlock(&ipmmu->flush_lock);
}
static int ipmmu_probe(struct platform_device *pdev)
{
+ struct shmobile_ipmmu *ipmmu;
struct resource *res;
- struct shmobile_ipmmu *priv;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "cannot get platform resources\n");
return -ENOENT;
}
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv) {
+ ipmmu = devm_kzalloc(&pdev->dev, sizeof(*ipmmu), GFP_KERNEL);
+ if (!ipmmu) {
dev_err(&pdev->dev, "cannot allocate device data\n");
return -ENOMEM;
}
- mutex_init(&priv->flush_lock);
- priv->ipmmu_base = devm_ioremap_nocache(&pdev->dev, res->start,
+ mutex_init(&ipmmu->flush_lock);
+ ipmmu->dev = &pdev->dev;
+ ipmmu->ipmmu_base = devm_ioremap_nocache(&pdev->dev, res->start,
resource_size(res));
- if (!priv->ipmmu_base) {
+ if (!ipmmu->ipmmu_base) {
dev_err(&pdev->dev, "ioremap_nocache failed\n");
return -ENOMEM;
}
- platform_set_drvdata(pdev, priv);
- ipmmu_reg_write(priv, IMCTR1, 0x0); /* disable TLB */
- ipmmu_reg_write(priv, IMCTR2, 0x0); /* disable PMB */
- ipmmu_iommu_init(&pdev->dev);
+ platform_set_drvdata(pdev, ipmmu);
+ ipmmu_reg_write(ipmmu, IMCTR1, 0x0); /* disable TLB */
+ ipmmu_reg_write(ipmmu, IMCTR2, 0x0); /* disable PMB */
+ ipmmu_iommu_init(ipmmu);
return 0;
}
diff --git a/drivers/iommu/shmobile-ipmmu.h b/drivers/iommu/shmobile-ipmmu.h
index 5c17a46..1458a97 100644
--- a/drivers/iommu/shmobile-ipmmu.h
+++ b/drivers/iommu/shmobile-ipmmu.h
@@ -2,18 +2,19 @@
#define __SHMOBILE_IPMMU_H__
struct shmobile_ipmmu {
+ struct device *dev;
void __iomem *ipmmu_base;
int tlb_enabled;
struct mutex flush_lock;
};
#ifdef CONFIG_SHMOBILE_IPMMU_TLB
-void ipmmu_tlb_flush(struct device *ipmmu_dev);
-void ipmmu_tlb_set(struct device *ipmmu_dev, unsigned long phys, int size,
+void ipmmu_tlb_flush(struct shmobile_ipmmu *ipmmu);
+void ipmmu_tlb_set(struct shmobile_ipmmu *ipmmu, unsigned long phys, int size,
int asid);
-int ipmmu_iommu_init(struct device *dev);
+int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu);
#else
-static int ipmmu_iommu_init(struct device *dev)
+static int ipmmu_iommu_init(struct shmobile_ipmmu *ipmmu)
{
return -EINVAL;
}
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 09/14] shmobile-ipmmu: Rename ipmmu_priv to shmobile_ipmmu
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
And expose the structure to the IOMMU driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-ipmmu.c | 14 ++++----------
drivers/iommu/shmobile-ipmmu.h | 6 ++++++
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
index 34e3c66..b308292 100644
--- a/drivers/iommu/shmobile-ipmmu.c
+++ b/drivers/iommu/shmobile-ipmmu.c
@@ -34,13 +34,7 @@
#define IMCTR1_TLBEN (1 << 0)
#define IMCTR1_FLUSH (1 << 1)
-struct ipmmu_priv {
- void __iomem *ipmmu_base;
- int tlb_enabled;
- struct mutex flush_lock;
-};
-
-static void ipmmu_reg_write(struct ipmmu_priv *priv, unsigned long reg_off,
+static void ipmmu_reg_write(struct shmobile_ipmmu *priv, unsigned long reg_off,
unsigned long data)
{
iowrite32(data, priv->ipmmu_base + reg_off);
@@ -48,7 +42,7 @@ static void ipmmu_reg_write(struct ipmmu_priv *priv, unsigned long reg_off,
void ipmmu_tlb_flush(struct device *dev)
{
- struct ipmmu_priv *priv;
+ struct shmobile_ipmmu *priv;
if (!dev)
return;
@@ -63,7 +57,7 @@ void ipmmu_tlb_flush(struct device *dev)
void ipmmu_tlb_set(struct device *dev, unsigned long phys, int size, int asid)
{
- struct ipmmu_priv *priv;
+ struct shmobile_ipmmu *priv;
if (!dev)
return;
@@ -110,7 +104,7 @@ void ipmmu_tlb_set(struct device *dev, unsigned long phys, int size, int asid)
static int ipmmu_probe(struct platform_device *pdev)
{
struct resource *res;
- struct ipmmu_priv *priv;
+ struct shmobile_ipmmu *priv;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
diff --git a/drivers/iommu/shmobile-ipmmu.h b/drivers/iommu/shmobile-ipmmu.h
index 0e0a6a4..5c17a46 100644
--- a/drivers/iommu/shmobile-ipmmu.h
+++ b/drivers/iommu/shmobile-ipmmu.h
@@ -1,6 +1,12 @@
#ifndef __SHMOBILE_IPMMU_H__
#define __SHMOBILE_IPMMU_H__
+struct shmobile_ipmmu {
+ void __iomem *ipmmu_base;
+ int tlb_enabled;
+ struct mutex flush_lock;
+};
+
#ifdef CONFIG_SHMOBILE_IPMMU_TLB
void ipmmu_tlb_flush(struct device *ipmmu_dev);
void ipmmu_tlb_set(struct device *ipmmu_dev, unsigned long phys, int size,
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 08/14] shmobile-iommu: Rename shmobile_iommu_priv to shmobile_iommu_domain
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-iommu.c | 152 ++++++++++++++++++++--------------------
1 files changed, 76 insertions(+), 76 deletions(-)
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index 463da32..1a37be2 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -35,13 +35,13 @@
#define L2_LEN (L2_SIZE / 4)
#define L2_ALIGN L2_SIZE
-struct shmobile_iommu_priv_pgtable {
+struct shmobile_iommu_domain_pgtable {
uint32_t *pgtable;
dma_addr_t handle;
};
-struct shmobile_iommu_priv {
- struct shmobile_iommu_priv_pgtable l1, l2[L1_LEN];
+struct shmobile_iommu_domain {
+ struct shmobile_iommu_domain_pgtable l1, l2[L1_LEN];
spinlock_t map_lock;
atomic_t active;
};
@@ -51,64 +51,64 @@ static struct device *ipmmu_devices;
static struct dma_pool *l1pool, *l2pool;
static spinlock_t lock;
static DEFINE_SPINLOCK(lock_add);
-static struct shmobile_iommu_priv *attached;
+static struct shmobile_iommu_domain *attached;
static int num_attached_devices;
static struct device *ipmmu_access_device;
static int shmobile_iommu_domain_init(struct iommu_domain *domain)
{
- struct shmobile_iommu_priv *priv;
+ struct shmobile_iommu_domain *sh_domain;
int i;
- priv = kmalloc(sizeof(*priv), GFP_KERNEL);
- if (!priv)
+ sh_domain = kmalloc(sizeof(*sh_domain), GFP_KERNEL);
+ if (!sh_domain)
return -ENOMEM;
- priv->l1.pgtable = dma_pool_alloc(l1pool, GFP_KERNEL,
- &priv->l1.handle);
- if (!priv->l1.pgtable) {
- kfree(priv);
+ sh_domain->l1.pgtable = dma_pool_alloc(l1pool, GFP_KERNEL,
+ &sh_domain->l1.handle);
+ if (!sh_domain->l1.pgtable) {
+ kfree(sh_domain);
return -ENOMEM;
}
for (i = 0; i < L1_LEN; i++)
- priv->l2[i].pgtable = NULL;
- memset(priv->l1.pgtable, 0, L1_SIZE);
- spin_lock_init(&priv->map_lock);
- atomic_set(&priv->active, 0);
- domain->priv = priv;
+ sh_domain->l2[i].pgtable = NULL;
+ memset(sh_domain->l1.pgtable, 0, L1_SIZE);
+ spin_lock_init(&sh_domain->map_lock);
+ atomic_set(&sh_domain->active, 0);
+ domain->priv = sh_domain;
return 0;
}
static void shmobile_iommu_domain_destroy(struct iommu_domain *domain)
{
- struct shmobile_iommu_priv *priv = domain->priv;
+ struct shmobile_iommu_domain *sh_domain = domain->priv;
int i;
for (i = 0; i < L1_LEN; i++) {
- if (priv->l2[i].pgtable)
- dma_pool_free(l2pool, priv->l2[i].pgtable,
- priv->l2[i].handle);
+ if (sh_domain->l2[i].pgtable)
+ dma_pool_free(l2pool, sh_domain->l2[i].pgtable,
+ sh_domain->l2[i].handle);
}
- dma_pool_free(l1pool, priv->l1.pgtable, priv->l1.handle);
- kfree(priv);
+ dma_pool_free(l1pool, sh_domain->l1.pgtable, sh_domain->l1.handle);
+ kfree(sh_domain);
domain->priv = NULL;
}
static int shmobile_iommu_attach_device(struct iommu_domain *domain,
struct device *dev)
{
- struct shmobile_iommu_priv *priv = domain->priv;
+ struct shmobile_iommu_domain *sh_domain = domain->priv;
int ret = -EBUSY;
spin_lock(&lock);
- if (attached != priv) {
+ if (attached != sh_domain) {
if (attached)
goto err;
- atomic_set(&priv->active, 1);
- ipmmu_tlb_set(ipmmu_access_device, priv->l1.handle, L1_SIZE,
+ atomic_set(&sh_domain->active, 1);
+ ipmmu_tlb_set(ipmmu_access_device, sh_domain->l1.handle, L1_SIZE,
0);
wmb();
ipmmu_tlb_flush(ipmmu_access_device);
- attached = priv;
+ attached = sh_domain;
num_attached_devices = 0;
}
num_attached_devices++;
@@ -121,10 +121,10 @@ err:
static void shmobile_iommu_detach_device(struct iommu_domain *domain,
struct device *dev)
{
- struct shmobile_iommu_priv *priv = domain->priv;
+ struct shmobile_iommu_domain *sh_domain = domain->priv;
spin_lock(&lock);
- atomic_set(&priv->active, 0);
+ atomic_set(&sh_domain->active, 0);
num_attached_devices--;
if (!num_attached_devices) {
ipmmu_tlb_set(ipmmu_access_device, 0, 0, 0);
@@ -135,34 +135,34 @@ static void shmobile_iommu_detach_device(struct iommu_domain *domain,
}
static int
-l2alloc(struct shmobile_iommu_priv *priv, unsigned int l1index)
+l2alloc(struct shmobile_iommu_domain *sh_domain, unsigned int l1index)
{
- if (!priv->l2[l1index].pgtable) {
- priv->l2[l1index].pgtable = dma_pool_alloc(l2pool, GFP_KERNEL,
- &priv->l2[l1index].handle);
- if (!priv->l2[l1index].pgtable)
+ if (!sh_domain->l2[l1index].pgtable) {
+ sh_domain->l2[l1index].pgtable = dma_pool_alloc(l2pool, GFP_KERNEL,
+ &sh_domain->l2[l1index].handle);
+ if (!sh_domain->l2[l1index].pgtable)
return -ENOMEM;
- memset(priv->l2[l1index].pgtable, 0, L2_SIZE);
+ memset(sh_domain->l2[l1index].pgtable, 0, L2_SIZE);
}
- priv->l1.pgtable[l1index] = priv->l2[l1index].handle | 0x1;
+ sh_domain->l1.pgtable[l1index] = sh_domain->l2[l1index].handle | 0x1;
return 0;
}
static void
-l2realfree(struct shmobile_iommu_priv_pgtable *l2)
+l2realfree(struct shmobile_iommu_domain_pgtable *l2)
{
if (l2->pgtable)
dma_pool_free(l2pool, l2->pgtable, l2->handle);
}
static int
-l2free(struct shmobile_iommu_priv *priv, unsigned int l1index,
- struct shmobile_iommu_priv_pgtable *l2)
+l2free(struct shmobile_iommu_domain *sh_domain, unsigned int l1index,
+ struct shmobile_iommu_domain_pgtable *l2)
{
- priv->l1.pgtable[l1index] = 0;
- if (priv->l2[l1index].pgtable) {
- *l2 = priv->l2[l1index];
- priv->l2[l1index].pgtable = NULL;
+ sh_domain->l1.pgtable[l1index] = 0;
+ if (sh_domain->l2[l1index].pgtable) {
+ *l2 = sh_domain->l2[l1index];
+ sh_domain->l2[l1index].pgtable = NULL;
}
return 0;
}
@@ -170,8 +170,8 @@ l2free(struct shmobile_iommu_priv *priv, unsigned int l1index,
static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova,
phys_addr_t paddr, size_t size, int prot)
{
- struct shmobile_iommu_priv_pgtable l2 = { .pgtable = NULL };
- struct shmobile_iommu_priv *priv = domain->priv;
+ struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL };
+ struct shmobile_iommu_domain *sh_domain = domain->priv;
unsigned int l1index, l2index, i;
int ret;
@@ -179,34 +179,34 @@ static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova,
switch (size) {
case 0x1000:
l2index = (iova >> 12) & 0xff;
- spin_lock(&priv->map_lock);
- ret = l2alloc(priv, l1index);
+ spin_lock(&sh_domain->map_lock);
+ ret = l2alloc(sh_domain, l1index);
if (!ret)
- priv->l2[l1index].pgtable[l2index] = paddr | 0xff2;
- spin_unlock(&priv->map_lock);
+ sh_domain->l2[l1index].pgtable[l2index] = paddr | 0xff2;
+ spin_unlock(&sh_domain->map_lock);
break;
case 0x10000:
l2index = (iova >> 12) & 0xf0;
- spin_lock(&priv->map_lock);
- ret = l2alloc(priv, l1index);
+ spin_lock(&sh_domain->map_lock);
+ ret = l2alloc(sh_domain, l1index);
if (!ret) {
for (i = 0; i < 0x10; i++)
- priv->l2[l1index].pgtable[l2index + i] + sh_domain->l2[l1index].pgtable[l2index + i] paddr | 0xff1;
}
- spin_unlock(&priv->map_lock);
+ spin_unlock(&sh_domain->map_lock);
break;
case 0x100000:
- spin_lock(&priv->map_lock);
- l2free(priv, l1index, &l2);
- priv->l1.pgtable[l1index] = paddr | 0xc02;
- spin_unlock(&priv->map_lock);
+ spin_lock(&sh_domain->map_lock);
+ l2free(sh_domain, l1index, &l2);
+ sh_domain->l1.pgtable[l1index] = paddr | 0xc02;
+ spin_unlock(&sh_domain->map_lock);
ret = 0;
break;
default:
ret = -EINVAL;
}
- if (!ret && atomic_read(&priv->active)) {
+ if (!ret && atomic_read(&sh_domain->active)) {
wmb();
ipmmu_tlb_flush(ipmmu_access_device);
l2realfree(&l2);
@@ -217,40 +217,40 @@ static int shmobile_iommu_map(struct iommu_domain *domain, unsigned long iova,
static size_t shmobile_iommu_unmap(struct iommu_domain *domain,
unsigned long iova, size_t size)
{
- struct shmobile_iommu_priv_pgtable l2 = { .pgtable = NULL };
- struct shmobile_iommu_priv *priv = domain->priv;
+ struct shmobile_iommu_domain_pgtable l2 = { .pgtable = NULL };
+ struct shmobile_iommu_domain *sh_domain = domain->priv;
unsigned int l1index, l2index, i;
uint32_t l2entry = 0;
size_t ret = 0;
l1index = iova >> 20;
if (!(iova & 0xFFFFF) && size >= 0x100000) {
- spin_lock(&priv->map_lock);
- l2free(priv, l1index, &l2);
- spin_unlock(&priv->map_lock);
+ spin_lock(&sh_domain->map_lock);
+ l2free(sh_domain, l1index, &l2);
+ spin_unlock(&sh_domain->map_lock);
ret = 0x100000;
goto done;
}
l2index = (iova >> 12) & 0xff;
- spin_lock(&priv->map_lock);
- if (priv->l2[l1index].pgtable)
- l2entry = priv->l2[l1index].pgtable[l2index];
+ spin_lock(&sh_domain->map_lock);
+ if (sh_domain->l2[l1index].pgtable)
+ l2entry = sh_domain->l2[l1index].pgtable[l2index];
switch (l2entry & 3) {
case 1:
if (l2index & 0xf)
break;
for (i = 0; i < 0x10; i++)
- priv->l2[l1index].pgtable[l2index + i] = 0;
+ sh_domain->l2[l1index].pgtable[l2index + i] = 0;
ret = 0x10000;
break;
case 2:
- priv->l2[l1index].pgtable[l2index] = 0;
+ sh_domain->l2[l1index].pgtable[l2index] = 0;
ret = 0x1000;
break;
}
- spin_unlock(&priv->map_lock);
+ spin_unlock(&sh_domain->map_lock);
done:
- if (ret && atomic_read(&priv->active)) {
+ if (ret && atomic_read(&sh_domain->active)) {
wmb();
ipmmu_tlb_flush(ipmmu_access_device);
l2realfree(&l2);
@@ -261,18 +261,18 @@ done:
static phys_addr_t shmobile_iommu_iova_to_phys(struct iommu_domain *domain,
unsigned long iova)
{
- struct shmobile_iommu_priv *priv = domain->priv;
+ struct shmobile_iommu_domain *sh_domain = domain->priv;
uint32_t l1entry = 0, l2entry = 0;
unsigned int l1index, l2index;
l1index = iova >> 20;
l2index = (iova >> 12) & 0xff;
- spin_lock(&priv->map_lock);
- if (priv->l2[l1index].pgtable)
- l2entry = priv->l2[l1index].pgtable[l2index];
+ spin_lock(&sh_domain->map_lock);
+ if (sh_domain->l2[l1index].pgtable)
+ l2entry = sh_domain->l2[l1index].pgtable[l2index];
else
- l1entry = priv->l1.pgtable[l1index];
- spin_unlock(&priv->map_lock);
+ l1entry = sh_domain->l1.pgtable[l1index];
+ spin_unlock(&sh_domain->map_lock);
switch (l2entry & 3) {
case 1:
return (l2entry & ~0xffff) | (iova & 0xffff);
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 07/14] shmobile-iommu: Move header file from arch/ to drivers/iommu/
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
And split the function used by board code to its own
include/linux/sh_iommu.h header.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/arm/mach-shmobile/board-ap4evb.c | 2 +-
arch/arm/mach-shmobile/board-mackerel.c | 2 +-
arch/arm/mach-shmobile/setup-sh7372.c | 2 +-
drivers/iommu/shmobile-iommu.c | 4 +++-
drivers/iommu/shmobile-ipmmu.c | 3 ++-
.../mach/ipmmu.h => drivers/iommu/shmobile-ipmmu.h | 5 -----
include/linux/sh_iommu.h | 12 ++++++++++++
7 files changed, 20 insertions(+), 10 deletions(-)
rename arch/arm/mach-shmobile/include/mach/ipmmu.h => drivers/iommu/shmobile-ipmmu.h (78%)
create mode 100644 include/linux/sh_iommu.h
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 7006abb..0c40d72 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -38,6 +38,7 @@
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <linux/sh_intc.h>
+#include <linux/sh_iommu.h>
#include <linux/sh_clk.h>
#include <linux/gpio.h>
#include <linux/input.h>
@@ -61,7 +62,6 @@
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>
-#include <mach/ipmmu.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 1c34520..a9cdfc2 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -45,6 +45,7 @@
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <linux/sh_intc.h>
+#include <linux/sh_iommu.h>
#include <linux/tca6416_keypad.h>
#include <linux/usb/renesas_usbhs.h>
#include <linux/dma-mapping.h>
@@ -60,7 +61,6 @@
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>
-#include <mach/ipmmu.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index aadb769..5dd3576 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -30,6 +30,7 @@
#include <linux/serial_sci.h>
#include <linux/sh_dma.h>
#include <linux/sh_intc.h>
+#include <linux/sh_iommu.h>
#include <linux/sh_timer.h>
#include <linux/pm_domain.h>
#include <linux/dma-mapping.h>
@@ -38,7 +39,6 @@
#include <mach/irqs.h>
#include <mach/sh7372.h>
#include <mach/common.h>
-#include <mach/ipmmu.h>
#include <asm/mach/map.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index 9f2243e3..463da32 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -23,8 +23,10 @@
#include <linux/io.h>
#include <linux/iommu.h>
#include <linux/platform_device.h>
+#include <linux/sh_iommu.h>
#include <linux/slab.h>
-#include <mach/ipmmu.h>
+
+#include "shmobile-ipmmu.h"
#define L1_SIZE CONFIG_SHMOBILE_IOMMU_L1SIZE
#define L1_LEN (L1_SIZE / 4)
diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
index edec3b8..34e3c66 100644
--- a/drivers/iommu/shmobile-ipmmu.c
+++ b/drivers/iommu/shmobile-ipmmu.c
@@ -22,7 +22,8 @@
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
-#include <mach/ipmmu.h>
+
+#include "shmobile-ipmmu.h"
#define IMCTR1 0x000
#define IMCTR2 0x004
diff --git a/arch/arm/mach-shmobile/include/mach/ipmmu.h b/drivers/iommu/shmobile-ipmmu.h
similarity index 78%
rename from arch/arm/mach-shmobile/include/mach/ipmmu.h
rename to drivers/iommu/shmobile-ipmmu.h
index 4b805b1f..0e0a6a4 100644
--- a/arch/arm/mach-shmobile/include/mach/ipmmu.h
+++ b/drivers/iommu/shmobile-ipmmu.h
@@ -5,13 +5,8 @@
void ipmmu_tlb_flush(struct device *ipmmu_dev);
void ipmmu_tlb_set(struct device *ipmmu_dev, unsigned long phys, int size,
int asid);
-void ipmmu_add_device(struct device *dev);
int ipmmu_iommu_init(struct device *dev);
#else
-static inline void ipmmu_add_device(struct device *dev)
-{
-}
-
static int ipmmu_iommu_init(struct device *dev)
{
return -EINVAL;
diff --git a/include/linux/sh_iommu.h b/include/linux/sh_iommu.h
new file mode 100644
index 0000000..cc669a0
--- /dev/null
+++ b/include/linux/sh_iommu.h
@@ -0,0 +1,12 @@
+#ifndef __SH_IOMMU_H__
+#define __SH_IOMMU_H__
+
+#ifdef CONFIG_SHMOBILE_IPMMU_TLB
+void ipmmu_add_device(struct device *dev);
+#else
+static inline void ipmmu_add_device(struct device *dev)
+{
+}
+#endif
+
+#endif /* __SH_IOMMU_H__ */
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 06/14] shmobile-iommu: Sort header files alphabetically
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-iommu.c | 10 +++++-----
drivers/iommu/shmobile-ipmmu.c | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/iommu/shmobile-iommu.c b/drivers/iommu/shmobile-iommu.c
index bbbf1bc..9f2243e3 100644
--- a/drivers/iommu/shmobile-iommu.c
+++ b/drivers/iommu/shmobile-iommu.c
@@ -17,14 +17,14 @@
*
*/
-#include <linux/io.h>
+#include <asm/dma-iommu.h>
+#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
-#include <linux/slab.h>
-#include <linux/platform_device.h>
+#include <linux/io.h>
#include <linux/iommu.h>
-#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
#include <mach/ipmmu.h>
-#include <asm/dma-iommu.h>
#define L1_SIZE CONFIG_SHMOBILE_IOMMU_L1SIZE
#define L1_LEN (L1_SIZE / 4)
diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
index d6df0b4..edec3b8 100644
--- a/drivers/iommu/shmobile-ipmmu.c
+++ b/drivers/iommu/shmobile-ipmmu.c
@@ -17,10 +17,10 @@
*
*/
-#include <linux/platform_device.h>
-#include <linux/io.h>
#include <linux/err.h>
#include <linux/export.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
#include <linux/slab.h>
#include <mach/ipmmu.h>
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 05/14] ARM: iommu: Include linux/kref.h in asm/dma-iommu.h
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
The dma_iommu_mapping structure defined in asm/dma-iommu.h embeds a
struct kref, include the appropriate header file.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm/include/asm/dma-iommu.h | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/dma-iommu.h b/arch/arm/include/asm/dma-iommu.h
index 799b094..666d8a8 100644
--- a/arch/arm/include/asm/dma-iommu.h
+++ b/arch/arm/include/asm/dma-iommu.h
@@ -7,6 +7,7 @@
#include <linux/scatterlist.h>
#include <linux/dma-debug.h>
#include <linux/kmemcheck.h>
+#include <linux/kref.h>
struct dma_iommu_mapping {
/* iommu specific data */
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 04/14] shmobile-iommu: Use devm_* managed functions
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-ipmmu.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
index 2339f91..d6df0b4 100644
--- a/drivers/iommu/shmobile-ipmmu.c
+++ b/drivers/iommu/shmobile-ipmmu.c
@@ -116,16 +116,16 @@ static int ipmmu_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "cannot get platform resources\n");
return -ENOENT;
}
- priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv) {
dev_err(&pdev->dev, "cannot allocate device data\n");
return -ENOMEM;
}
mutex_init(&priv->flush_lock);
- priv->ipmmu_base = ioremap_nocache(res->start, resource_size(res));
+ priv->ipmmu_base = devm_ioremap_nocache(&pdev->dev, res->start,
+ resource_size(res));
if (!priv->ipmmu_base) {
dev_err(&pdev->dev, "ioremap_nocache failed\n");
- kfree(priv);
return -ENOMEM;
}
platform_set_drvdata(pdev, priv);
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 03/14] shmobile-iommu: Remove __devinit
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
CONFIG_HOTPLUG is going away as an option, remove __devinit.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
drivers/iommu/shmobile-ipmmu.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/iommu/shmobile-ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
index 72cacb9..2339f91 100644
--- a/drivers/iommu/shmobile-ipmmu.c
+++ b/drivers/iommu/shmobile-ipmmu.c
@@ -106,7 +106,7 @@ void ipmmu_tlb_set(struct device *dev, unsigned long phys, int size, int asid)
mutex_unlock(&priv->flush_lock);
}
-static int __devinit ipmmu_probe(struct platform_device *pdev)
+static int ipmmu_probe(struct platform_device *pdev)
{
struct resource *res;
struct ipmmu_priv *priv;
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 02/14] shmobile-iommu: Move IPMMU driver to drivers/iommu
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/arm/mach-shmobile/Kconfig | 6 ------
arch/arm/mach-shmobile/Makefile | 3 ---
drivers/iommu/Kconfig | 6 ++++++
drivers/iommu/Makefile | 1 +
.../ipmmu.c => drivers/iommu/shmobile-ipmmu.c | 0
5 files changed, 7 insertions(+), 9 deletions(-)
rename arch/arm/mach-shmobile/ipmmu.c => drivers/iommu/shmobile-ipmmu.c (100%)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index de69ab3..8ae100c 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -210,12 +210,6 @@ endmenu
config SH_CLK_CPG
bool
-config SHMOBILE_IPMMU
- bool
-
-config SHMOBILE_IPMMU_TLB
- bool
-
source "drivers/sh/Kconfig"
endif
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 4ffba9d..fe2c97c 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -60,6 +60,3 @@ obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o
# Framework support
obj-$(CONFIG_SMP) += $(smp-y)
obj-$(CONFIG_GENERIC_GPIO) += $(pfc-y)
-
-# IPMMU/IPMMUI
-obj-$(CONFIG_SHMOBILE_IPMMU) += ipmmu.o
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index 265829f..cb2a3e8 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -187,6 +187,12 @@ config EXYNOS_IOMMU_DEBUG
Say N unless you need kernel log message for IOMMU debugging
+config SHMOBILE_IPMMU
+ bool
+
+config SHMOBILE_IPMMU_TLB
+ bool
+
config SHMOBILE_IOMMU
bool "IOMMU for Renesas IPMMU/IPMMUI"
default n
diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile
index 62cf917..e65384f 100644
--- a/drivers/iommu/Makefile
+++ b/drivers/iommu/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_TEGRA_IOMMU_GART) += tegra-gart.o
obj-$(CONFIG_TEGRA_IOMMU_SMMU) += tegra-smmu.o
obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
obj-$(CONFIG_SHMOBILE_IOMMU) += shmobile-iommu.o
+obj-$(CONFIG_SHMOBILE_IPMMU) += shmobile-ipmmu.o
diff --git a/arch/arm/mach-shmobile/ipmmu.c b/drivers/iommu/shmobile-ipmmu.c
similarity index 100%
rename from arch/arm/mach-shmobile/ipmmu.c
rename to drivers/iommu/shmobile-ipmmu.c
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 01/14] ARM: sh-mobile: Protect ipmmu.h header with ifndef/define
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1355678760-27357-1-git-send-email-laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/arm/mach-shmobile/include/mach/ipmmu.h | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/ipmmu.h b/arch/arm/mach-shmobile/include/mach/ipmmu.h
index ede2f0b..4b805b1f 100644
--- a/arch/arm/mach-shmobile/include/mach/ipmmu.h
+++ b/arch/arm/mach-shmobile/include/mach/ipmmu.h
@@ -1,3 +1,6 @@
+#ifndef __SHMOBILE_IPMMU_H__
+#define __SHMOBILE_IPMMU_H__
+
#ifdef CONFIG_SHMOBILE_IPMMU_TLB
void ipmmu_tlb_flush(struct device *ipmmu_dev);
void ipmmu_tlb_set(struct device *ipmmu_dev, unsigned long phys, int size,
@@ -14,3 +17,5 @@ static int ipmmu_iommu_init(struct device *dev)
return -EINVAL;
}
#endif
+
+#endif /* __SHMOBILE_IPMMU_H__ */
--
1.7.8.6
^ permalink raw reply related
* [PATCH/WIP/RFC 00/14] Renesas IPMMU driver work in progress
From: Laurent Pinchart @ 2012-12-16 17:25 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <1350290093-998-1-git-send-email-hdk@igel.co.jp>
Dear Eiraku-san,
Here's a couple of patches that rework your IPMMU driver in the direction
pointed to by my comments. Feel free to use them as a base, squash them into
your code (my name doesn't need to be kept in commit messages) or even ignore
them completely where they make no sense.
Patch 5/14 has been sent to the linux-arm-kernel mailing list already as it's
an independent fix (but required by the next patches in the series).
After these 14 patches I ran into the issue of matching devices with a
particular IPMMU instance. This turned out to be more complex than I initially
thought. There's currently no driver in mainline that performs that task, and
I'm not sure whether the core infrastructure allows for doing so without
resorting to hacks.
The problem has been discussed very recently on the iommu list, you can find
more information at http://patchwork.ozlabs.org/patch/203717/. No solution has
been agreed on so far, maybe you could reply to the mail thread. Feel free to
CC me.
I'm unsure whether we should use a single ARM IOMMU mapping or one mapping per
device. This needs to be investigated as there's little documentation on the
subject. I would advice contacting Marek Szyprowski (the author of the ARM DMA
IOMMU code) to discuss this matter. Once again feel free to CC me, as well as
the appropriate mailing lists.
In my opinion the shmobile_iommu_attach_all_devices() function should be
removed, and devices should be attached with an IOMMU either as they are added
to the system, or as they are probed. Bus notifiers might be usable to achieve
that, as implemented in the above Tegra SMMU patch. This requires the IOMMU
being registered and fully operational at attachment time, so explicit IOMMU
attachment in driver code might be a better solution for now. That would
likely require one ARM DMA IOMMU mapping per device, device drivers would
explicitly call arm_iommu_create_mapping() and arm_iommu_attach_device().
Laurent Pinchart (14):
ARM: sh-mobile: Protect ipmmu.h header with ifndef/define
shmobile-iommu: Move IPMMU driver to drivers/iommu
shmobile-iommu: Remove __devinit
shmobile-iommu: Use devm_* managed functions
ARM: iommu: Include linux/kref.h in asm/dma-iommu.h
shmobile-iommu: Sort header files alphabetically
shmobile-iommu: Move header file from arch/ to drivers/iommu/
shmobile-iommu: Rename shmobile_iommu_priv to shmobile_iommu_domain
shmobile-ipmmu: Rename ipmmu_priv to shmobile_ipmmu
shmobile-ipmmu: Pass a struct shmobile_ipmmu to IPMMU functions
shmobile-ipmmu: Store a struct shmobile_iommu_arch_data in
archdata.iommu
shmobile-ipmmu: Store ipmmu pointer in iommu arch data and iommu
domain
shmobile-ipmmu: Remove unneeded lock_add spinlock
shmobile-ipmmu: Store iommu_mapping in struct shmobile_ipmmu
arch/arm/include/asm/dma-iommu.h | 1 +
arch/arm/mach-shmobile/Kconfig | 6 -
arch/arm/mach-shmobile/Makefile | 3 -
arch/arm/mach-shmobile/board-ap4evb.c | 2 +-
arch/arm/mach-shmobile/board-mackerel.c | 2 +-
arch/arm/mach-shmobile/include/mach/ipmmu.h | 16 --
arch/arm/mach-shmobile/setup-sh7372.c | 2 +-
drivers/iommu/Kconfig | 6 +
drivers/iommu/Makefile | 1 +
drivers/iommu/shmobile-iommu.c | 259 +++++++++++---------
.../ipmmu.c => drivers/iommu/shmobile-ipmmu.c | 107 ++++-----
drivers/iommu/shmobile-ipmmu.h | 27 ++
include/linux/sh_iommu.h | 20 ++
13 files changed, 248 insertions(+), 204 deletions(-)
delete mode 100644 arch/arm/mach-shmobile/include/mach/ipmmu.h
rename arch/arm/mach-shmobile/ipmmu.c => drivers/iommu/shmobile-ipmmu.c (51%)
create mode 100644 drivers/iommu/shmobile-ipmmu.h
create mode 100644 include/linux/sh_iommu.h
--
Regards,
Laurent Pinchart
^ permalink raw reply
* [PATCH 2/2] net: sh_eth: Add Device Tree support
From: Bastian Hecht @ 2012-12-16 13:54 UTC (permalink / raw)
To: linux-sh
We add support for Device Tree probing in order to support the Armadillo
DT testcase.
Until we figure out what portions of the platform config are board
dependent and should be used as OF properties and what portions are only
SoC related and can be stored in the driver itself, I have attached all
platform configurations to the OF match in the driver.
Not-yet-signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com>
---
drivers/net/ethernet/renesas/sh_eth.c | 72 ++++++++++++++++++++++++++++++++-
1 file changed, 71 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index c8bfea0..1fbbf69 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -31,6 +31,8 @@
#include <linux/platform_device.h>
#include <linux/mdio-bitbang.h>
#include <linux/netdevice.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
#include <linux/phy.h>
#include <linux/cache.h>
#include <linux/io.h>
@@ -2347,6 +2349,63 @@ static const struct net_device_ops sh_eth_netdev_ops = {
.ndo_change_mtu = eth_change_mtu,
};
+#ifdef CONFIG_OF
+struct sh_eth_soc_config {
+ int phy;
+ phy_interface_t phy_interface;
+ unsigned edmac_endian:1;
+ unsigned register_type:2;
+};
+
+static struct sh_eth_soc_config sh_eth_r8a7740_config = {
+ .phy = 0x00,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+ .edmac_endian = EDMAC_LITTLE_ENDIAN,
+ .register_type = SH_ETH_REG_GIGABIT,
+};
+
+static const struct of_device_id sh_eth_match[] = {
+ { .compatible = "renesas,sh-eth-r8a7740",
+ .data = &sh_eth_r8a7740_config },
+ {},
+};
+MODULE_DEVICE_TABLE(of, sh_eth_match);
+
+static struct sh_eth_plat_data *sh_eth_parse_dt(struct device *dev)
+{
+ const struct of_device_id *match;
+ struct sh_eth_plat_data *pd;
+ struct sh_eth_soc_config *config;
+
+ match = of_match_device(sh_eth_match, dev);
+ if (match)
+ config = (struct sh_eth_soc_config *)match->data;
+ else {
+ dev_err(dev, "%s: no OF configuration attached\n", __func__);
+ return NULL;
+ }
+
+ pd = devm_kzalloc(dev, sizeof(struct sh_eth_plat_data), GFP_KERNEL);
+ if (!pd) {
+ dev_err(dev, "failed to allocate setup data\n");
+ return NULL;
+ }
+
+ pd->phy = config->phy;
+ pd->phy_interface = config->phy_interface;
+ pd->edmac_endian = config->edmac_endian;
+ pd->register_type = config->register_type;
+
+ return pd;
+}
+#else
+static struct sh_eth_plat_data *sh_eth_parse_dt(struct device *dev)
+{
+ return NULL;
+}
+#define sh_eth_match NULL
+#endif
+
static int sh_eth_drv_probe(struct platform_device *pdev)
{
int ret, devno = 0;
@@ -2403,7 +2462,17 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
pm_runtime_resume(&pdev->dev);
- pd = (struct sh_eth_plat_data *)(pdev->dev.platform_data);
+ if (pdev->dev.of_node)
+ pd = sh_eth_parse_dt(&pdev->dev);
+ else
+ pd = pdev->dev.platform_data;
+
+ if (!pd) {
+ dev_err(&pdev->dev, "failed to obtain device info\n");
+ ret = -ENXIO;
+ goto out_release;
+ }
+
/* get PHY ID */
mdp->phy_id = pd->phy;
mdp->phy_interface = pd->phy_interface;
@@ -2533,6 +2602,7 @@ static struct platform_driver sh_eth_driver = {
.driver = {
.name = CARDNAME,
.pm = &sh_eth_dev_pm_ops,
+ .of_match_table = sh_eth_match,
},
};
--
1.7.9.5
^ permalink raw reply related
* [PATCH 1/2] ARM: shmobile: Armadillo800eva: DT boot testcase with ethernet support
From: Bastian Hecht @ 2012-12-16 13:54 UTC (permalink / raw)
To: linux-sh
In-Reply-To: <87bok7lm0h.wl%kuninori.morimoto.gx@renesas.com>
This patch strips off most of the board code. We only keep the GPIO
configurations used for the ethernet module sh_eth. We add the ethernet
controller in the DT config file r8a7740-armadillo800eva.dts and make
sure that clocks are turned on working with the different naming scheme
for devices when using DT instead of the old platform code.
Never-signed-off-by: Bastian Hecht <hechtb@gmail.com>
---
For a better overview - here is what is left:
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/irq.h>
#include <mach/common.h>
#include <mach/r8a7740.h>
#include <asm/mach/arch.h>
#include <asm/hardware/cache-l2x0.h>
/*
* board init
*/
static void __init eva_init(void)
{
r8a7740_pinmux_init();
r8a7740_meram_workaround();
/* SCIFA1 */
gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
/* GETHER */
gpio_request(GPIO_FN_ET_CRS, NULL);
gpio_request(GPIO_FN_ET_MDC, NULL);
gpio_request(GPIO_FN_ET_MDIO, NULL);
gpio_request(GPIO_FN_ET_TX_ER, NULL);
gpio_request(GPIO_FN_ET_RX_ER, NULL);
gpio_request(GPIO_FN_ET_ERXD0, NULL);
gpio_request(GPIO_FN_ET_ERXD1, NULL);
gpio_request(GPIO_FN_ET_ERXD2, NULL);
gpio_request(GPIO_FN_ET_ERXD3, NULL);
gpio_request(GPIO_FN_ET_TX_CLK, NULL);
gpio_request(GPIO_FN_ET_TX_EN, NULL);
gpio_request(GPIO_FN_ET_ETXD0, NULL);
gpio_request(GPIO_FN_ET_ETXD1, NULL);
gpio_request(GPIO_FN_ET_ETXD2, NULL);
gpio_request(GPIO_FN_ET_ETXD3, NULL);
gpio_request(GPIO_FN_ET_PHY_INT, NULL);
gpio_request(GPIO_FN_ET_COL, NULL);
gpio_request(GPIO_FN_ET_RX_DV, NULL);
gpio_request(GPIO_FN_ET_RX_CLK, NULL);
gpio_request(GPIO_PORT18, NULL); /* PHY_RST */
gpio_direction_output(GPIO_PORT18, 1);
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 32K*8way */
l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
#endif
r8a7740_add_standard_devices_dt();
}
static const char *eva_boards_compat_dt[] __initdata = {
"renesas,armadillo800eva",
NULL,
};
DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
.map_io = r8a7740_map_io,
.init_early = r8a7740_add_early_devices_dt,
.init_irq = r8a7740_init_irq_of,
.nr_irqs = NR_IRQS_LEGACY,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = eva_init,
.init_late = shmobile_init_late,
.timer = &shmobile_timer,
.dt_compat = eva_boards_compat_dt,
MACHINE_END
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 7 +
arch/arm/mach-shmobile/board-armadillo800eva.c | 1167 +-----------------------
arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
arch/arm/mach-shmobile/include/mach/common.h | 2 +
4 files changed, 15 insertions(+), 1162 deletions(-)
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index a8e7bd9..0b53952 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -19,4 +19,11 @@
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
+
+ ethernet@e9a00000 {
+ compatible = "renesas,sh-eth-r8a7740";
+ reg = <0xe9a00000 0x800 0xe9a01800 0x200>;
+ interrupt-parent = <&intca>;
+ interrupts = <0x0500>;
+ };
};
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 2912eab..216d542 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -19,972 +19,19 @@
*
*/
-#include <linux/clk.h>
-#include <linux/delay.h>
-#include <linux/err.h>
#include <linux/kernel.h>
-#include <linux/input.h>
-#include <linux/irq.h>
-#include <linux/platform_device.h>
#include <linux/gpio.h>
-#include <linux/gpio_keys.h>
-#include <linux/regulator/fixed.h>
-#include <linux/regulator/machine.h>
-#include <linux/sh_eth.h>
-#include <linux/videodev2.h>
-#include <linux/usb/renesas_usbhs.h>
-#include <linux/mfd/tmio.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/sh_mmcif.h>
-#include <linux/mmc/sh_mobile_sdhi.h>
-#include <linux/i2c-gpio.h>
+#include <linux/irq.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/r8a7740.h>
-#include <media/mt9t112.h>
-#include <media/sh_mobile_ceu.h>
-#include <media/soc_camera.h>
-#include <asm/page.h>
-#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/time.h>
#include <asm/hardware/cache-l2x0.h>
-#include <video/sh_mobile_lcdc.h>
-#include <video/sh_mobile_hdmi.h>
-#include <sound/sh_fsi.h>
-#include <sound/simple_card.h>
-
-#include "sh-gpio.h"
-
-/*
- * CON1 Camera Module
- * CON2 Extension Bus
- * CON3 HDMI Output
- * CON4 Composite Video Output
- * CON5 H-UDI JTAG
- * CON6 ARM JTAG
- * CON7 SD1
- * CON8 SD2
- * CON9 RTC BackUp
- * CON10 Monaural Mic Input
- * CON11 Stereo Headphone Output
- * CON12 Audio Line Output(L)
- * CON13 Audio Line Output(R)
- * CON14 AWL13 Module
- * CON15 Extension
- * CON16 LCD1
- * CON17 LCD2
- * CON19 Power Input
- * CON20 USB1
- * CON21 USB2
- * CON22 Serial
- * CON23 LAN
- * CON24 USB3
- * LED1 Camera LED(Yellow)
- * LED2 Power LED (Green)
- * ED3-LED6 User LED(Yellow)
- * LED7 LAN link LED(Green)
- * LED8 LAN activity LED(Yellow)
- */
-
-/*
- * DipSwitch
- *
- * SW1
- *
- * -12345678-+---------------+----------------------------
- * 1 | boot | hermit
- * 0 | boot | OS auto boot
- * -12345678-+---------------+----------------------------
- * 00 | boot device | eMMC
- * 10 | boot device | SDHI0 (CON7)
- * 01 | boot device | -
- * 11 | boot device | Extension Buss (CS0)
- * -12345678-+---------------+----------------------------
- * 0 | Extension Bus | D8-D15 disable, eMMC enable
- * 1 | Extension Bus | D8-D15 enable, eMMC disable
- * -12345678-+---------------+----------------------------
- * 0 | SDHI1 | COM8 disable, COM14 enable
- * 1 | SDHI1 | COM8 enable, COM14 disable
- * -12345678-+---------------+----------------------------
- * 0 | USB0 | COM20 enable, COM24 disable
- * 1 | USB0 | COM20 disable, COM24 enable
- * -12345678-+---------------+----------------------------
- * 00 | JTAG | SH-X2
- * 10 | JTAG | ARM
- * 01 | JTAG | -
- * 11 | JTAG | Boundary Scan
- *-----------+---------------+----------------------------
- */
-
-/*
- * FSI-WM8978
- *
- * this command is required when playback.
- *
- * # amixer set "Headphone" 50
- */
-
-/*
- * USB function
- *
- * When you use USB Function,
- * set SW1.6 ON, and connect cable to CN24.
- *
- * USBF needs workaround on R8A7740 chip.
- * These are a little bit complex.
- * see
- * usbhsf_power_ctrl()
- */
-#define IRQ7 evt2irq(0x02e0)
-#define USBCR1 IOMEM(0xe605810a)
-#define USBH 0xC6700000
-#define USBH_USBCTR 0x10834
-
-struct usbhsf_private {
- struct clk *phy;
- struct clk *usb24;
- struct clk *pci;
- struct clk *func;
- struct clk *host;
- void __iomem *usbh_base;
- struct renesas_usbhs_platform_info info;
-};
-
-#define usbhsf_get_priv(pdev) \
- container_of(renesas_usbhs_get_info(pdev), \
- struct usbhsf_private, info)
-
-static int usbhsf_get_id(struct platform_device *pdev)
-{
- return USBHS_GADGET;
-}
-
-static void usbhsf_power_ctrl(struct platform_device *pdev,
- void __iomem *base, int enable)
-{
- struct usbhsf_private *priv = usbhsf_get_priv(pdev);
-
- /*
- * Work around for USB Function.
- * It needs USB host clock, and settings
- */
- if (enable) {
- /*
- * enable all the related usb clocks
- * for usb workaround
- */
- clk_enable(priv->usb24);
- clk_enable(priv->pci);
- clk_enable(priv->host);
- clk_enable(priv->func);
- clk_enable(priv->phy);
-
- /*
- * set USBCR1
- *
- * Port1 is driven by USB function,
- * Port2 is driven by USB HOST
- * One HOST (Port1 or Port2 is HOST)
- * USB PLL input clock = 24MHz
- */
- __raw_writew(0xd750, USBCR1);
- mdelay(1);
-
- /*
- * start USB Host
- */
- __raw_writel(0x0000000c, priv->usbh_base + USBH_USBCTR);
- __raw_writel(0x00000008, priv->usbh_base + USBH_USBCTR);
- mdelay(10);
-
- /*
- * USB PHY Power ON
- */
- __raw_writew(0xd770, USBCR1);
- __raw_writew(0x4000, base + 0x102); /* USBF :: SUSPMODE */
-
- } else {
- __raw_writel(0x0000010f, priv->usbh_base + USBH_USBCTR);
- __raw_writew(0xd7c0, USBCR1); /* GPIO */
-
- clk_disable(priv->phy);
- clk_disable(priv->func); /* usb work around */
- clk_disable(priv->host); /* usb work around */
- clk_disable(priv->pci); /* usb work around */
- clk_disable(priv->usb24); /* usb work around */
- }
-}
-
-static int usbhsf_get_vbus(struct platform_device *pdev)
-{
- return gpio_get_value(GPIO_PORT209);
-}
-
-static irqreturn_t usbhsf_interrupt(int irq, void *data)
-{
- struct platform_device *pdev = data;
-
- renesas_usbhs_call_notify_hotplug(pdev);
-
- return IRQ_HANDLED;
-}
-
-static void usbhsf_hardware_exit(struct platform_device *pdev)
-{
- struct usbhsf_private *priv = usbhsf_get_priv(pdev);
-
- if (!IS_ERR(priv->phy))
- clk_put(priv->phy);
- if (!IS_ERR(priv->usb24))
- clk_put(priv->usb24);
- if (!IS_ERR(priv->pci))
- clk_put(priv->pci);
- if (!IS_ERR(priv->host))
- clk_put(priv->host);
- if (!IS_ERR(priv->func))
- clk_put(priv->func);
- if (priv->usbh_base)
- iounmap(priv->usbh_base);
-
- priv->phy = NULL;
- priv->usb24 = NULL;
- priv->pci = NULL;
- priv->host = NULL;
- priv->func = NULL;
- priv->usbh_base = NULL;
-
- free_irq(IRQ7, pdev);
-}
-
-static int usbhsf_hardware_init(struct platform_device *pdev)
-{
- struct usbhsf_private *priv = usbhsf_get_priv(pdev);
- int ret;
-
- priv->phy = clk_get(&pdev->dev, "phy");
- priv->usb24 = clk_get(&pdev->dev, "usb24");
- priv->pci = clk_get(&pdev->dev, "pci");
- priv->func = clk_get(&pdev->dev, "func");
- priv->host = clk_get(&pdev->dev, "host");
- priv->usbh_base = ioremap_nocache(USBH, 0x20000);
-
- if (IS_ERR(priv->phy) ||
- IS_ERR(priv->usb24) ||
- IS_ERR(priv->pci) ||
- IS_ERR(priv->host) ||
- IS_ERR(priv->func) ||
- !priv->usbh_base) {
- dev_err(&pdev->dev, "USB clock setting failed\n");
- usbhsf_hardware_exit(pdev);
- return -EIO;
- }
-
- ret = request_irq(IRQ7, usbhsf_interrupt, IRQF_TRIGGER_NONE,
- dev_name(&pdev->dev), pdev);
- if (ret) {
- dev_err(&pdev->dev, "request_irq err\n");
- return ret;
- }
- irq_set_irq_type(IRQ7, IRQ_TYPE_EDGE_BOTH);
-
- /* usb24 use 1/1 of parent clock (= usb24s = 24MHz) */
- clk_set_rate(priv->usb24,
- clk_get_rate(clk_get_parent(priv->usb24)));
-
- return 0;
-}
-
-static struct usbhsf_private usbhsf_private = {
- .info = {
- .platform_callback = {
- .get_id = usbhsf_get_id,
- .get_vbus = usbhsf_get_vbus,
- .hardware_init = usbhsf_hardware_init,
- .hardware_exit = usbhsf_hardware_exit,
- .power_ctrl = usbhsf_power_ctrl,
- },
- .driver_param = {
- .buswait_bwait = 5,
- .detection_delay = 5,
- .d0_rx_id = SHDMA_SLAVE_USBHS_RX,
- .d1_tx_id = SHDMA_SLAVE_USBHS_TX,
- },
- }
-};
-
-static struct resource usbhsf_resources[] = {
- {
- .name = "USBHS",
- .start = 0xe6890000,
- .end = 0xe6890104 - 1,
- .flags = IORESOURCE_MEM,
- },
- {
- .start = evt2irq(0x0A20),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device usbhsf_device = {
- .name = "renesas_usbhs",
- .dev = {
- .platform_data = &usbhsf_private.info,
- },
- .id = -1,
- .num_resources = ARRAY_SIZE(usbhsf_resources),
- .resource = usbhsf_resources,
-};
-
-/* Ether */
-static struct sh_eth_plat_data sh_eth_platdata = {
- .phy = 0x00, /* LAN8710A */
- .edmac_endian = EDMAC_LITTLE_ENDIAN,
- .register_type = SH_ETH_REG_GIGABIT,
- .phy_interface = PHY_INTERFACE_MODE_MII,
-};
-
-static struct resource sh_eth_resources[] = {
- {
- .start = 0xe9a00000,
- .end = 0xe9a00800 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = 0xe9a01800,
- .end = 0xe9a02000 - 1,
- .flags = IORESOURCE_MEM,
- }, {
- .start = evt2irq(0x0500),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sh_eth_device = {
- .name = "sh-eth",
- .id = -1,
- .dev = {
- .platform_data = &sh_eth_platdata,
- },
- .resource = sh_eth_resources,
- .num_resources = ARRAY_SIZE(sh_eth_resources),
-};
-
-/* LCDC */
-static struct fb_videomode lcdc0_mode = {
- .name = "AMPIER/AM-800480",
- .xres = 800,
- .yres = 480,
- .left_margin = 88,
- .right_margin = 40,
- .hsync_len = 128,
- .upper_margin = 20,
- .lower_margin = 5,
- .vsync_len = 5,
- .sync = 0,
-};
-
-static struct sh_mobile_lcdc_info lcdc0_info = {
- .clock_source = LCDC_CLK_BUS,
- .ch[0] = {
- .chan = LCDC_CHAN_MAINLCD,
- .fourcc = V4L2_PIX_FMT_RGB565,
- .interface_type = RGB24,
- .clock_divider = 5,
- .flags = 0,
- .lcd_modes = &lcdc0_mode,
- .num_modes = 1,
- .panel_cfg = {
- .width = 111,
- .height = 68,
- },
- },
-};
-
-static struct resource lcdc0_resources[] = {
- [0] = {
- .name = "LCD0",
- .start = 0xfe940000,
- .end = 0xfe943fff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x580),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device lcdc0_device = {
- .name = "sh_mobile_lcdc_fb",
- .num_resources = ARRAY_SIZE(lcdc0_resources),
- .resource = lcdc0_resources,
- .id = 0,
- .dev = {
- .platform_data = &lcdc0_info,
- .coherent_dma_mask = ~0,
- },
-};
-
-/*
- * LCDC1/HDMI
- */
-static struct sh_mobile_hdmi_info hdmi_info = {
- .flags = HDMI_OUTPUT_PUSH_PULL |
- HDMI_OUTPUT_POLARITY_HI |
- HDMI_32BIT_REG |
- HDMI_HAS_HTOP1 |
- HDMI_SND_SRC_SPDIF,
-};
-
-static struct resource hdmi_resources[] = {
- [0] = {
- .name = "HDMI",
- .start = 0xe6be0000,
- .end = 0xe6be03ff,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x1700),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- .name = "HDMI emma3pf",
- .start = 0xe6be4000,
- .end = 0xe6be43ff,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device hdmi_device = {
- .name = "sh-mobile-hdmi",
- .num_resources = ARRAY_SIZE(hdmi_resources),
- .resource = hdmi_resources,
- .id = -1,
- .dev = {
- .platform_data = &hdmi_info,
- },
-};
-
-static const struct fb_videomode lcdc1_mode = {
- .name = "HDMI 720p",
- .xres = 1280,
- .yres = 720,
- .pixclock = 13468,
- .left_margin = 220,
- .right_margin = 110,
- .hsync_len = 40,
- .upper_margin = 20,
- .lower_margin = 5,
- .vsync_len = 5,
- .refresh = 60,
- .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
-};
-
-static struct sh_mobile_lcdc_info hdmi_lcdc_info = {
- .clock_source = LCDC_CLK_PERIPHERAL, /* HDMI clock */
- .ch[0] = {
- .chan = LCDC_CHAN_MAINLCD,
- .fourcc = V4L2_PIX_FMT_RGB565,
- .interface_type = RGB24,
- .clock_divider = 1,
- .flags = LCDC_FLAGS_DWPOL,
- .lcd_modes = &lcdc1_mode,
- .num_modes = 1,
- .tx_dev = &hdmi_device,
- .panel_cfg = {
- .width = 1280,
- .height = 720,
- },
- },
-};
-
-static struct resource hdmi_lcdc_resources[] = {
- [0] = {
- .name = "LCDC1",
- .start = 0xfe944000,
- .end = 0xfe948000 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x1780),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device hdmi_lcdc_device = {
- .name = "sh_mobile_lcdc_fb",
- .num_resources = ARRAY_SIZE(hdmi_lcdc_resources),
- .resource = hdmi_lcdc_resources,
- .id = 1,
- .dev = {
- .platform_data = &hdmi_lcdc_info,
- .coherent_dma_mask = ~0,
- },
-};
-
-/* GPIO KEY */
-#define GPIO_KEY(c, g, d, ...) \
- { .code = c, .gpio = g, .desc = d, .active_low = 1, __VA_ARGS__ }
-
-static struct gpio_keys_button gpio_buttons[] = {
- GPIO_KEY(KEY_POWER, GPIO_PORT99, "SW3", .wakeup = 1),
- GPIO_KEY(KEY_BACK, GPIO_PORT100, "SW4"),
- GPIO_KEY(KEY_MENU, GPIO_PORT97, "SW5"),
- GPIO_KEY(KEY_HOME, GPIO_PORT98, "SW6"),
-};
-
-static struct gpio_keys_platform_data gpio_key_info = {
- .buttons = gpio_buttons,
- .nbuttons = ARRAY_SIZE(gpio_buttons),
-};
-
-static struct platform_device gpio_keys_device = {
- .name = "gpio-keys",
- .id = -1,
- .dev = {
- .platform_data = &gpio_key_info,
- },
-};
-
-/* Fixed 3.3V regulator to be used by SDHI0, SDHI1, MMCIF */
-static struct regulator_consumer_supply fixed3v3_power_consumers[] -{
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
- REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
- REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
- REGULATOR_SUPPLY("vmmc", "sh_mmcif"),
- REGULATOR_SUPPLY("vqmmc", "sh_mmcif"),
-};
-
-/* SDHI0 */
-/*
- * FIXME
- *
- * It use polling mode here, since
- * CD (= Card Detect) pin is not connected to SDHI0_CD.
- * We can use IRQ31 as card detect irq,
- * but it needs chattering removal operation
- */
-#define IRQ31 evt2irq(0x33E0)
-static struct sh_mobile_sdhi_info sdhi0_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |\
- MMC_CAP_NEEDS_POLL,
- .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
-};
-
-static struct resource sdhi0_resources[] = {
- {
- .name = "SDHI0",
- .start = 0xe6850000,
- .end = 0xe6850100 - 1,
- .flags = IORESOURCE_MEM,
- },
- /*
- * no SH_MOBILE_SDHI_IRQ_CARD_DETECT here
- */
- {
- .name = SH_MOBILE_SDHI_IRQ_SDCARD,
- .start = evt2irq(0x0E20),
- .flags = IORESOURCE_IRQ,
- },
- {
- .name = SH_MOBILE_SDHI_IRQ_SDIO,
- .start = evt2irq(0x0E40),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi0_device = {
- .name = "sh_mobile_sdhi",
- .id = 0,
- .dev = {
- .platform_data = &sdhi0_info,
- },
- .num_resources = ARRAY_SIZE(sdhi0_resources),
- .resource = sdhi0_resources,
-};
-
-/* SDHI1 */
-static struct sh_mobile_sdhi_info sdhi1_info = {
- .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
- .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
- .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
- .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
-};
-
-static struct resource sdhi1_resources[] = {
- [0] = {
- .name = "SDHI1",
- .start = 0xe6860000,
- .end = 0xe6860100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x0E80),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- .start = evt2irq(0x0EA0),
- .flags = IORESOURCE_IRQ,
- },
- [3] = {
- .start = evt2irq(0x0EC0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sdhi1_device = {
- .name = "sh_mobile_sdhi",
- .id = 1,
- .dev = {
- .platform_data = &sdhi1_info,
- },
- .num_resources = ARRAY_SIZE(sdhi1_resources),
- .resource = sdhi1_resources,
-};
-
-/* MMCIF */
-static struct sh_mmcif_plat_data sh_mmcif_plat = {
- .sup_pclk = 0,
- .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
- .caps = MMC_CAP_4_BIT_DATA |
- MMC_CAP_8_BIT_DATA |
- MMC_CAP_NONREMOVABLE,
-};
-
-static struct resource sh_mmcif_resources[] = {
- [0] = {
- .name = "MMCIF",
- .start = 0xe6bd0000,
- .end = 0xe6bd0100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- /* MMC ERR */
- .start = evt2irq(0x1AC0),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* MMC NOR */
- .start = evt2irq(0x1AE0),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device sh_mmcif_device = {
- .name = "sh_mmcif",
- .id = -1,
- .dev = {
- .platform_data = &sh_mmcif_plat,
- },
- .num_resources = ARRAY_SIZE(sh_mmcif_resources),
- .resource = sh_mmcif_resources,
-};
-
-/* Camera */
-static int mt9t111_power(struct device *dev, int mode)
-{
- struct clk *mclk = clk_get(NULL, "video1");
-
- if (IS_ERR(mclk)) {
- dev_err(dev, "can't get video1 clock\n");
- return -EINVAL;
- }
-
- if (mode) {
- /* video1 (= CON1 camera) expect 24MHz */
- clk_set_rate(mclk, clk_round_rate(mclk, 24000000));
- clk_enable(mclk);
- gpio_direction_output(GPIO_PORT158, 1);
- } else {
- gpio_direction_output(GPIO_PORT158, 0);
- clk_disable(mclk);
- }
-
- clk_put(mclk);
-
- return 0;
-}
-
-static struct i2c_board_info i2c_camera_mt9t111 = {
- I2C_BOARD_INFO("mt9t112", 0x3d),
-};
-
-static struct mt9t112_camera_info mt9t111_info = {
- .divider = { 16, 0, 0, 7, 0, 10, 14, 7, 7 },
-};
-
-static struct soc_camera_link mt9t111_link = {
- .i2c_adapter_id = 0,
- .bus_id = 0,
- .board_info = &i2c_camera_mt9t111,
- .power = mt9t111_power,
- .priv = &mt9t111_info,
-};
-
-static struct platform_device camera_device = {
- .name = "soc-camera-pdrv",
- .id = 0,
- .dev = {
- .platform_data = &mt9t111_link,
- },
-};
-
-/* CEU0 */
-static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
- .flags = SH_CEU_FLAG_LOWER_8BIT,
-};
-
-static struct resource ceu0_resources[] = {
- [0] = {
- .name = "CEU",
- .start = 0xfe910000,
- .end = 0xfe91009f,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = intcs_evt2irq(0x0500),
- .flags = IORESOURCE_IRQ,
- },
- [2] = {
- /* place holder for contiguous memory */
- },
-};
-
-static struct platform_device ceu0_device = {
- .name = "sh_mobile_ceu",
- .id = 0,
- .num_resources = ARRAY_SIZE(ceu0_resources),
- .resource = ceu0_resources,
- .dev = {
- .platform_data = &sh_mobile_ceu0_info,
- .coherent_dma_mask = 0xffffffff,
- },
-};
-
-/* FSI */
-static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
-{
- struct clk *fsib;
- int ret;
-
- /* it support 48KHz only */
- if (48000 != rate)
- return -EINVAL;
-
- fsib = clk_get(dev, "ickb");
- if (IS_ERR(fsib))
- return -EINVAL;
-
- if (enable) {
- ret = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
- clk_enable(fsib);
- } else {
- ret = 0;
- clk_disable(fsib);
- }
-
- clk_put(fsib);
-
- return ret;
-}
-
-static struct sh_fsi_platform_info fsi_info = {
- /* FSI-WM8978 */
- .port_a = {
- .tx_id = SHDMA_SLAVE_FSIA_TX,
- },
- /* FSI-HDMI */
- .port_b = {
- .flags = SH_FSI_FMT_SPDIF |
- SH_FSI_ENABLE_STREAM_MODE,
- .set_rate = fsi_hdmi_set_rate,
- .tx_id = SHDMA_SLAVE_FSIB_TX,
- }
-};
-
-static struct resource fsi_resources[] = {
- [0] = {
- .name = "FSI",
- .start = 0xfe1f0000,
- .end = 0xfe1f8400 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = evt2irq(0x1840),
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device fsi_device = {
- .name = "sh_fsi2",
- .id = -1,
- .num_resources = ARRAY_SIZE(fsi_resources),
- .resource = fsi_resources,
- .dev = {
- .platform_data = &fsi_info,
- },
-};
-
-/* FSI-WM8978 */
-static struct asoc_simple_dai_init_info fsi_wm8978_init_info = {
- .fmt = SND_SOC_DAIFMT_I2S,
- .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_NB_NF,
- .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
- .sysclk = 12288000,
-};
-
-static struct asoc_simple_card_info fsi_wm8978_info = {
- .name = "wm8978",
- .card = "FSI2A-WM8978",
- .cpu_dai = "fsia-dai",
- .codec = "wm8978.0-001a",
- .platform = "sh_fsi2",
- .codec_dai = "wm8978-hifi",
- .init = &fsi_wm8978_init_info,
-};
-
-static struct platform_device fsi_wm8978_device = {
- .name = "asoc-simple-card",
- .id = 0,
- .dev = {
- .platform_data = &fsi_wm8978_info,
- },
-};
-
-/* FSI-HDMI */
-static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
- .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
-};
-
-static struct asoc_simple_card_info fsi2_hdmi_info = {
- .name = "HDMI",
- .card = "FSI2B-HDMI",
- .cpu_dai = "fsib-dai",
- .codec = "sh-mobile-hdmi",
- .platform = "sh_fsi2",
- .codec_dai = "sh_mobile_hdmi-hifi",
- .init = &fsi2_hdmi_init_info,
-};
-
-static struct platform_device fsi_hdmi_device = {
- .name = "asoc-simple-card",
- .id = 1,
- .dev = {
- .platform_data = &fsi2_hdmi_info,
- },
-};
-
-/* RTC: RTC connects i2c-gpio. */
-static struct i2c_gpio_platform_data i2c_gpio_data = {
- .sda_pin = GPIO_PORT208,
- .scl_pin = GPIO_PORT91,
- .udelay = 5, /* 100 kHz */
-};
-
-static struct platform_device i2c_gpio_device = {
- .name = "i2c-gpio",
- .id = 2,
- .dev = {
- .platform_data = &i2c_gpio_data,
- },
-};
-
-/* I2C */
-static struct i2c_board_info i2c0_devices[] = {
- {
- I2C_BOARD_INFO("st1232-ts", 0x55),
- .irq = evt2irq(0x0340),
- },
- {
- I2C_BOARD_INFO("wm8978", 0x1a),
- },
-};
-
-static struct i2c_board_info i2c2_devices[] = {
- {
- I2C_BOARD_INFO("s35390a", 0x30),
- .type = "s35390a",
- },
-};
-
-/*
- * board devices
- */
-static struct platform_device *eva_devices[] __initdata = {
- &lcdc0_device,
- &gpio_keys_device,
- &sh_eth_device,
- &sdhi0_device,
- &sh_mmcif_device,
- &hdmi_device,
- &hdmi_lcdc_device,
- &camera_device,
- &ceu0_device,
- &fsi_device,
- &fsi_wm8978_device,
- &fsi_hdmi_device,
- &i2c_gpio_device,
-};
-
-static void __init eva_clock_init(void)
-{
- struct clk *system = clk_get(NULL, "system_clk");
- struct clk *xtal1 = clk_get(NULL, "extal1");
- struct clk *usb24s = clk_get(NULL, "usb24s");
- struct clk *fsibck = clk_get(NULL, "fsibck");
- struct clk *fsib = clk_get(&fsi_device.dev, "ickb");
-
- if (IS_ERR(system) ||
- IS_ERR(xtal1) ||
- IS_ERR(usb24s) ||
- IS_ERR(fsibck) ||
- IS_ERR(fsib)) {
- pr_err("armadillo800eva board clock init failed\n");
- goto clock_error;
- }
-
- /* armadillo 800 eva extal1 is 24MHz */
- clk_set_rate(xtal1, 24000000);
-
- /* usb24s use extal1 (= system) clock (= 24MHz) */
- clk_set_parent(usb24s, system);
-
- /* FSIBCK is 12.288MHz, and it is parent of FSI-B */
- clk_set_parent(fsib, fsibck);
- clk_set_rate(fsibck, 12288000);
- clk_set_rate(fsib, 12288000);
-
-clock_error:
- if (!IS_ERR(system))
- clk_put(system);
- if (!IS_ERR(xtal1))
- clk_put(xtal1);
- if (!IS_ERR(usb24s))
- clk_put(usb24s);
- if (!IS_ERR(fsibck))
- clk_put(fsibck);
- if (!IS_ERR(fsib))
- clk_put(fsib);
-}
/*
* board init
*/
-#define GPIO_PORT7CR IOMEM(0xe6050007)
-#define GPIO_PORT8CR IOMEM(0xe6050008)
static void __init eva_init(void)
{
- struct platform_device *usb = NULL;
-
- regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
- ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
-
r8a7740_pinmux_init();
r8a7740_meram_workaround();
@@ -992,49 +39,6 @@ static void __init eva_init(void)
gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
gpio_request(GPIO_FN_SCIFA1_TXD, NULL);
- /* LCDC0 */
- gpio_request(GPIO_FN_LCDC0_SELECT, NULL);
- gpio_request(GPIO_FN_LCD0_D0, NULL);
- gpio_request(GPIO_FN_LCD0_D1, NULL);
- gpio_request(GPIO_FN_LCD0_D2, NULL);
- gpio_request(GPIO_FN_LCD0_D3, NULL);
- gpio_request(GPIO_FN_LCD0_D4, NULL);
- gpio_request(GPIO_FN_LCD0_D5, NULL);
- gpio_request(GPIO_FN_LCD0_D6, NULL);
- gpio_request(GPIO_FN_LCD0_D7, NULL);
- gpio_request(GPIO_FN_LCD0_D8, NULL);
- gpio_request(GPIO_FN_LCD0_D9, NULL);
- gpio_request(GPIO_FN_LCD0_D10, NULL);
- gpio_request(GPIO_FN_LCD0_D11, NULL);
- gpio_request(GPIO_FN_LCD0_D12, NULL);
- gpio_request(GPIO_FN_LCD0_D13, NULL);
- gpio_request(GPIO_FN_LCD0_D14, NULL);
- gpio_request(GPIO_FN_LCD0_D15, NULL);
- gpio_request(GPIO_FN_LCD0_D16, NULL);
- gpio_request(GPIO_FN_LCD0_D17, NULL);
- gpio_request(GPIO_FN_LCD0_D18_PORT40, NULL);
- gpio_request(GPIO_FN_LCD0_D19_PORT4, NULL);
- gpio_request(GPIO_FN_LCD0_D20_PORT3, NULL);
- gpio_request(GPIO_FN_LCD0_D21_PORT2, NULL);
- gpio_request(GPIO_FN_LCD0_D22_PORT0, NULL);
- gpio_request(GPIO_FN_LCD0_D23_PORT1, NULL);
- gpio_request(GPIO_FN_LCD0_DCK, NULL);
- gpio_request(GPIO_FN_LCD0_VSYN, NULL);
- gpio_request(GPIO_FN_LCD0_HSYN, NULL);
- gpio_request(GPIO_FN_LCD0_DISP, NULL);
- gpio_request(GPIO_FN_LCD0_LCLK_PORT165, NULL);
-
- gpio_request(GPIO_PORT61, NULL); /* LCDDON */
- gpio_direction_output(GPIO_PORT61, 1);
-
- gpio_request(GPIO_PORT202, NULL); /* LCD0_LED_CONT */
- gpio_direction_output(GPIO_PORT202, 0);
-
- /* Touchscreen */
- gpio_request(GPIO_FN_IRQ10, NULL); /* TP_INT */
- gpio_request(GPIO_PORT166, NULL); /* TP_RST_B */
- gpio_direction_output(GPIO_PORT166, 1);
-
/* GETHER */
gpio_request(GPIO_FN_ET_CRS, NULL);
gpio_request(GPIO_FN_ET_MDC, NULL);
@@ -1059,174 +63,12 @@ static void __init eva_init(void)
gpio_request(GPIO_PORT18, NULL); /* PHY_RST */
gpio_direction_output(GPIO_PORT18, 1);
- /* USB */
- gpio_request(GPIO_PORT159, NULL); /* USB_DEVICE_MODE */
- gpio_direction_input(GPIO_PORT159);
-
- if (gpio_get_value(GPIO_PORT159)) {
- /* USB Host */
- } else {
- /* USB Func */
- /*
- * A1 chip has 2 IRQ7 pin and it was controled by MSEL register.
- * OTOH, usbhs interrupt needs its value (HI/LOW) to decide
- * USB connection/disconnection (usbhsf_get_vbus()).
- * This means we needs to select GPIO_FN_IRQ7_PORT209 first,
- * and select GPIO_PORT209 here
- */
- gpio_request(GPIO_FN_IRQ7_PORT209, NULL);
- gpio_request(GPIO_PORT209, NULL);
- gpio_direction_input(GPIO_PORT209);
-
- platform_device_register(&usbhsf_device);
- usb = &usbhsf_device;
- }
-
- /* SDHI0 */
- gpio_request(GPIO_FN_SDHI0_CMD, NULL);
- gpio_request(GPIO_FN_SDHI0_CLK, NULL);
- gpio_request(GPIO_FN_SDHI0_D0, NULL);
- gpio_request(GPIO_FN_SDHI0_D1, NULL);
- gpio_request(GPIO_FN_SDHI0_D2, NULL);
- gpio_request(GPIO_FN_SDHI0_D3, NULL);
- gpio_request(GPIO_FN_SDHI0_WP, NULL);
-
- gpio_request(GPIO_PORT17, NULL); /* SDHI0_18/33_B */
- gpio_request(GPIO_PORT74, NULL); /* SDHI0_PON */
- gpio_request(GPIO_PORT75, NULL); /* SDSLOT1_PON */
- gpio_direction_output(GPIO_PORT17, 0);
- gpio_direction_output(GPIO_PORT74, 1);
- gpio_direction_output(GPIO_PORT75, 1);
-
- /* we can use GPIO_FN_IRQ31_PORT167 here for SDHI0 CD irq */
-
- /*
- * MMCIF
- *
- * Here doesn't care SW1.4 status,
- * since CON2 is not mounted.
- */
- gpio_request(GPIO_FN_MMC1_CLK_PORT103, NULL);
- gpio_request(GPIO_FN_MMC1_CMD_PORT104, NULL);
- gpio_request(GPIO_FN_MMC1_D0_PORT149, NULL);
- gpio_request(GPIO_FN_MMC1_D1_PORT148, NULL);
- gpio_request(GPIO_FN_MMC1_D2_PORT147, NULL);
- gpio_request(GPIO_FN_MMC1_D3_PORT146, NULL);
- gpio_request(GPIO_FN_MMC1_D4_PORT145, NULL);
- gpio_request(GPIO_FN_MMC1_D5_PORT144, NULL);
- gpio_request(GPIO_FN_MMC1_D6_PORT143, NULL);
- gpio_request(GPIO_FN_MMC1_D7_PORT142, NULL);
-
- /* CEU0 */
- gpio_request(GPIO_FN_VIO0_D7, NULL);
- gpio_request(GPIO_FN_VIO0_D6, NULL);
- gpio_request(GPIO_FN_VIO0_D5, NULL);
- gpio_request(GPIO_FN_VIO0_D4, NULL);
- gpio_request(GPIO_FN_VIO0_D3, NULL);
- gpio_request(GPIO_FN_VIO0_D2, NULL);
- gpio_request(GPIO_FN_VIO0_D1, NULL);
- gpio_request(GPIO_FN_VIO0_D0, NULL);
- gpio_request(GPIO_FN_VIO0_CLK, NULL);
- gpio_request(GPIO_FN_VIO0_HD, NULL);
- gpio_request(GPIO_FN_VIO0_VD, NULL);
- gpio_request(GPIO_FN_VIO0_FIELD, NULL);
- gpio_request(GPIO_FN_VIO_CKO, NULL);
-
- /* CON1/CON15 Camera */
- gpio_request(GPIO_PORT173, NULL); /* STANDBY */
- gpio_request(GPIO_PORT172, NULL); /* RST */
- gpio_request(GPIO_PORT158, NULL); /* CAM_PON */
- gpio_direction_output(GPIO_PORT173, 0);
- gpio_direction_output(GPIO_PORT172, 1);
- gpio_direction_output(GPIO_PORT158, 0); /* see mt9t111_power() */
-
- /* FSI-WM8978 */
- gpio_request(GPIO_FN_FSIAIBT, NULL);
- gpio_request(GPIO_FN_FSIAILR, NULL);
- gpio_request(GPIO_FN_FSIAOMC, NULL);
- gpio_request(GPIO_FN_FSIAOSLD, NULL);
- gpio_request(GPIO_FN_FSIAISLD_PORT5, NULL);
-
- gpio_request(GPIO_PORT7, NULL);
- gpio_request(GPIO_PORT8, NULL);
- gpio_direction_none(GPIO_PORT7CR); /* FSIAOBT needs no direction */
- gpio_direction_none(GPIO_PORT8CR); /* FSIAOLR needs no direction */
-
- /* FSI-HDMI */
- gpio_request(GPIO_FN_FSIBCK, NULL);
-
- /* HDMI */
- gpio_request(GPIO_FN_HDMI_HPD, NULL);
- gpio_request(GPIO_FN_HDMI_CEC, NULL);
-
- /*
- * CAUTION
- *
- * DBGMD/LCDC0/FSIA MUX
- * DBGMD_SELECT_B should be set after setting PFC Function.
- */
- gpio_request(GPIO_PORT176, NULL);
- gpio_direction_output(GPIO_PORT176, 1);
-
- /*
- * We can switch CON8/CON14 by SW1.5,
- * but it needs after DBGMD_SELECT_B
- */
- gpio_request(GPIO_PORT6, NULL);
- gpio_direction_input(GPIO_PORT6);
- if (gpio_get_value(GPIO_PORT6)) {
- /* CON14 enable */
- } else {
- /* CON8 (SDHI1) enable */
- gpio_request(GPIO_FN_SDHI1_CLK, NULL);
- gpio_request(GPIO_FN_SDHI1_CMD, NULL);
- gpio_request(GPIO_FN_SDHI1_D0, NULL);
- gpio_request(GPIO_FN_SDHI1_D1, NULL);
- gpio_request(GPIO_FN_SDHI1_D2, NULL);
- gpio_request(GPIO_FN_SDHI1_D3, NULL);
- gpio_request(GPIO_FN_SDHI1_CD, NULL);
- gpio_request(GPIO_FN_SDHI1_WP, NULL);
-
- gpio_request(GPIO_PORT16, NULL); /* SDSLOT2_PON */
- gpio_direction_output(GPIO_PORT16, 1);
-
- platform_device_register(&sdhi1_device);
- }
-
-
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 32K*8way */
l2x0_init(__io(0xf0002000), 0x40440000, 0x82000fff);
#endif
- i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
- i2c_register_board_info(2, i2c2_devices, ARRAY_SIZE(i2c2_devices));
-
- r8a7740_add_standard_devices();
-
- platform_add_devices(eva_devices,
- ARRAY_SIZE(eva_devices));
-
- eva_clock_init();
-
- rmobile_add_device_to_domain("A4LC", &lcdc0_device);
- rmobile_add_device_to_domain("A4LC", &hdmi_lcdc_device);
- if (usb)
- rmobile_add_device_to_domain("A3SP", usb);
-}
-
-static void __init eva_earlytimer_init(void)
-{
- r8a7740_clock_init(MD_CK0 | MD_CK2);
- shmobile_earlytimer_init();
-}
-
-static void __init eva_add_early_devices(void)
-{
- r8a7740_add_early_devices();
-
- /* override timer setup with board-specific code */
- shmobile_timer.init = eva_earlytimer_init;
+ r8a7740_add_standard_devices_dt();
}
static const char *eva_boards_compat_dt[] __initdata = {
@@ -1236,8 +78,9 @@ static const char *eva_boards_compat_dt[] __initdata = {
DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
.map_io = r8a7740_map_io,
- .init_early = eva_add_early_devices,
- .init_irq = r8a7740_init_irq,
+ .init_early = r8a7740_add_early_devices_dt,
+ .init_irq = r8a7740_init_irq_of,
+ .nr_irqs = NR_IRQS_LEGACY,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = eva_init,
.init_late = shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index 6729e00..747b29c 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -583,6 +583,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]),
CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh-eth", &mstp_clks[MSTP309]),
+ CLKDEV_DEV_ID("e9a00000.ethernet", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]),
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index f44a36b..0a3da2e 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -65,7 +65,9 @@ extern void r8a7740_init_irq_of(void);
extern void r8a7740_init_irq(void);
extern void r8a7740_map_io(void);
extern void r8a7740_add_early_devices(void);
+extern void r8a7740_add_early_devices_dt(void);
extern void r8a7740_add_standard_devices(void);
+extern void r8a7740_add_standard_devices_dt(void);
extern void r8a7740_clock_init(u8 md_ck);
extern void r8a7740_pinmux_init(void);
--
1.7.9.5
^ permalink raw reply related
* [PATCH 0/2] Preliminary Armadillo DT support
From: Bastian Hecht @ 2012-12-16 13:54 UTC (permalink / raw)
To: linux-sh
This is a minimal setup for DT booting Armadillo boards. It's based on Simon
Horman's reference implementation for the kz9mg board.
The only device added so far is the ethernet controller sh_eth. For this the
driver is enhanced to support DT-based probing in the 2nd patch.
Care should be taken as the lines
- /* armadillo 800 eva extal1 is 24MHz */
- clk_set_rate(xtal1, 24000000);
are removed and the r8a7740 code uses 25MHz by default. I'm unsure if just some clock
calculations get incorrect or if we overclock our board somewhere.
The patches are based on git://git.kernel.org/pub/scm/linux/kernel/git/horms/devel/of
revision 9fcbfcfd31c782840ebb57f283c174c749467434.
Bastian Hecht (2):
ARM: shmobile: Armadillo800eva: DT boot testcase with ethernet
support
net: sh_eth: Add Device Tree support
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 7 +
arch/arm/mach-shmobile/board-armadillo800eva.c | 1167 +-----------------------
arch/arm/mach-shmobile/clock-r8a7740.c | 1 +
arch/arm/mach-shmobile/include/mach/common.h | 2 +
drivers/net/ethernet/renesas/sh_eth.c | 72 +-
5 files changed, 86 insertions(+), 1163 deletions(-)
--
1.7.9.5
^ permalink raw reply
* Re: [PATCH 6/7] ARM: mackerel: support booting with or without DT
From: Simon Horman @ 2012-12-16 0:33 UTC (permalink / raw)
To: linux-arm-kernel
In-Reply-To: <Pine.LNX.4.64.1212151950360.7280@axis700.grange>
On Sat, Dec 15, 2012 at 08:02:39PM +0100, Guennadi Liakhovetski wrote:
> Hi Simon
>
> Thanks for your comments. I'll reply to other your reviews later, I think,
> let me just briefly clarify this one.
>
> On Sat, 15 Dec 2012, Simon Horman wrote:
>
> > On Fri, Dec 14, 2012 at 05:45:30PM +0100, Guennadi Liakhovetski wrote:
> > > This patch adds dynamic switching to booting either with or without DT.
> > > So far only a part of the board initialisation can be done via DT. Devices,
> > > that still need platform data are kept that way. Devices, that can be
> > > initialised from DT will not be supplied from the platform data, if a DT
> > > image is detected.
> >
> > Hi Guennadi,
> >
> > I'm not sure that I'm entirely comfortable with the implications
> > for users here.
> >
> > In the beginning there was no DT for Mackerel, all boots were non-DT,
> > and in general the board and its devices have been well supported.
> >
> > At the present time Mackerel only boots using DT, though almost all
> > the initialisation is done in C. Thus currently a DT boot fairly full
> > support for the board and its devices.
> >
> > If I understand things correctly, with this change, a DT boot becomes a
> > limited boot that basically only supports devices that can be initialised
> > using DT. And users are expected to go back to a non-DT boot if they want
> > fuller support. This seems undesirable.
>
> No, it's in a way the contrary. As you correctly point out after a recent
> change mackerel _must_ only be booted with DT, and, I think, this way an
> undesirable change. After this series of patches both becomes possible:
> booting with and without DT. And in both cases all devices are supported.
> If booting without DT, all devices are supported in the "legacy" way from
> the board file. If booting with DT _some_ devices, for which sufficient DT
> support already exist are initialised from the .dts file, others are still
> initialised from the .c. This way all devices are still supported. Note,
> however, that some devices don't have a complete DT support yet, e.g., you
> cannot specify card-detect GPIOs in .dts because of the lacking pincontrol
> / GPIO DT support. As soon as that is added, .dts will have to be
> extended respectively. Similarly, as more devices get DT support they can
> be added to the .dts and excluded from the DT boot by putting them under
>
> + if (!of_have_populated_dt()) {
>
> clauses. If we ever come to a point, that no-DT booting will not have to
> be supported any more, these clauses and respective devices can be easily
> removed from board-mackerel.c. (Continued below)
Thanks, sorry for misunderstanding things. In that case I think I am
comfortable with the direction of these changes.
> > The approach that I took with the kzm9g was to provide an alternate dts and
> > board file, and compatibility string. Clearly that is not an entirely
> > elegant solution. But it does avoid the problem that I describe above.
> >
> > >
> > > Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
> > > ---
> > > arch/arm/mach-shmobile/board-mackerel.c | 84 ++++++++++++++++++++++++-------
> > > 1 files changed, 66 insertions(+), 18 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
> > > index 39b8f2e..a6358c9 100644
> > > --- a/arch/arm/mach-shmobile/board-mackerel.c
> > > +++ b/arch/arm/mach-shmobile/board-mackerel.c
> > > @@ -1326,7 +1326,6 @@ static struct platform_device mackerel_camera = {
> > >
> > > static struct platform_device *mackerel_devices[] __initdata = {
> > > &nor_flash_device,
> > > - &smc911x_device,
> > > &lcdc_device,
> > > &usbhs0_device,
> > > &usbhs1_device,
> > > @@ -1335,17 +1334,21 @@ static struct platform_device *mackerel_devices[] __initdata = {
> > > &fsi_ak4643_device,
> > > &fsi_hdmi_device,
> > > &nand_flash_device,
> > > + &ceu_device,
> > > + &mackerel_camera,
> > > + &hdmi_device,
> > > + &hdmi_lcdc_device,
> > > + &meram_device,
> > > +};
> > > +
> > > +static struct platform_device *mackerel_devices_dt[] __initdata = {
> > > + &smc911x_device,
> > > &sdhi0_device,
> > > #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
> > > &sdhi1_device,
> > > #endif
> > > &sdhi2_device,
> > > &sh_mmcif_device,
> > > - &ceu_device,
> > > - &mackerel_camera,
> > > - &hdmi_device,
> > > - &hdmi_lcdc_device,
> > > - &meram_device,
> > > };
> > >
> > > /* Keypad Initialization */
> > > @@ -1404,6 +1407,24 @@ static struct i2c_board_info i2c1_devices[] = {
> > > },
> > > };
> > >
> > > +static int mackerel_i2c_bus_notify(struct notifier_block *nb,
> > > + unsigned long action, void *data)
> > > +{
> > > + struct device *dev = data;
> > > +
> > > + if (action != BUS_NOTIFY_ADD_DEVICE ||
> > > + strcmp(dev_name(dev->parent), "fff20000.i2c"))
> > > + return NOTIFY_DONE;
> > > +
> > > + i2c_new_device(to_i2c_adapter(dev), &i2c0_devices[1]);
> > > +
> > > + return NOTIFY_OK;
> > > +}
> > > +
> > > +static struct notifier_block mackerel_i2c_notifier = {
> > > + .notifier_call = mackerel_i2c_bus_notify,
> > > +};
> > > +
> > > #define GPIO_PORT9CR IOMEM(0xE6051009)
> > > #define GPIO_PORT10CR IOMEM(0xE605100A)
> > > #define GPIO_PORT167CR IOMEM(0xE60520A7)
> > > @@ -1420,22 +1441,26 @@ static void __init mackerel_init(void)
> >
> > I wonder if it would be cleaner to achieve this by providing
> > mackerel_init_dt().
>
> I thought about this, but initialisation is interleaved and in some cases
> order is important, so, you would need something like "early_dt(),"
> "mid_early_common()," "late_dt()" etc., which doesn't seem an improvement
> to me:-)
Understood. I guess it is case by case, and in this case the approach
you have taken does seem to make sense. Magnus, do you have any
thoughts on this?
> > > { "A3SP", &usbhs0_device, },
> > > { "A3SP", &usbhs1_device, },
> > > { "A3SP", &nand_flash_device, },
> > > + { "A4R", &ceu_device, },
> > > + };
> > > + struct pm_domain_device domain_devices_dt[] = {
> > > { "A3SP", &sh_mmcif_device, },
> > > { "A3SP", &sdhi0_device, },
> > > #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
> > > { "A3SP", &sdhi1_device, },
> > > #endif
> > > { "A3SP", &sdhi2_device, },
> > > - { "A4R", &ceu_device, },
> > > };
> > > u32 srcr4;
> > > struct clk *clk;
> > >
> > > - regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
> > > - ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
> > > - regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
> > > - ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
> > > - regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
> > > + if (!of_have_populated_dt()) {
> > > + regulator_register_always_on(0, "fixed-1.8V", fixed1v8_power_consumers,
> > > + ARRAY_SIZE(fixed1v8_power_consumers), 1800000);
> > > + regulator_register_always_on(1, "fixed-3.3V", fixed3v3_power_consumers,
> > > + ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
> > > + regulator_register_fixed(2, dummy_supplies, ARRAY_SIZE(dummy_supplies));
> > > + }
> > >
> > > /* External clock source */
> > > clk_set_rate(&sh7372_dv_clki_clk, 27000000);
> > > @@ -1633,22 +1658,35 @@ static void __init mackerel_init(void)
> > > udelay(50);
> > > __raw_writel(srcr4 & ~(1 << 13), SRCR4);
> > >
> > > - i2c_register_board_info(0, i2c0_devices,
> > > - ARRAY_SIZE(i2c0_devices));
> > > - i2c_register_board_info(1, i2c1_devices,
> > > - ARRAY_SIZE(i2c1_devices));
> > > + if (!of_have_populated_dt()) {
> > > + i2c_register_board_info(0, i2c0_devices,
> > > + ARRAY_SIZE(i2c0_devices));
> > > + i2c_register_board_info(1, i2c1_devices,
> > > + ARRAY_SIZE(i2c1_devices));
> > > + } else {
> > > + bus_register_notifier(&i2c_bus_type,
> > > + &mackerel_i2c_notifier);
> > > + }
> > >
> > > sh7372_add_standard_devices();
> > >
> > > platform_add_devices(mackerel_devices, ARRAY_SIZE(mackerel_devices));
> > > + if (!of_have_populated_dt())
> > > + platform_add_devices(mackerel_devices_dt,
> > > + ARRAY_SIZE(mackerel_devices_dt));
> > >
> > > rmobile_add_devices_to_domains(domain_devices,
> > > ARRAY_SIZE(domain_devices));
> > > + if (!of_have_populated_dt())
> > > + rmobile_add_devices_to_domains(domain_devices_dt,
> > > + ARRAY_SIZE(domain_devices_dt));
> > >
> > > hdmi_init_pm_clock();
> > > sh7372_pm_init();
> > > pm_clk_add(&fsi_device.dev, "spu2");
> > > pm_clk_add(&hdmi_lcdc_device.dev, "hdmi");
> > > +
> > > + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> > > }
> > >
> > > static const char *mackerel_boards_compat_dt[] __initdata = {
> > > @@ -1659,10 +1697,20 @@ static const char *mackerel_boards_compat_dt[] __initdata = {
> > > DT_MACHINE_START(MACKEREL_DT, "mackerel")
> > > .map_io = sh7372_map_io,
> > > .init_early = sh7372_add_early_devices,
> > > - .init_irq = sh7372_init_irq,
> > > + .init_irq = sh7372_init_irq_of,
> > > + .handle_irq = shmobile_handle_irq_intc,
> > > + .init_machine = mackerel_init,
> > > + .init_late = sh7372_pm_init_late,
> > > + .timer = &shmobile_timer,
> > > + .dt_compat = mackerel_boards_compat_dt,
> > > +MACHINE_END
> > > +
> > > +MACHINE_START(MACKEREL, "mackerel")
> > > + .map_io = sh7372_map_io,
> > > + .init_early = sh7372_add_early_devices,
> > > + .init_irq = sh7372_init_irq_of,
> >
> > Could sh7372_init_irq be used here ?
>
> Yes, it could. I'll reply to your other review separately, briefly, by
> using the conditional, that I proposed in my patch 3/7 we could make the
> non-dt version static and let everyone just use sh7372_init_irq_of. But
> this is just an idea, we can keep sh7372_init_irq() too if this is
> prefered.
That is my preference at this point.
> Thanks
> Guennadi
>
> > > .handle_irq = shmobile_handle_irq_intc,
> > > .init_machine = mackerel_init,
> > > .init_late = sh7372_pm_init_late,
> > > .timer = &shmobile_timer,
> > > - .dt_compat = mackerel_boards_compat_dt,
> > > MACHINE_END
> > > --
> > > 1.7.2.5
>
> ---
> Guennadi Liakhovetski, Ph.D.
> Freelance Open-Source Software Developer
> http://www.open-technology.de/
>
^ permalink raw reply
* [PATCH v3 81/81] sh-pfc: Move sh_pfc.h from include/linux/ to driver directory
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
The header file isn't used by arch code anymore. Make it private to the
driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
---
drivers/pinctrl/sh-pfc/core.c | 1 -
drivers/pinctrl/sh-pfc/core.h | 3 ++-
drivers/pinctrl/sh-pfc/gpio.c | 1 -
drivers/pinctrl/sh-pfc/pfc-r8a7740.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7203.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7264.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7269.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7372.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh73a0.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7720.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7722.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7723.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7724.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7734.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7757.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7785.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-sh7786.c | 3 ++-
drivers/pinctrl/sh-pfc/pfc-shx3.c | 3 ++-
drivers/pinctrl/sh-pfc/pinctrl.c | 1 -
{include/linux => drivers/pinctrl/sh-pfc}/sh_pfc.h | 0
21 files changed, 34 insertions(+), 20 deletions(-)
rename {include/linux => drivers/pinctrl/sh-pfc}/sh_pfc.h (100%)
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 33181f4..d323c24f 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -21,7 +21,6 @@
#include <linux/module.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_device.h>
-#include <linux/sh_pfc.h>
#include <linux/slab.h>
#include "core.h"
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
index 8040826..ba7c33c 100644
--- a/drivers/pinctrl/sh-pfc/core.h
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -11,9 +11,10 @@
#define __SH_PFC_CORE_H__
#include <linux/compiler.h>
-#include <linux/sh_pfc.h>
#include <linux/types.h>
+#include "sh_pfc.h"
+
struct sh_pfc_window {
phys_addr_t phys;
void __iomem *virt;
diff --git a/drivers/pinctrl/sh-pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 3cbdfea..a535075 100644
--- a/drivers/pinctrl/sh-pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -16,7 +16,6 @@
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pinctrl/consumer.h>
-#include <linux/sh_pfc.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index 0ab4cb6..214788c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -19,10 +19,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <mach/r8a7740.h>
#include <mach/irqs.h>
+#include "sh_pfc.h"
+
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
index 8147172..13feaa0 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
@@ -19,9 +19,10 @@
*/
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <mach/r8a7779.h>
+#include "sh_pfc.h"
+
#define CPU_32_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
index 62bd173..01b425d 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7203.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
@@ -10,9 +10,10 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7203.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
index 03d3f9c..2ba5639 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7264.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
@@ -10,9 +10,10 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7264.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
index dab04d4..b1b5d6d 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7269.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
@@ -11,9 +11,10 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7269.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
index a52fabe..d44e7f0 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7372.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -21,10 +21,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <mach/irqs.h>
#include <mach/sh7372.h>
+#include "sh_pfc.h"
+
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
index 8a0eee9..709008e 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -19,10 +19,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <mach/sh73a0.h>
#include <mach/irqs.h>
+#include "sh_pfc.h"
+
#define CPU_ALL_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
index 20d0577..10872ed 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7720.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
@@ -10,9 +10,10 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7720.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
index f58f009..2de0929 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7722.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
@@ -1,9 +1,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/gpio.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7722.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
index fa3d36b..609673d 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7723.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
@@ -10,9 +10,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7723.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
index 7ad72c2..233fbf7 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7724.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
@@ -15,9 +15,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7724.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
index cbb5f4c..23d76d2 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7734.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
@@ -10,9 +10,10 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7734.h>
+#include "sh_pfc.h"
+
#define CPU_32_PORT(fn, pfx, sfx) \
PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
index 6f707a0..5ed74cd 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7757.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
@@ -15,9 +15,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7757.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
index 23f2c31..3b1825d 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7785.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
@@ -10,9 +10,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7785.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
index e1453cf..1e18b58 100644
--- a/drivers/pinctrl/sh-pfc/pfc-sh7786.c
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
@@ -15,9 +15,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/sh7786.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
index bd54042..ccf6918 100644
--- a/drivers/pinctrl/sh-pfc/pfc-shx3.c
+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
@@ -9,9 +9,10 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/sh_pfc.h>
#include <cpu/shx3.h>
+#include "sh_pfc.h"
+
enum {
PINMUX_RESERVED = 0,
diff --git a/drivers/pinctrl/sh-pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index fdfe7be..11e0e13 100644
--- a/drivers/pinctrl/sh-pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -20,7 +20,6 @@
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
-#include <linux/sh_pfc.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
diff --git a/include/linux/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
similarity index 100%
rename from include/linux/sh_pfc.h
rename to drivers/pinctrl/sh-pfc/sh_pfc.h
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 80/81] sh-pfc: Remove pinmux_info definition
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
The pinmux_info alias to sh_pfc_soc_info isn't needed anymore, remove
it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Paul Mundt <lethal@linux-sh.org>
---
include/linux/sh_pfc.h | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/include/linux/sh_pfc.h b/include/linux/sh_pfc.h
index 9fd6228..13049c4 100644
--- a/include/linux/sh_pfc.h
+++ b/include/linux/sh_pfc.h
@@ -114,9 +114,6 @@ struct sh_pfc_soc_info {
unsigned long unlock_reg;
};
-/* XXX compat for now */
-#define pinmux_info sh_pfc_soc_info
-
enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
/* helper macro for port */
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 79/81] sh: Remove unused sh_pfc_register_info() function
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
All boards use sh_pfc_register() directly, remove the unused
sh_pfc_register_info() function.
Make the name argument to sh_pfc_register() mandatory as it's now
supplied by all callers.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/sh/include/asm/gpio.h | 2 +-
arch/sh/include/cpu-common/cpu/pfc.h | 4 ----
arch/sh/kernel/cpu/pfc.c | 13 +------------
3 files changed, 2 insertions(+), 17 deletions(-)
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 04f53d3..7dfe15e 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -20,7 +20,7 @@
#endif
#define ARCH_NR_GPIOS 512
-#include <linux/sh_pfc.h>
+#include <asm-generic/gpio.h>
#ifdef CONFIG_GPIOLIB
diff --git a/arch/sh/include/cpu-common/cpu/pfc.h b/arch/sh/include/cpu-common/cpu/pfc.h
index 40e8643..e538813 100644
--- a/arch/sh/include/cpu-common/cpu/pfc.h
+++ b/arch/sh/include/cpu-common/cpu/pfc.h
@@ -18,13 +18,9 @@
#include <linux/types.h>
-struct pinmux_info;
struct resource;
int sh_pfc_register(const char *name,
struct resource *resource, u32 num_resources);
-int sh_pfc_register_info(const char *name,
- struct resource *resource, u32 num_resources,
- struct pinmux_info *pdata);
#endif /* __ARCH_SH_CPU_PFC_H__ */
diff --git a/arch/sh/kernel/cpu/pfc.c b/arch/sh/kernel/cpu/pfc.c
index d045d75..d766564 100644
--- a/arch/sh/kernel/cpu/pfc.c
+++ b/arch/sh/kernel/cpu/pfc.c
@@ -19,26 +19,15 @@
#include <cpu/pfc.h>
static struct platform_device sh_pfc_device = {
- .name = "sh-pfc",
.id = -1,
};
int __init sh_pfc_register(const char *name,
struct resource *resource, u32 num_resources)
{
- if (name)
- sh_pfc_device.name = name;
+ sh_pfc_device.name = name;
sh_pfc_device.num_resources = num_resources;
sh_pfc_device.resource = resource;
return platform_device_register(&sh_pfc_device);
}
-
-int __init sh_pfc_register_info(const char *name,
- struct resource *resource, u32 num_resources,
- struct pinmux_info *pdata)
-{
- sh_pfc_device.dev.platform_data = pdata;
-
- return sh_pfc_register(name, resource, num_resources);
-}
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 78/81] sh: shx3: pinmux: Use driver-provided pinmux info
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
Pinmux info for the sh machines is now provided by pinmux drivers.
Remove the duplicate copy in arch code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/sh/kernel/cpu/sh4a/pinmux-shx3.c | 572 +--------------------------------
1 files changed, 1 insertions(+), 571 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c b/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c
index eef1b8f..ace84ac 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-shx3.c
@@ -9,580 +9,10 @@
*/
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/gpio.h>
#include <cpu/pfc.h>
-#include <cpu/shx3.h>
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
- PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
- PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
- PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
- PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
- PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
- PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
-
- PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- PA7_IN, PA6_IN, PA5_IN, PA4_IN,
- PA3_IN, PA2_IN, PA1_IN, PA0_IN,
- PB7_IN, PB6_IN, PB5_IN, PB4_IN,
- PB3_IN, PB2_IN, PB1_IN, PB0_IN,
- PC7_IN, PC6_IN, PC5_IN, PC4_IN,
- PC3_IN, PC2_IN, PC1_IN, PC0_IN,
- PD7_IN, PD6_IN, PD5_IN, PD4_IN,
- PD3_IN, PD2_IN, PD1_IN, PD0_IN,
- PE7_IN, PE6_IN, PE5_IN, PE4_IN,
- PE3_IN, PE2_IN, PE1_IN, PE0_IN,
- PF7_IN, PF6_IN, PF5_IN, PF4_IN,
- PF3_IN, PF2_IN, PF1_IN, PF0_IN,
- PG7_IN, PG6_IN, PG5_IN, PG4_IN,
- PG3_IN, PG2_IN, PG1_IN, PG0_IN,
-
- PH5_IN, PH4_IN,
- PH3_IN, PH2_IN, PH1_IN, PH0_IN,
- PINMUX_INPUT_END,
-
- PINMUX_INPUT_PULLUP_BEGIN,
- PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
- PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
- PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
- PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
- PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
- PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
- PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
- PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
- PE7_IN_PU, PE6_IN_PU, PE5_IN_PU, PE4_IN_PU,
- PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
- PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
- PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
- PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
- PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
-
- PH5_IN_PU, PH4_IN_PU,
- PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
- PINMUX_INPUT_PULLUP_END,
-
- PINMUX_OUTPUT_BEGIN,
- PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
- PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
- PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
- PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
- PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
- PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
- PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
- PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
- PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
- PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
- PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
- PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
- PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
- PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
-
- PH5_OUT, PH4_OUT,
- PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PA7_FN, PA6_FN, PA5_FN, PA4_FN,
- PA3_FN, PA2_FN, PA1_FN, PA0_FN,
- PB7_FN, PB6_FN, PB5_FN, PB4_FN,
- PB3_FN, PB2_FN, PB1_FN, PB0_FN,
- PC7_FN, PC6_FN, PC5_FN, PC4_FN,
- PC3_FN, PC2_FN, PC1_FN, PC0_FN,
- PD7_FN, PD6_FN, PD5_FN, PD4_FN,
- PD3_FN, PD2_FN, PD1_FN, PD0_FN,
- PE7_FN, PE6_FN, PE5_FN, PE4_FN,
- PE3_FN, PE2_FN, PE1_FN, PE0_FN,
- PF7_FN, PF6_FN, PF5_FN, PF4_FN,
- PF3_FN, PF2_FN, PF1_FN, PF0_FN,
- PG7_FN, PG6_FN, PG5_FN, PG4_FN,
- PG3_FN, PG2_FN, PG1_FN, PG0_FN,
-
- PH5_FN, PH4_FN,
- PH3_FN, PH2_FN, PH1_FN, PH0_FN,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
-
- D31_MARK, D30_MARK, D29_MARK, D28_MARK, D27_MARK, D26_MARK,
- D25_MARK, D24_MARK, D23_MARK, D22_MARK, D21_MARK, D20_MARK,
- D19_MARK, D18_MARK, D17_MARK, D16_MARK,
-
- BACK_MARK, BREQ_MARK,
- WE3_MARK, WE2_MARK,
- CS6_MARK, CS5_MARK, CS4_MARK,
- CLKOUTENB_MARK,
-
- DACK3_MARK, DACK2_MARK, DACK1_MARK, DACK0_MARK,
- DREQ3_MARK, DREQ2_MARK, DREQ1_MARK, DREQ0_MARK,
-
- IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
-
- DRAK3_MARK, DRAK2_MARK, DRAK1_MARK, DRAK0_MARK,
-
- SCK3_MARK, SCK2_MARK, SCK1_MARK, SCK0_MARK,
- IRL3_MARK, IRL2_MARK, IRL1_MARK, IRL0_MARK,
- TXD3_MARK, TXD2_MARK, TXD1_MARK, TXD0_MARK,
- RXD3_MARK, RXD2_MARK, RXD1_MARK, RXD0_MARK,
-
- CE2B_MARK, CE2A_MARK, IOIS16_MARK,
- STATUS1_MARK, STATUS0_MARK,
-
- IRQOUT_MARK,
-
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t shx3_pinmux_data[] = {
-
- /* PA GPIO */
- PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
- PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
- PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
- PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
- PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
- PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
- PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
- PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
-
- /* PB GPIO */
- PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
- PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
- PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
- PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
- PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
- PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
- PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
- PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
-
- /* PC GPIO */
- PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
- PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
- PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
- PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
- PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
- PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
- PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
- PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
-
- /* PD GPIO */
- PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
- PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
- PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
- PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
- PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
- PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
- PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
- PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
-
- /* PE GPIO */
- PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
- PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
- PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
- PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
- PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
- PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
- PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
- PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
-
- /* PF GPIO */
- PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
- PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
- PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
- PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
- PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
- PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
- PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
- PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
-
- /* PG GPIO */
- PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
- PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
- PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
- PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
- PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
- PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
- PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
- PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
-
- /* PH GPIO */
- PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
- PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
- PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
- PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
- PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
- PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
-
- /* PA FN */
- PINMUX_DATA(D31_MARK, PA7_FN),
- PINMUX_DATA(D30_MARK, PA6_FN),
- PINMUX_DATA(D29_MARK, PA5_FN),
- PINMUX_DATA(D28_MARK, PA4_FN),
- PINMUX_DATA(D27_MARK, PA3_FN),
- PINMUX_DATA(D26_MARK, PA2_FN),
- PINMUX_DATA(D25_MARK, PA1_FN),
- PINMUX_DATA(D24_MARK, PA0_FN),
-
- /* PB FN */
- PINMUX_DATA(D23_MARK, PB7_FN),
- PINMUX_DATA(D22_MARK, PB6_FN),
- PINMUX_DATA(D21_MARK, PB5_FN),
- PINMUX_DATA(D20_MARK, PB4_FN),
- PINMUX_DATA(D19_MARK, PB3_FN),
- PINMUX_DATA(D18_MARK, PB2_FN),
- PINMUX_DATA(D17_MARK, PB1_FN),
- PINMUX_DATA(D16_MARK, PB0_FN),
-
- /* PC FN */
- PINMUX_DATA(BACK_MARK, PC7_FN),
- PINMUX_DATA(BREQ_MARK, PC6_FN),
- PINMUX_DATA(WE3_MARK, PC5_FN),
- PINMUX_DATA(WE2_MARK, PC4_FN),
- PINMUX_DATA(CS6_MARK, PC3_FN),
- PINMUX_DATA(CS5_MARK, PC2_FN),
- PINMUX_DATA(CS4_MARK, PC1_FN),
- PINMUX_DATA(CLKOUTENB_MARK, PC0_FN),
-
- /* PD FN */
- PINMUX_DATA(DACK3_MARK, PD7_FN),
- PINMUX_DATA(DACK2_MARK, PD6_FN),
- PINMUX_DATA(DACK1_MARK, PD5_FN),
- PINMUX_DATA(DACK0_MARK, PD4_FN),
- PINMUX_DATA(DREQ3_MARK, PD3_FN),
- PINMUX_DATA(DREQ2_MARK, PD2_FN),
- PINMUX_DATA(DREQ1_MARK, PD1_FN),
- PINMUX_DATA(DREQ0_MARK, PD0_FN),
-
- /* PE FN */
- PINMUX_DATA(IRQ3_MARK, PE7_FN),
- PINMUX_DATA(IRQ2_MARK, PE6_FN),
- PINMUX_DATA(IRQ1_MARK, PE5_FN),
- PINMUX_DATA(IRQ0_MARK, PE4_FN),
- PINMUX_DATA(DRAK3_MARK, PE3_FN),
- PINMUX_DATA(DRAK2_MARK, PE2_FN),
- PINMUX_DATA(DRAK1_MARK, PE1_FN),
- PINMUX_DATA(DRAK0_MARK, PE0_FN),
-
- /* PF FN */
- PINMUX_DATA(SCK3_MARK, PF7_FN),
- PINMUX_DATA(SCK2_MARK, PF6_FN),
- PINMUX_DATA(SCK1_MARK, PF5_FN),
- PINMUX_DATA(SCK0_MARK, PF4_FN),
- PINMUX_DATA(IRL3_MARK, PF3_FN),
- PINMUX_DATA(IRL2_MARK, PF2_FN),
- PINMUX_DATA(IRL1_MARK, PF1_FN),
- PINMUX_DATA(IRL0_MARK, PF0_FN),
-
- /* PG FN */
- PINMUX_DATA(TXD3_MARK, PG7_FN),
- PINMUX_DATA(TXD2_MARK, PG6_FN),
- PINMUX_DATA(TXD1_MARK, PG5_FN),
- PINMUX_DATA(TXD0_MARK, PG4_FN),
- PINMUX_DATA(RXD3_MARK, PG3_FN),
- PINMUX_DATA(RXD2_MARK, PG2_FN),
- PINMUX_DATA(RXD1_MARK, PG1_FN),
- PINMUX_DATA(RXD0_MARK, PG0_FN),
-
- /* PH FN */
- PINMUX_DATA(CE2B_MARK, PH5_FN),
- PINMUX_DATA(CE2A_MARK, PH4_FN),
- PINMUX_DATA(IOIS16_MARK, PH3_FN),
- PINMUX_DATA(STATUS1_MARK, PH2_FN),
- PINMUX_DATA(STATUS0_MARK, PH1_FN),
- PINMUX_DATA(IRQOUT_MARK, PH0_FN),
-};
-
-static struct pinmux_gpio shx3_pinmux_gpios[] = {
- /* PA */
- PINMUX_GPIO(GPIO_PA7, PA7_DATA),
- PINMUX_GPIO(GPIO_PA6, PA6_DATA),
- PINMUX_GPIO(GPIO_PA5, PA5_DATA),
- PINMUX_GPIO(GPIO_PA4, PA4_DATA),
- PINMUX_GPIO(GPIO_PA3, PA3_DATA),
- PINMUX_GPIO(GPIO_PA2, PA2_DATA),
- PINMUX_GPIO(GPIO_PA1, PA1_DATA),
- PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-
- /* PB */
- PINMUX_GPIO(GPIO_PB7, PB7_DATA),
- PINMUX_GPIO(GPIO_PB6, PB6_DATA),
- PINMUX_GPIO(GPIO_PB5, PB5_DATA),
- PINMUX_GPIO(GPIO_PB4, PB4_DATA),
- PINMUX_GPIO(GPIO_PB3, PB3_DATA),
- PINMUX_GPIO(GPIO_PB2, PB2_DATA),
- PINMUX_GPIO(GPIO_PB1, PB1_DATA),
- PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-
- /* PC */
- PINMUX_GPIO(GPIO_PC7, PC7_DATA),
- PINMUX_GPIO(GPIO_PC6, PC6_DATA),
- PINMUX_GPIO(GPIO_PC5, PC5_DATA),
- PINMUX_GPIO(GPIO_PC4, PC4_DATA),
- PINMUX_GPIO(GPIO_PC3, PC3_DATA),
- PINMUX_GPIO(GPIO_PC2, PC2_DATA),
- PINMUX_GPIO(GPIO_PC1, PC1_DATA),
- PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-
- /* PD */
- PINMUX_GPIO(GPIO_PD7, PD7_DATA),
- PINMUX_GPIO(GPIO_PD6, PD6_DATA),
- PINMUX_GPIO(GPIO_PD5, PD5_DATA),
- PINMUX_GPIO(GPIO_PD4, PD4_DATA),
- PINMUX_GPIO(GPIO_PD3, PD3_DATA),
- PINMUX_GPIO(GPIO_PD2, PD2_DATA),
- PINMUX_GPIO(GPIO_PD1, PD1_DATA),
- PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-
- /* PE */
- PINMUX_GPIO(GPIO_PE7, PE7_DATA),
- PINMUX_GPIO(GPIO_PE6, PE6_DATA),
- PINMUX_GPIO(GPIO_PE5, PE5_DATA),
- PINMUX_GPIO(GPIO_PE4, PE4_DATA),
- PINMUX_GPIO(GPIO_PE3, PE3_DATA),
- PINMUX_GPIO(GPIO_PE2, PE2_DATA),
- PINMUX_GPIO(GPIO_PE1, PE1_DATA),
- PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-
- /* PF */
- PINMUX_GPIO(GPIO_PF7, PF7_DATA),
- PINMUX_GPIO(GPIO_PF6, PF6_DATA),
- PINMUX_GPIO(GPIO_PF5, PF5_DATA),
- PINMUX_GPIO(GPIO_PF4, PF4_DATA),
- PINMUX_GPIO(GPIO_PF3, PF3_DATA),
- PINMUX_GPIO(GPIO_PF2, PF2_DATA),
- PINMUX_GPIO(GPIO_PF1, PF1_DATA),
- PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-
- /* PG */
- PINMUX_GPIO(GPIO_PG7, PG7_DATA),
- PINMUX_GPIO(GPIO_PG6, PG6_DATA),
- PINMUX_GPIO(GPIO_PG5, PG5_DATA),
- PINMUX_GPIO(GPIO_PG4, PG4_DATA),
- PINMUX_GPIO(GPIO_PG3, PG3_DATA),
- PINMUX_GPIO(GPIO_PG2, PG2_DATA),
- PINMUX_GPIO(GPIO_PG1, PG1_DATA),
- PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-
- /* PH */
- PINMUX_GPIO(GPIO_PH5, PH5_DATA),
- PINMUX_GPIO(GPIO_PH4, PH4_DATA),
- PINMUX_GPIO(GPIO_PH3, PH3_DATA),
- PINMUX_GPIO(GPIO_PH2, PH2_DATA),
- PINMUX_GPIO(GPIO_PH1, PH1_DATA),
- PINMUX_GPIO(GPIO_PH0, PH0_DATA),
-
- /* FN */
- PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
- PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
- PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
- PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
- PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
- PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
- PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
- PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
- PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
- PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
- PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
- PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
- PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
- PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
- PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
- PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
- PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
- PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
- PINMUX_GPIO(GPIO_FN_WE3, WE3_MARK),
- PINMUX_GPIO(GPIO_FN_WE2, WE2_MARK),
- PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
- PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
- PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
- PINMUX_GPIO(GPIO_FN_CLKOUTENB, CLKOUTENB_MARK),
- PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
- PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
- PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
- PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK),
- PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
- PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
- PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
- PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
- PINMUX_GPIO(GPIO_FN_IRL3, IRL3_MARK),
- PINMUX_GPIO(GPIO_FN_IRL2, IRL2_MARK),
- PINMUX_GPIO(GPIO_FN_IRL1, IRL1_MARK),
- PINMUX_GPIO(GPIO_FN_IRL0, IRL0_MARK),
- PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
- PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
- PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
- PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
- PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
- PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
- PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
- PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
- PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
- PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
- PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
- PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
- PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
- PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
-};
-
-static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
- { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) {
- PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
- PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
- PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
- PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
- PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
- PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
- PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
- PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU,
- PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
- PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
- PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
- PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
- PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
- PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
- PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
- PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU, },
- },
- { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2) {
- PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
- PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
- PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
- PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
- PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
- PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
- PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
- PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU,
- PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
- PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
- PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
- PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
- PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
- PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
- PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
- PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU, },
- },
- { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2) {
- PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
- PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
- PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
- PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
- PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
- PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
- PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
- PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU,
- PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
- PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
- PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
- PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
- PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
- PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
- PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
- PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU, },
- },
- { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2) {
- PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
- PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
- PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
- PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
- PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
- PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
- PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
- PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
- PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
- PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
- PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
- PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
- PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU, },
- },
- { },
-};
-
-static struct pinmux_data_reg shx3_pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PABDR", 0xffc70010, 32) {
- 0, 0, 0, 0, 0, 0, 0, 0,
- PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
- 0, 0, 0, 0, 0, 0, 0, 0,
- PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, },
- },
- { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32) {
- 0, 0, 0, 0, 0, 0, 0, 0,
- PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
- 0, 0, 0, 0, 0, 0, 0, 0,
- PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, },
- },
- { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32) {
- 0, 0, 0, 0, 0, 0, 0, 0,
- PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
- 0, 0, 0, 0, 0, 0, 0, 0,
- PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, },
- },
- { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32) {
- 0, 0, 0, 0, 0, 0, 0, 0,
- PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, },
- },
- { },
-};
-
-static struct pinmux_info shx3_pinmux_info = {
- .name = "shx3_pfc",
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN,
- PINMUX_INPUT_PULLUP_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_STATUS0,
- .gpios = shx3_pinmux_gpios,
- .gpio_data = shx3_pinmux_data,
- .gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
- .cfg_regs = shx3_pinmux_config_regs,
- .data_regs = shx3_pinmux_data_regs,
-};
static int __init shx3_pinmux_setup(void)
{
- return sh_pfc_register_info(NULL, NULL, 0, &shx3_pinmux_info);
+ return sh_pfc_register("pfc-shx3", NULL, 0);
}
arch_initcall(shx3_pinmux_setup);
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 77/81] sh: sh7786: pinmux: Use driver-provided pinmux info
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
Pinmux info for the sh machines is now provided by pinmux drivers.
Remove the duplicate copy in arch code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c | 821 +------------------------------
1 files changed, 1 insertions(+), 820 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
index be876b0..3061778 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
@@ -15,830 +15,11 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/gpio.h>
#include <cpu/pfc.h>
-#include <cpu/sh7786.h>
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
- PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
- PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
- PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
- PE7_DATA, PE6_DATA,
- PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
- PG7_DATA, PG6_DATA, PG5_DATA,
- PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
- PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA,
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- PA7_IN, PA6_IN, PA5_IN, PA4_IN,
- PA3_IN, PA2_IN, PA1_IN, PA0_IN,
- PB7_IN, PB6_IN, PB5_IN, PB4_IN,
- PB3_IN, PB2_IN, PB1_IN, PB0_IN,
- PC7_IN, PC6_IN, PC5_IN, PC4_IN,
- PC3_IN, PC2_IN, PC1_IN, PC0_IN,
- PD7_IN, PD6_IN, PD5_IN, PD4_IN,
- PD3_IN, PD2_IN, PD1_IN, PD0_IN,
- PE7_IN, PE6_IN,
- PF7_IN, PF6_IN, PF5_IN, PF4_IN,
- PF3_IN, PF2_IN, PF1_IN, PF0_IN,
- PG7_IN, PG6_IN, PG5_IN,
- PH7_IN, PH6_IN, PH5_IN, PH4_IN,
- PH3_IN, PH2_IN, PH1_IN, PH0_IN,
- PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
- PJ3_IN, PJ2_IN, PJ1_IN,
- PINMUX_INPUT_END,
-
- PINMUX_INPUT_PULLUP_BEGIN,
- PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
- PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
- PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
- PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
- PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
- PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
- PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
- PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
- PE7_IN_PU, PE6_IN_PU,
- PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
- PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
- PG7_IN_PU, PG6_IN_PU, PG5_IN_PU,
- PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
- PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
- PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
- PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU,
- PINMUX_INPUT_PULLUP_END,
-
- PINMUX_OUTPUT_BEGIN,
- PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
- PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
- PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
- PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
- PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
- PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
- PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
- PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
- PE7_OUT, PE6_OUT,
- PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
- PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
- PG7_OUT, PG6_OUT, PG5_OUT,
- PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
- PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
- PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
- PJ3_OUT, PJ2_OUT, PJ1_OUT,
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PA7_FN, PA6_FN, PA5_FN, PA4_FN,
- PA3_FN, PA2_FN, PA1_FN, PA0_FN,
- PB7_FN, PB6_FN, PB5_FN, PB4_FN,
- PB3_FN, PB2_FN, PB1_FN, PB0_FN,
- PC7_FN, PC6_FN, PC5_FN, PC4_FN,
- PC3_FN, PC2_FN, PC1_FN, PC0_FN,
- PD7_FN, PD6_FN, PD5_FN, PD4_FN,
- PD3_FN, PD2_FN, PD1_FN, PD0_FN,
- PE7_FN, PE6_FN,
- PF7_FN, PF6_FN, PF5_FN, PF4_FN,
- PF3_FN, PF2_FN, PF1_FN, PF0_FN,
- PG7_FN, PG6_FN, PG5_FN,
- PH7_FN, PH6_FN, PH5_FN, PH4_FN,
- PH3_FN, PH2_FN, PH1_FN, PH0_FN,
- PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
- PJ3_FN, PJ2_FN, PJ1_FN,
- P1MSEL14_0, P1MSEL14_1,
- P1MSEL13_0, P1MSEL13_1,
- P1MSEL12_0, P1MSEL12_1,
- P1MSEL11_0, P1MSEL11_1,
- P1MSEL10_0, P1MSEL10_1,
- P1MSEL9_0, P1MSEL9_1,
- P1MSEL8_0, P1MSEL8_1,
- P1MSEL7_0, P1MSEL7_1,
- P1MSEL6_0, P1MSEL6_1,
- P1MSEL5_0, P1MSEL5_1,
- P1MSEL4_0, P1MSEL4_1,
- P1MSEL3_0, P1MSEL3_1,
- P1MSEL2_0, P1MSEL2_1,
- P1MSEL1_0, P1MSEL1_1,
- P1MSEL0_0, P1MSEL0_1,
-
- P2MSEL15_0, P2MSEL15_1,
- P2MSEL14_0, P2MSEL14_1,
- P2MSEL13_0, P2MSEL13_1,
- P2MSEL12_0, P2MSEL12_1,
- P2MSEL11_0, P2MSEL11_1,
- P2MSEL10_0, P2MSEL10_1,
- P2MSEL9_0, P2MSEL9_1,
- P2MSEL8_0, P2MSEL8_1,
- P2MSEL7_0, P2MSEL7_1,
- P2MSEL6_0, P2MSEL6_1,
- P2MSEL5_0, P2MSEL5_1,
- P2MSEL4_0, P2MSEL4_1,
- P2MSEL3_0, P2MSEL3_1,
- P2MSEL2_0, P2MSEL2_1,
- P2MSEL1_0, P2MSEL1_1,
- P2MSEL0_0, P2MSEL0_1,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
- VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
- DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
- DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
- DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
- ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
- ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
- ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
- ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
- ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK,
- HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK,
- SCIF0_CTS_MARK, SCIF0_RTS_MARK,
- SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK,
- SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK,
- SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK,
- SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK,
- SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK,
- BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK,
- FALE_MARK, FRB_MARK, FSTATUS_MARK,
- FSE_MARK, FCLE_MARK,
- DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK,
- DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK,
- DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK,
- USB_OVC1_MARK, USB_OVC0_MARK,
- USB_PENC1_MARK, USB_PENC0_MARK,
- HAC_RES_MARK,
- HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK,
- HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK,
- SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK,
- SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
- SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
- SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
- SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
- SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
- SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
- SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
- TCLK_MARK,
- IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
-
- /* PA GPIO */
- PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
- PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
- PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
- PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
- PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
- PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
- PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
- PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
-
- /* PB GPIO */
- PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
- PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
- PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
- PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
- PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
- PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
- PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
- PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
-
- /* PC GPIO */
- PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
- PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
- PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
- PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
- PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
- PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
- PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
- PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
-
- /* PD GPIO */
- PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
- PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
- PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
- PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
- PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
- PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
- PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
- PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
-
- /* PE GPIO */
- PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
- PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
-
- /* PF GPIO */
- PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
- PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
- PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
- PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
- PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
- PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
- PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
- PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
-
- /* PG GPIO */
- PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
- PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
- PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
-
- /* PH GPIO */
- PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
- PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
- PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
- PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
- PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
- PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
- PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
- PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
-
- /* PJ GPIO */
- PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
- PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
- PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
- PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
- PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
- PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
- PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
-
- /* PA FN */
- PINMUX_DATA(CDE_MARK, P1MSEL2_0, PA7_FN),
- PINMUX_DATA(DISP_MARK, P1MSEL2_0, PA6_FN),
- PINMUX_DATA(DR5_MARK, P1MSEL2_0, PA5_FN),
- PINMUX_DATA(DR4_MARK, P1MSEL2_0, PA4_FN),
- PINMUX_DATA(DR3_MARK, P1MSEL2_0, PA3_FN),
- PINMUX_DATA(DR2_MARK, P1MSEL2_0, PA2_FN),
- PINMUX_DATA(DR1_MARK, P1MSEL2_0, PA1_FN),
- PINMUX_DATA(DR0_MARK, P1MSEL2_0, PA0_FN),
- PINMUX_DATA(ETH_MAGIC_MARK, P1MSEL2_1, PA7_FN),
- PINMUX_DATA(ETH_LINK_MARK, P1MSEL2_1, PA6_FN),
- PINMUX_DATA(ETH_TX_ER_MARK, P1MSEL2_1, PA5_FN),
- PINMUX_DATA(ETH_TX_EN_MARK, P1MSEL2_1, PA4_FN),
- PINMUX_DATA(ETH_TXD3_MARK, P1MSEL2_1, PA3_FN),
- PINMUX_DATA(ETH_TXD2_MARK, P1MSEL2_1, PA2_FN),
- PINMUX_DATA(ETH_TXD1_MARK, P1MSEL2_1, PA1_FN),
- PINMUX_DATA(ETH_TXD0_MARK, P1MSEL2_1, PA0_FN),
-
- /* PB FN */
- PINMUX_DATA(VSYNC_MARK, P1MSEL3_0, PB7_FN),
- PINMUX_DATA(ODDF_MARK, P1MSEL3_0, PB6_FN),
- PINMUX_DATA(DG5_MARK, P1MSEL2_0, PB5_FN),
- PINMUX_DATA(DG4_MARK, P1MSEL2_0, PB4_FN),
- PINMUX_DATA(DG3_MARK, P1MSEL2_0, PB3_FN),
- PINMUX_DATA(DG2_MARK, P1MSEL2_0, PB2_FN),
- PINMUX_DATA(DG1_MARK, P1MSEL2_0, PB1_FN),
- PINMUX_DATA(DG0_MARK, P1MSEL2_0, PB0_FN),
- PINMUX_DATA(HSPI_CLK_MARK, P1MSEL3_1, PB7_FN),
- PINMUX_DATA(HSPI_CS_MARK, P1MSEL3_1, PB6_FN),
- PINMUX_DATA(ETH_MDIO_MARK, P1MSEL2_1, PB5_FN),
- PINMUX_DATA(ETH_RX_CLK_MARK, P1MSEL2_1, PB4_FN),
- PINMUX_DATA(ETH_MDC_MARK, P1MSEL2_1, PB3_FN),
- PINMUX_DATA(ETH_COL_MARK, P1MSEL2_1, PB2_FN),
- PINMUX_DATA(ETH_TX_CLK_MARK, P1MSEL2_1, PB1_FN),
- PINMUX_DATA(ETH_CRS_MARK, P1MSEL2_1, PB0_FN),
-
- /* PC FN */
- PINMUX_DATA(DCLKIN_MARK, P1MSEL3_0, PC7_FN),
- PINMUX_DATA(HSYNC_MARK, P1MSEL3_0, PC6_FN),
- PINMUX_DATA(DB5_MARK, P1MSEL2_0, PC5_FN),
- PINMUX_DATA(DB4_MARK, P1MSEL2_0, PC4_FN),
- PINMUX_DATA(DB3_MARK, P1MSEL2_0, PC3_FN),
- PINMUX_DATA(DB2_MARK, P1MSEL2_0, PC2_FN),
- PINMUX_DATA(DB1_MARK, P1MSEL2_0, PC1_FN),
- PINMUX_DATA(DB0_MARK, P1MSEL2_0, PC0_FN),
-
- PINMUX_DATA(HSPI_RX_MARK, P1MSEL3_1, PC7_FN),
- PINMUX_DATA(HSPI_TX_MARK, P1MSEL3_1, PC6_FN),
- PINMUX_DATA(ETH_RXD3_MARK, P1MSEL2_1, PC5_FN),
- PINMUX_DATA(ETH_RXD2_MARK, P1MSEL2_1, PC4_FN),
- PINMUX_DATA(ETH_RXD1_MARK, P1MSEL2_1, PC3_FN),
- PINMUX_DATA(ETH_RXD0_MARK, P1MSEL2_1, PC2_FN),
- PINMUX_DATA(ETH_RX_DV_MARK, P1MSEL2_1, PC1_FN),
- PINMUX_DATA(ETH_RX_ER_MARK, P1MSEL2_1, PC0_FN),
-
- /* PD FN */
- PINMUX_DATA(DCLKOUT_MARK, PD7_FN),
- PINMUX_DATA(SCIF1_SCK_MARK, PD6_FN),
- PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN),
- PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN),
- PINMUX_DATA(DACK1_MARK, P1MSEL13_1, P1MSEL12_0, PD3_FN),
- PINMUX_DATA(BACK_MARK, P1MSEL13_0, P1MSEL12_1, PD3_FN),
- PINMUX_DATA(FALE_MARK, P1MSEL13_0, P1MSEL12_0, PD3_FN),
- PINMUX_DATA(DACK0_MARK, P1MSEL14_1, PD2_FN),
- PINMUX_DATA(FCLE_MARK, P1MSEL14_0, PD2_FN),
- PINMUX_DATA(DREQ1_MARK, P1MSEL10_0, P1MSEL9_1, PD1_FN),
- PINMUX_DATA(BREQ_MARK, P1MSEL10_1, P1MSEL9_0, PD1_FN),
- PINMUX_DATA(USB_OVC1_MARK, P1MSEL10_0, P1MSEL9_0, PD1_FN),
- PINMUX_DATA(DREQ0_MARK, P1MSEL11_1, PD0_FN),
- PINMUX_DATA(USB_OVC0_MARK, P1MSEL11_0, PD0_FN),
-
- /* PE FN */
- PINMUX_DATA(USB_PENC1_MARK, PE7_FN),
- PINMUX_DATA(USB_PENC0_MARK, PE6_FN),
-
- /* PF FN */
- PINMUX_DATA(HAC1_SDOUT_MARK, P2MSEL15_0, P2MSEL14_0, PF7_FN),
- PINMUX_DATA(HAC1_SDIN_MARK, P2MSEL15_0, P2MSEL14_0, PF6_FN),
- PINMUX_DATA(HAC1_SYNC_MARK, P2MSEL15_0, P2MSEL14_0, PF5_FN),
- PINMUX_DATA(HAC1_BITCLK_MARK, P2MSEL15_0, P2MSEL14_0, PF4_FN),
- PINMUX_DATA(HAC0_SDOUT_MARK, P2MSEL13_0, P2MSEL12_0, PF3_FN),
- PINMUX_DATA(HAC0_SDIN_MARK, P2MSEL13_0, P2MSEL12_0, PF2_FN),
- PINMUX_DATA(HAC0_SYNC_MARK, P2MSEL13_0, P2MSEL12_0, PF1_FN),
- PINMUX_DATA(HAC0_BITCLK_MARK, P2MSEL13_0, P2MSEL12_0, PF0_FN),
- PINMUX_DATA(SSI1_SDATA_MARK, P2MSEL15_0, P2MSEL14_1, PF7_FN),
- PINMUX_DATA(SSI1_SCK_MARK, P2MSEL15_0, P2MSEL14_1, PF6_FN),
- PINMUX_DATA(SSI1_WS_MARK, P2MSEL15_0, P2MSEL14_1, PF5_FN),
- PINMUX_DATA(SSI1_CLK_MARK, P2MSEL15_0, P2MSEL14_1, PF4_FN),
- PINMUX_DATA(SSI0_SDATA_MARK, P2MSEL13_0, P2MSEL12_1, PF3_FN),
- PINMUX_DATA(SSI0_SCK_MARK, P2MSEL13_0, P2MSEL12_1, PF2_FN),
- PINMUX_DATA(SSI0_WS_MARK, P2MSEL13_0, P2MSEL12_1, PF1_FN),
- PINMUX_DATA(SSI0_CLK_MARK, P2MSEL13_0, P2MSEL12_1, PF0_FN),
- PINMUX_DATA(SDIF1CMD_MARK, P2MSEL15_1, P2MSEL14_0, PF7_FN),
- PINMUX_DATA(SDIF1CD_MARK, P2MSEL15_1, P2MSEL14_0, PF6_FN),
- PINMUX_DATA(SDIF1WP_MARK, P2MSEL15_1, P2MSEL14_0, PF5_FN),
- PINMUX_DATA(SDIF1CLK_MARK, P2MSEL15_1, P2MSEL14_0, PF4_FN),
- PINMUX_DATA(SDIF1D3_MARK, P2MSEL13_1, P2MSEL12_0, PF3_FN),
- PINMUX_DATA(SDIF1D2_MARK, P2MSEL13_1, P2MSEL12_0, PF2_FN),
- PINMUX_DATA(SDIF1D1_MARK, P2MSEL13_1, P2MSEL12_0, PF1_FN),
- PINMUX_DATA(SDIF1D0_MARK, P2MSEL13_1, P2MSEL12_0, PF0_FN),
-
- /* PG FN */
- PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL8_0, PG7_FN),
- PINMUX_DATA(SSI2_SDATA_MARK, P1MSEL8_1, PG7_FN),
- PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL7_0, P1MSEL6_0, PG6_FN),
- PINMUX_DATA(SSI2_SCK_MARK, P1MSEL7_1, P1MSEL6_0, PG6_FN),
- PINMUX_DATA(TCLK_MARK, P1MSEL7_0, P1MSEL6_1, PG6_FN),
- PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL5_0, P1MSEL4_0, PG5_FN),
- PINMUX_DATA(SSI2_WS_MARK, P1MSEL5_1, P1MSEL4_0, PG5_FN),
- PINMUX_DATA(HAC_RES_MARK, P1MSEL5_0, P1MSEL4_1, PG5_FN),
-
- /* PH FN */
- PINMUX_DATA(DACK3_MARK, P2MSEL4_0, PH7_FN),
- PINMUX_DATA(SDIF0CMD_MARK, P2MSEL4_1, PH7_FN),
- PINMUX_DATA(DACK2_MARK, P2MSEL4_0, PH6_FN),
- PINMUX_DATA(SDIF0CD_MARK, P2MSEL4_1, PH6_FN),
- PINMUX_DATA(DREQ3_MARK, P2MSEL4_0, PH5_FN),
- PINMUX_DATA(SDIF0WP_MARK, P2MSEL4_1, PH5_FN),
- PINMUX_DATA(DREQ2_MARK, P2MSEL3_0, P2MSEL2_1, PH4_FN),
- PINMUX_DATA(SDIF0CLK_MARK, P2MSEL3_1, P2MSEL2_0, PH4_FN),
- PINMUX_DATA(SCIF0_CTS_MARK, P2MSEL3_0, P2MSEL2_0, PH4_FN),
- PINMUX_DATA(SDIF0D3_MARK, P2MSEL1_1, P2MSEL0_0, PH3_FN),
- PINMUX_DATA(SCIF0_RTS_MARK, P2MSEL1_0, P2MSEL0_0, PH3_FN),
- PINMUX_DATA(IRL7_MARK, P2MSEL1_0, P2MSEL0_1, PH3_FN),
- PINMUX_DATA(SDIF0D2_MARK, P2MSEL1_1, P2MSEL0_0, PH2_FN),
- PINMUX_DATA(SCIF0_SCK_MARK, P2MSEL1_0, P2MSEL0_0, PH2_FN),
- PINMUX_DATA(IRL6_MARK, P2MSEL1_0, P2MSEL0_1, PH2_FN),
- PINMUX_DATA(SDIF0D1_MARK, P2MSEL1_1, P2MSEL0_0, PH1_FN),
- PINMUX_DATA(SCIF0_RXD_MARK, P2MSEL1_0, P2MSEL0_0, PH1_FN),
- PINMUX_DATA(IRL5_MARK, P2MSEL1_0, P2MSEL0_1, PH1_FN),
- PINMUX_DATA(SDIF0D0_MARK, P2MSEL1_1, P2MSEL0_0, PH0_FN),
- PINMUX_DATA(SCIF0_TXD_MARK, P2MSEL1_0, P2MSEL0_0, PH0_FN),
- PINMUX_DATA(IRL4_MARK, P2MSEL1_0, P2MSEL0_1, PH0_FN),
-
- /* PJ FN */
- PINMUX_DATA(SCIF5_SCK_MARK, P2MSEL11_1, PJ7_FN),
- PINMUX_DATA(FRB_MARK, P2MSEL11_0, PJ7_FN),
- PINMUX_DATA(SCIF5_RXD_MARK, P2MSEL10_0, PJ6_FN),
- PINMUX_DATA(IOIS16_MARK, P2MSEL10_1, PJ6_FN),
- PINMUX_DATA(SCIF5_TXD_MARK, P2MSEL10_0, PJ5_FN),
- PINMUX_DATA(CE2B_MARK, P2MSEL10_1, PJ5_FN),
- PINMUX_DATA(DRAK3_MARK, P2MSEL7_0, PJ4_FN),
- PINMUX_DATA(CE2A_MARK, P2MSEL7_1, PJ4_FN),
- PINMUX_DATA(SCIF4_SCK_MARK, P2MSEL9_0, P2MSEL8_0, PJ3_FN),
- PINMUX_DATA(DRAK2_MARK, P2MSEL9_0, P2MSEL8_1, PJ3_FN),
- PINMUX_DATA(SSI3_WS_MARK, P2MSEL9_1, P2MSEL8_0, PJ3_FN),
- PINMUX_DATA(SCIF4_RXD_MARK, P2MSEL6_1, P2MSEL5_0, PJ2_FN),
- PINMUX_DATA(DRAK1_MARK, P2MSEL6_0, P2MSEL5_1, PJ2_FN),
- PINMUX_DATA(FSTATUS_MARK, P2MSEL6_0, P2MSEL5_0, PJ2_FN),
- PINMUX_DATA(SSI3_SDATA_MARK, P2MSEL6_1, P2MSEL5_1, PJ2_FN),
- PINMUX_DATA(SCIF4_TXD_MARK, P2MSEL6_1, P2MSEL5_0, PJ1_FN),
- PINMUX_DATA(DRAK0_MARK, P2MSEL6_0, P2MSEL5_1, PJ1_FN),
- PINMUX_DATA(FSE_MARK, P2MSEL6_0, P2MSEL5_0, PJ1_FN),
- PINMUX_DATA(SSI3_SCK_MARK, P2MSEL6_1, P2MSEL5_1, PJ1_FN),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- /* PA */
- PINMUX_GPIO(GPIO_PA7, PA7_DATA),
- PINMUX_GPIO(GPIO_PA6, PA6_DATA),
- PINMUX_GPIO(GPIO_PA5, PA5_DATA),
- PINMUX_GPIO(GPIO_PA4, PA4_DATA),
- PINMUX_GPIO(GPIO_PA3, PA3_DATA),
- PINMUX_GPIO(GPIO_PA2, PA2_DATA),
- PINMUX_GPIO(GPIO_PA1, PA1_DATA),
- PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-
- /* PB */
- PINMUX_GPIO(GPIO_PB7, PB7_DATA),
- PINMUX_GPIO(GPIO_PB6, PB6_DATA),
- PINMUX_GPIO(GPIO_PB5, PB5_DATA),
- PINMUX_GPIO(GPIO_PB4, PB4_DATA),
- PINMUX_GPIO(GPIO_PB3, PB3_DATA),
- PINMUX_GPIO(GPIO_PB2, PB2_DATA),
- PINMUX_GPIO(GPIO_PB1, PB1_DATA),
- PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-
- /* PC */
- PINMUX_GPIO(GPIO_PC7, PC7_DATA),
- PINMUX_GPIO(GPIO_PC6, PC6_DATA),
- PINMUX_GPIO(GPIO_PC5, PC5_DATA),
- PINMUX_GPIO(GPIO_PC4, PC4_DATA),
- PINMUX_GPIO(GPIO_PC3, PC3_DATA),
- PINMUX_GPIO(GPIO_PC2, PC2_DATA),
- PINMUX_GPIO(GPIO_PC1, PC1_DATA),
- PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-
- /* PD */
- PINMUX_GPIO(GPIO_PD7, PD7_DATA),
- PINMUX_GPIO(GPIO_PD6, PD6_DATA),
- PINMUX_GPIO(GPIO_PD5, PD5_DATA),
- PINMUX_GPIO(GPIO_PD4, PD4_DATA),
- PINMUX_GPIO(GPIO_PD3, PD3_DATA),
- PINMUX_GPIO(GPIO_PD2, PD2_DATA),
- PINMUX_GPIO(GPIO_PD1, PD1_DATA),
- PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-
- /* PE */
- PINMUX_GPIO(GPIO_PE7, PE7_DATA),
- PINMUX_GPIO(GPIO_PE6, PE6_DATA),
-
- /* PF */
- PINMUX_GPIO(GPIO_PF7, PF7_DATA),
- PINMUX_GPIO(GPIO_PF6, PF6_DATA),
- PINMUX_GPIO(GPIO_PF5, PF5_DATA),
- PINMUX_GPIO(GPIO_PF4, PF4_DATA),
- PINMUX_GPIO(GPIO_PF3, PF3_DATA),
- PINMUX_GPIO(GPIO_PF2, PF2_DATA),
- PINMUX_GPIO(GPIO_PF1, PF1_DATA),
- PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-
- /* PG */
- PINMUX_GPIO(GPIO_PG7, PG7_DATA),
- PINMUX_GPIO(GPIO_PG6, PG6_DATA),
- PINMUX_GPIO(GPIO_PG5, PG5_DATA),
-
- /* PH */
- PINMUX_GPIO(GPIO_PH7, PH7_DATA),
- PINMUX_GPIO(GPIO_PH6, PH6_DATA),
- PINMUX_GPIO(GPIO_PH5, PH5_DATA),
- PINMUX_GPIO(GPIO_PH4, PH4_DATA),
- PINMUX_GPIO(GPIO_PH3, PH3_DATA),
- PINMUX_GPIO(GPIO_PH2, PH2_DATA),
- PINMUX_GPIO(GPIO_PH1, PH1_DATA),
- PINMUX_GPIO(GPIO_PH0, PH0_DATA),
-
- /* PJ */
- PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
- PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
- PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
- PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
- PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
- PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
- PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
-
- /* FN */
- PINMUX_GPIO(GPIO_FN_CDE, CDE_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_MAGIC, ETH_MAGIC_MARK),
- PINMUX_GPIO(GPIO_FN_DISP, DISP_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_LINK, ETH_LINK_MARK),
- PINMUX_GPIO(GPIO_FN_DR5, DR5_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TX_ER, ETH_TX_ER_MARK),
- PINMUX_GPIO(GPIO_FN_DR4, DR4_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TX_EN, ETH_TX_EN_MARK),
- PINMUX_GPIO(GPIO_FN_DR3, DR3_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TXD3, ETH_TXD3_MARK),
- PINMUX_GPIO(GPIO_FN_DR2, DR2_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TXD2, ETH_TXD2_MARK),
- PINMUX_GPIO(GPIO_FN_DR1, DR1_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TXD1, ETH_TXD1_MARK),
- PINMUX_GPIO(GPIO_FN_DR0, DR0_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TXD0, ETH_TXD0_MARK),
- PINMUX_GPIO(GPIO_FN_VSYNC, VSYNC_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_ODDF, ODDF_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK),
- PINMUX_GPIO(GPIO_FN_DG5, DG5_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_MDIO, ETH_MDIO_MARK),
- PINMUX_GPIO(GPIO_FN_DG4, DG4_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RX_CLK, ETH_RX_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_DG3, DG3_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_MDC, ETH_MDC_MARK),
- PINMUX_GPIO(GPIO_FN_DG2, DG2_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_COL, ETH_COL_MARK),
- PINMUX_GPIO(GPIO_FN_DG1, DG1_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_TX_CLK, ETH_TX_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_DG0, DG0_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_CRS, ETH_CRS_MARK),
- PINMUX_GPIO(GPIO_FN_DCLKIN, DCLKIN_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK),
- PINMUX_GPIO(GPIO_FN_HSYNC, HSYNC_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK),
- PINMUX_GPIO(GPIO_FN_DB5, DB5_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RXD3, ETH_RXD3_MARK),
- PINMUX_GPIO(GPIO_FN_DB4, DB4_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RXD2, ETH_RXD2_MARK),
- PINMUX_GPIO(GPIO_FN_DB3, DB3_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RXD1, ETH_RXD1_MARK),
- PINMUX_GPIO(GPIO_FN_DB2, DB2_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RXD0, ETH_RXD0_MARK),
- PINMUX_GPIO(GPIO_FN_DB1, DB1_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RX_DV, ETH_RX_DV_MARK),
- PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK),
- PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK),
- PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
- PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
- PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK),
- PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
- PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
- PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
- PINMUX_GPIO(GPIO_FN_USB_OVC1, USB_OVC1_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
- PINMUX_GPIO(GPIO_FN_USB_OVC0, USB_OVC0_MARK),
- PINMUX_GPIO(GPIO_FN_USB_PENC1, USB_PENC1_MARK),
- PINMUX_GPIO(GPIO_FN_USB_PENC0, USB_PENC0_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1CMD, SDIF1CMD_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1CD, SDIF1CD_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1WP, SDIF1WP_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1CLK, SDIF1CLK_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1D3, SDIF1D3_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1D2, SDIF1D2_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1D1, SDIF1D1_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF1D0, SDIF1D0_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SSI2_SDATA, SSI2_SDATA_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
- PINMUX_GPIO(GPIO_FN_SSI2_SCK, SSI2_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK),
- PINMUX_GPIO(GPIO_FN_SSI2_WS, SSI2_WS_MARK),
- PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0CMD, SDIF0CMD_MARK),
- PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0CD, SDIF0CD_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0WP, SDIF0WP_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0CLK, SDIF0CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
- PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0D3, SDIF0D3_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0D2, SDIF0D2_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0D1, SDIF0D1_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK),
- PINMUX_GPIO(GPIO_FN_SDIF0D0, SDIF0D0_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
- PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
- PINMUX_GPIO(GPIO_FN_SSI3_WS, SSI3_WS_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK),
- PINMUX_GPIO(GPIO_FN_SSI3_SDATA, SSI3_SDATA_MARK),
- PINMUX_GPIO(GPIO_FN_FSTATUS, FSTATUS_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK),
- PINMUX_GPIO(GPIO_FN_SSI3_SCK, SSI3_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
- PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
- PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
- PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
- PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
- PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
- PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
- PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
- PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
- },
- { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) {
- PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
- PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
- PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
- PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
- PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
- PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
- PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
- PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
- },
- { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) {
- PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
- PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
- PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
- PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
- PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
- PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
- PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
- PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
- },
- { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) {
- PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
- PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
- PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
- PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
- PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
- PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
- PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
- PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
- },
- { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) {
- PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
- PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) {
- PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
- PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
- PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
- PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
- PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
- PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
- PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
- PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
- },
- { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) {
- PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
- PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
- PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) {
- PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
- PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
- PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
- PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
- PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
- PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
- PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
- PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
- },
- { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) {
- PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
- PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
- PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
- PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
- PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
- PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
- PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
- 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) {
- 0, 0,
- P1MSEL14_0, P1MSEL14_1,
- P1MSEL13_0, P1MSEL13_1,
- P1MSEL12_0, P1MSEL12_1,
- P1MSEL11_0, P1MSEL11_1,
- P1MSEL10_0, P1MSEL10_1,
- P1MSEL9_0, P1MSEL9_1,
- P1MSEL8_0, P1MSEL8_1,
- P1MSEL7_0, P1MSEL7_1,
- P1MSEL6_0, P1MSEL6_1,
- P1MSEL5_0, P1MSEL5_1,
- P1MSEL4_0, P1MSEL4_1,
- P1MSEL3_0, P1MSEL3_1,
- P1MSEL2_0, P1MSEL2_1,
- P1MSEL1_0, P1MSEL1_1,
- P1MSEL0_0, P1MSEL0_1 }
- },
- { PINMUX_CFG_REG("P2MSELR", 0xffcc0082, 16, 1) {
- P2MSEL15_0, P2MSEL15_1,
- P2MSEL14_0, P2MSEL14_1,
- P2MSEL13_0, P2MSEL13_1,
- P2MSEL12_0, P2MSEL12_1,
- P2MSEL11_0, P2MSEL11_1,
- P2MSEL10_0, P2MSEL10_1,
- P2MSEL9_0, P2MSEL9_1,
- P2MSEL8_0, P2MSEL8_1,
- P2MSEL7_0, P2MSEL7_1,
- P2MSEL6_0, P2MSEL6_1,
- P2MSEL5_0, P2MSEL5_1,
- P2MSEL4_0, P2MSEL4_1,
- P2MSEL3_0, P2MSEL3_1,
- P2MSEL2_0, P2MSEL2_1,
- P2MSEL1_0, P2MSEL1_1,
- P2MSEL0_0, P2MSEL0_1 }
- },
- {}
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) {
- PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
- },
- { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8) {
- PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
- },
- { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8) {
- PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
- },
- { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8) {
- PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
- },
- { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8) {
- PE7_DATA, PE6_DATA,
- 0, 0, 0, 0, 0, 0 }
- },
- { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8) {
- PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
- },
- { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8) {
- PG7_DATA, PG6_DATA, PG5_DATA, 0,
- 0, 0, 0, 0 }
- },
- { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8) {
- PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
- },
- { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8) {
- PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 }
- },
- { },
-};
-
-static struct pinmux_info sh7786_pinmux_info = {
- .name = "sh7786_pfc",
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_IRL4,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
static int __init plat_pinmux_setup(void)
{
- return sh_pfc_register_info(NULL, NULL, 0, &sh7786_pinmux_info);
+ return sh_pfc_register("pfc-sh7786", NULL, 0);
}
arch_initcall(plat_pinmux_setup);
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 76/81] sh: sh7785: pinmux: Use driver-provided pinmux info
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
Pinmux info for the sh machines is now provided by pinmux drivers.
Remove the duplicate copy in arch code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c | 1293 +------------------------------
1 files changed, 1 insertions(+), 1292 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c
index da0bd79..01055b8 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7785.c
@@ -10,1302 +10,11 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/gpio.h>
#include <cpu/pfc.h>
-#include <cpu/sh7785.h>
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
- PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
- PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
- PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
- PE5_DATA, PE4_DATA, PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
- PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
- PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
- PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
- PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
- PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
- PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
- PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
- PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA,
- PM1_DATA, PM0_DATA,
- PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
- PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA,
- PP5_DATA, PP4_DATA, PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA,
- PQ4_DATA, PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA,
- PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA,
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- PA7_IN, PA6_IN, PA5_IN, PA4_IN,
- PA3_IN, PA2_IN, PA1_IN, PA0_IN,
- PB7_IN, PB6_IN, PB5_IN, PB4_IN,
- PB3_IN, PB2_IN, PB1_IN, PB0_IN,
- PC7_IN, PC6_IN, PC5_IN, PC4_IN,
- PC3_IN, PC2_IN, PC1_IN, PC0_IN,
- PD7_IN, PD6_IN, PD5_IN, PD4_IN,
- PD3_IN, PD2_IN, PD1_IN, PD0_IN,
- PE5_IN, PE4_IN, PE3_IN, PE2_IN, PE1_IN, PE0_IN,
- PF7_IN, PF6_IN, PF5_IN, PF4_IN,
- PF3_IN, PF2_IN, PF1_IN, PF0_IN,
- PG7_IN, PG6_IN, PG5_IN, PG4_IN,
- PG3_IN, PG2_IN, PG1_IN, PG0_IN,
- PH7_IN, PH6_IN, PH5_IN, PH4_IN,
- PH3_IN, PH2_IN, PH1_IN, PH0_IN,
- PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
- PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
- PK7_IN, PK6_IN, PK5_IN, PK4_IN,
- PK3_IN, PK2_IN, PK1_IN, PK0_IN,
- PL7_IN, PL6_IN, PL5_IN, PL4_IN,
- PL3_IN, PL2_IN, PL1_IN, PL0_IN,
- PM1_IN, PM0_IN,
- PN7_IN, PN6_IN, PN5_IN, PN4_IN,
- PN3_IN, PN2_IN, PN1_IN, PN0_IN,
- PP5_IN, PP4_IN, PP3_IN, PP2_IN, PP1_IN, PP0_IN,
- PQ4_IN, PQ3_IN, PQ2_IN, PQ1_IN, PQ0_IN,
- PR3_IN, PR2_IN, PR1_IN, PR0_IN,
- PINMUX_INPUT_END,
-
- PINMUX_INPUT_PULLUP_BEGIN,
- PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
- PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
- PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
- PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
- PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
- PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
- PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
- PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
- PE5_IN_PU, PE4_IN_PU, PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
- PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
- PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
- PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
- PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
- PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
- PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
- PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
- PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU, PJ0_IN_PU,
- PK7_IN_PU, PK6_IN_PU, PK5_IN_PU, PK4_IN_PU,
- PK3_IN_PU, PK2_IN_PU, PK1_IN_PU, PK0_IN_PU,
- PL7_IN_PU, PL6_IN_PU, PL5_IN_PU, PL4_IN_PU,
- PL3_IN_PU, PL2_IN_PU, PL1_IN_PU, PL0_IN_PU,
- PM1_IN_PU, PM0_IN_PU,
- PN7_IN_PU, PN6_IN_PU, PN5_IN_PU, PN4_IN_PU,
- PN3_IN_PU, PN2_IN_PU, PN1_IN_PU, PN0_IN_PU,
- PP5_IN_PU, PP4_IN_PU, PP3_IN_PU, PP2_IN_PU, PP1_IN_PU, PP0_IN_PU,
- PQ4_IN_PU, PQ3_IN_PU, PQ2_IN_PU, PQ1_IN_PU, PQ0_IN_PU,
- PR3_IN_PU, PR2_IN_PU, PR1_IN_PU, PR0_IN_PU,
- PINMUX_INPUT_PULLUP_END,
-
- PINMUX_OUTPUT_BEGIN,
- PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
- PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
- PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
- PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
- PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
- PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
- PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
- PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
- PE5_OUT, PE4_OUT, PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
- PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
- PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
- PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
- PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
- PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
- PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
- PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
- PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
- PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
- PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
- PL7_OUT, PL6_OUT, PL5_OUT, PL4_OUT,
- PL3_OUT, PL2_OUT, PL1_OUT, PL0_OUT,
- PM1_OUT, PM0_OUT,
- PN7_OUT, PN6_OUT, PN5_OUT, PN4_OUT,
- PN3_OUT, PN2_OUT, PN1_OUT, PN0_OUT,
- PP5_OUT, PP4_OUT, PP3_OUT, PP2_OUT, PP1_OUT, PP0_OUT,
- PQ4_OUT, PQ3_OUT, PQ2_OUT, PQ1_OUT, PQ0_OUT,
- PR3_OUT, PR2_OUT, PR1_OUT, PR0_OUT,
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PA7_FN, PA6_FN, PA5_FN, PA4_FN,
- PA3_FN, PA2_FN, PA1_FN, PA0_FN,
- PB7_FN, PB6_FN, PB5_FN, PB4_FN,
- PB3_FN, PB2_FN, PB1_FN, PB0_FN,
- PC7_FN, PC6_FN, PC5_FN, PC4_FN,
- PC3_FN, PC2_FN, PC1_FN, PC0_FN,
- PD7_FN, PD6_FN, PD5_FN, PD4_FN,
- PD3_FN, PD2_FN, PD1_FN, PD0_FN,
- PE5_FN, PE4_FN, PE3_FN, PE2_FN, PE1_FN, PE0_FN,
- PF7_FN, PF6_FN, PF5_FN, PF4_FN,
- PF3_FN, PF2_FN, PF1_FN, PF0_FN,
- PG7_FN, PG6_FN, PG5_FN, PG4_FN,
- PG3_FN, PG2_FN, PG1_FN, PG0_FN,
- PH7_FN, PH6_FN, PH5_FN, PH4_FN,
- PH3_FN, PH2_FN, PH1_FN, PH0_FN,
- PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
- PJ3_FN, PJ2_FN, PJ1_FN, PJ0_FN,
- PK7_FN, PK6_FN, PK5_FN, PK4_FN,
- PK3_FN, PK2_FN, PK1_FN, PK0_FN,
- PL7_FN, PL6_FN, PL5_FN, PL4_FN,
- PL3_FN, PL2_FN, PL1_FN, PL0_FN,
- PM1_FN, PM0_FN,
- PN7_FN, PN6_FN, PN5_FN, PN4_FN,
- PN3_FN, PN2_FN, PN1_FN, PN0_FN,
- PP5_FN, PP4_FN, PP3_FN, PP2_FN, PP1_FN, PP0_FN,
- PQ4_FN, PQ3_FN, PQ2_FN, PQ1_FN, PQ0_FN,
- PR3_FN, PR2_FN, PR1_FN, PR0_FN,
- P1MSEL15_0, P1MSEL15_1,
- P1MSEL14_0, P1MSEL14_1,
- P1MSEL13_0, P1MSEL13_1,
- P1MSEL12_0, P1MSEL12_1,
- P1MSEL11_0, P1MSEL11_1,
- P1MSEL10_0, P1MSEL10_1,
- P1MSEL9_0, P1MSEL9_1,
- P1MSEL8_0, P1MSEL8_1,
- P1MSEL7_0, P1MSEL7_1,
- P1MSEL6_0, P1MSEL6_1,
- P1MSEL5_0,
- P1MSEL4_0, P1MSEL4_1,
- P1MSEL3_0, P1MSEL3_1,
- P1MSEL2_0, P1MSEL2_1,
- P1MSEL1_0, P1MSEL1_1,
- P1MSEL0_0, P1MSEL0_1,
- P2MSEL2_0, P2MSEL2_1,
- P2MSEL1_0, P2MSEL1_1,
- P2MSEL0_0, P2MSEL0_1,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- D63_AD31_MARK,
- D62_AD30_MARK,
- D61_AD29_MARK,
- D60_AD28_MARK,
- D59_AD27_MARK,
- D58_AD26_MARK,
- D57_AD25_MARK,
- D56_AD24_MARK,
- D55_AD23_MARK,
- D54_AD22_MARK,
- D53_AD21_MARK,
- D52_AD20_MARK,
- D51_AD19_MARK,
- D50_AD18_MARK,
- D49_AD17_DB5_MARK,
- D48_AD16_DB4_MARK,
- D47_AD15_DB3_MARK,
- D46_AD14_DB2_MARK,
- D45_AD13_DB1_MARK,
- D44_AD12_DB0_MARK,
- D43_AD11_DG5_MARK,
- D42_AD10_DG4_MARK,
- D41_AD9_DG3_MARK,
- D40_AD8_DG2_MARK,
- D39_AD7_DG1_MARK,
- D38_AD6_DG0_MARK,
- D37_AD5_DR5_MARK,
- D36_AD4_DR4_MARK,
- D35_AD3_DR3_MARK,
- D34_AD2_DR2_MARK,
- D33_AD1_DR1_MARK,
- D32_AD0_DR0_MARK,
- REQ1_MARK,
- REQ2_MARK,
- REQ3_MARK,
- GNT1_MARK,
- GNT2_MARK,
- GNT3_MARK,
- MMCCLK_MARK,
- D31_MARK,
- D30_MARK,
- D29_MARK,
- D28_MARK,
- D27_MARK,
- D26_MARK,
- D25_MARK,
- D24_MARK,
- D23_MARK,
- D22_MARK,
- D21_MARK,
- D20_MARK,
- D19_MARK,
- D18_MARK,
- D17_MARK,
- D16_MARK,
- SCIF1_SCK_MARK,
- SCIF1_RXD_MARK,
- SCIF1_TXD_MARK,
- SCIF0_CTS_MARK,
- INTD_MARK,
- FCE_MARK,
- SCIF0_RTS_MARK,
- HSPI_CS_MARK,
- FSE_MARK,
- SCIF0_SCK_MARK,
- HSPI_CLK_MARK,
- FRE_MARK,
- SCIF0_RXD_MARK,
- HSPI_RX_MARK,
- FRB_MARK,
- SCIF0_TXD_MARK,
- HSPI_TX_MARK,
- FWE_MARK,
- SCIF5_TXD_MARK,
- HAC1_SYNC_MARK,
- SSI1_WS_MARK,
- SIOF_TXD_PJ_MARK,
- HAC0_SDOUT_MARK,
- SSI0_SDATA_MARK,
- SIOF_RXD_PJ_MARK,
- HAC0_SDIN_MARK,
- SSI0_SCK_MARK,
- SIOF_SYNC_PJ_MARK,
- HAC0_SYNC_MARK,
- SSI0_WS_MARK,
- SIOF_MCLK_PJ_MARK,
- HAC_RES_MARK,
- SIOF_SCK_PJ_MARK,
- HAC0_BITCLK_MARK,
- SSI0_CLK_MARK,
- HAC1_BITCLK_MARK,
- SSI1_CLK_MARK,
- TCLK_MARK,
- IOIS16_MARK,
- STATUS0_MARK,
- DRAK0_PK3_MARK,
- STATUS1_MARK,
- DRAK1_PK2_MARK,
- DACK2_MARK,
- SCIF2_TXD_MARK,
- MMCCMD_MARK,
- SIOF_TXD_PK_MARK,
- DACK3_MARK,
- SCIF2_SCK_MARK,
- MMCDAT_MARK,
- SIOF_SCK_PK_MARK,
- DREQ0_MARK,
- DREQ1_MARK,
- DRAK0_PK1_MARK,
- DRAK1_PK0_MARK,
- DREQ2_MARK,
- INTB_MARK,
- DREQ3_MARK,
- INTC_MARK,
- DRAK2_MARK,
- CE2A_MARK,
- IRL4_MARK,
- FD4_MARK,
- IRL5_MARK,
- FD5_MARK,
- IRL6_MARK,
- FD6_MARK,
- IRL7_MARK,
- FD7_MARK,
- DRAK3_MARK,
- CE2B_MARK,
- BREQ_BSACK_MARK,
- BACK_BSREQ_MARK,
- SCIF5_RXD_MARK,
- HAC1_SDIN_MARK,
- SSI1_SCK_MARK,
- SCIF5_SCK_MARK,
- HAC1_SDOUT_MARK,
- SSI1_SDATA_MARK,
- SCIF3_TXD_MARK,
- FCLE_MARK,
- SCIF3_RXD_MARK,
- FALE_MARK,
- SCIF3_SCK_MARK,
- FD0_MARK,
- SCIF4_TXD_MARK,
- FD1_MARK,
- SCIF4_RXD_MARK,
- FD2_MARK,
- SCIF4_SCK_MARK,
- FD3_MARK,
- DEVSEL_DCLKOUT_MARK,
- STOP_CDE_MARK,
- LOCK_ODDF_MARK,
- TRDY_DISPL_MARK,
- IRDY_HSYNC_MARK,
- PCIFRAME_VSYNC_MARK,
- INTA_MARK,
- GNT0_GNTIN_MARK,
- REQ0_REQOUT_MARK,
- PERR_MARK,
- SERR_MARK,
- WE7_CBE3_MARK,
- WE6_CBE2_MARK,
- WE5_CBE1_MARK,
- WE4_CBE0_MARK,
- SCIF2_RXD_MARK,
- SIOF_RXD_MARK,
- MRESETOUT_MARK,
- IRQOUT_MARK,
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
-
- /* PA GPIO */
- PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
- PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
- PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
- PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
- PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
- PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
- PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
- PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
-
- /* PB GPIO */
- PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
- PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
- PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
- PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
- PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
- PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
- PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
- PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
-
- /* PC GPIO */
- PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
- PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
- PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
- PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
- PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
- PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
- PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
- PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
-
- /* PD GPIO */
- PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
- PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
- PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
- PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
- PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
- PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
- PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
- PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
-
- /* PE GPIO */
- PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
- PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
- PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
- PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
- PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
- PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
-
- /* PF GPIO */
- PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
- PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
- PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
- PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
- PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
- PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
- PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
- PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
-
- /* PG GPIO */
- PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
- PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
- PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
- PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
- PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
- PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
- PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
- PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
-
- /* PH GPIO */
- PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
- PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
- PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
- PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
- PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
- PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
- PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
- PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
-
- /* PJ GPIO */
- PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
- PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
- PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
- PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
- PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
- PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
- PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
- PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT, PJ0_IN_PU),
-
- /* PK GPIO */
- PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT, PK7_IN_PU),
- PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT, PK6_IN_PU),
- PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT, PK5_IN_PU),
- PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT, PK4_IN_PU),
- PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT, PK3_IN_PU),
- PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT, PK2_IN_PU),
- PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT, PK1_IN_PU),
- PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT, PK0_IN_PU),
-
- /* PL GPIO */
- PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT, PL7_IN_PU),
- PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT, PL6_IN_PU),
- PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT, PL5_IN_PU),
- PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT, PL4_IN_PU),
- PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT, PL3_IN_PU),
- PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT, PL2_IN_PU),
- PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT, PL1_IN_PU),
- PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT, PL0_IN_PU),
-
- /* PM GPIO */
- PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT, PM1_IN_PU),
- PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT, PM0_IN_PU),
-
- /* PN GPIO */
- PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT, PN7_IN_PU),
- PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT, PN6_IN_PU),
- PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT, PN5_IN_PU),
- PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT, PN4_IN_PU),
- PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT, PN3_IN_PU),
- PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT, PN2_IN_PU),
- PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT, PN1_IN_PU),
- PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT, PN0_IN_PU),
-
- /* PP GPIO */
- PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT, PP5_IN_PU),
- PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT, PP4_IN_PU),
- PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT, PP3_IN_PU),
- PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT, PP2_IN_PU),
- PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT, PP1_IN_PU),
- PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT, PP0_IN_PU),
-
- /* PQ GPIO */
- PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT, PQ4_IN_PU),
- PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT, PQ3_IN_PU),
- PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT, PQ2_IN_PU),
- PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT, PQ1_IN_PU),
- PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT, PQ0_IN_PU),
-
- /* PR GPIO */
- PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT, PR3_IN_PU),
- PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT, PR2_IN_PU),
- PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT, PR1_IN_PU),
- PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT, PR0_IN_PU),
-
- /* PA FN */
- PINMUX_DATA(D63_AD31_MARK, PA7_FN),
- PINMUX_DATA(D62_AD30_MARK, PA6_FN),
- PINMUX_DATA(D61_AD29_MARK, PA5_FN),
- PINMUX_DATA(D60_AD28_MARK, PA4_FN),
- PINMUX_DATA(D59_AD27_MARK, PA3_FN),
- PINMUX_DATA(D58_AD26_MARK, PA2_FN),
- PINMUX_DATA(D57_AD25_MARK, PA1_FN),
- PINMUX_DATA(D56_AD24_MARK, PA0_FN),
-
- /* PB FN */
- PINMUX_DATA(D55_AD23_MARK, PB7_FN),
- PINMUX_DATA(D54_AD22_MARK, PB6_FN),
- PINMUX_DATA(D53_AD21_MARK, PB5_FN),
- PINMUX_DATA(D52_AD20_MARK, PB4_FN),
- PINMUX_DATA(D51_AD19_MARK, PB3_FN),
- PINMUX_DATA(D50_AD18_MARK, PB2_FN),
- PINMUX_DATA(D49_AD17_DB5_MARK, PB1_FN),
- PINMUX_DATA(D48_AD16_DB4_MARK, PB0_FN),
-
- /* PC FN */
- PINMUX_DATA(D47_AD15_DB3_MARK, PC7_FN),
- PINMUX_DATA(D46_AD14_DB2_MARK, PC6_FN),
- PINMUX_DATA(D45_AD13_DB1_MARK, PC5_FN),
- PINMUX_DATA(D44_AD12_DB0_MARK, PC4_FN),
- PINMUX_DATA(D43_AD11_DG5_MARK, PC3_FN),
- PINMUX_DATA(D42_AD10_DG4_MARK, PC2_FN),
- PINMUX_DATA(D41_AD9_DG3_MARK, PC1_FN),
- PINMUX_DATA(D40_AD8_DG2_MARK, PC0_FN),
-
- /* PD FN */
- PINMUX_DATA(D39_AD7_DG1_MARK, PD7_FN),
- PINMUX_DATA(D38_AD6_DG0_MARK, PD6_FN),
- PINMUX_DATA(D37_AD5_DR5_MARK, PD5_FN),
- PINMUX_DATA(D36_AD4_DR4_MARK, PD4_FN),
- PINMUX_DATA(D35_AD3_DR3_MARK, PD3_FN),
- PINMUX_DATA(D34_AD2_DR2_MARK, PD2_FN),
- PINMUX_DATA(D33_AD1_DR1_MARK, PD1_FN),
- PINMUX_DATA(D32_AD0_DR0_MARK, PD0_FN),
-
- /* PE FN */
- PINMUX_DATA(REQ1_MARK, PE5_FN),
- PINMUX_DATA(REQ2_MARK, PE4_FN),
- PINMUX_DATA(REQ3_MARK, P2MSEL0_0, PE3_FN),
- PINMUX_DATA(GNT1_MARK, PE2_FN),
- PINMUX_DATA(GNT2_MARK, PE1_FN),
- PINMUX_DATA(GNT3_MARK, P2MSEL0_0, PE0_FN),
- PINMUX_DATA(MMCCLK_MARK, P2MSEL0_1, PE0_FN),
-
- /* PF FN */
- PINMUX_DATA(D31_MARK, PF7_FN),
- PINMUX_DATA(D30_MARK, PF6_FN),
- PINMUX_DATA(D29_MARK, PF5_FN),
- PINMUX_DATA(D28_MARK, PF4_FN),
- PINMUX_DATA(D27_MARK, PF3_FN),
- PINMUX_DATA(D26_MARK, PF2_FN),
- PINMUX_DATA(D25_MARK, PF1_FN),
- PINMUX_DATA(D24_MARK, PF0_FN),
-
- /* PF FN */
- PINMUX_DATA(D23_MARK, PG7_FN),
- PINMUX_DATA(D22_MARK, PG6_FN),
- PINMUX_DATA(D21_MARK, PG5_FN),
- PINMUX_DATA(D20_MARK, PG4_FN),
- PINMUX_DATA(D19_MARK, PG3_FN),
- PINMUX_DATA(D18_MARK, PG2_FN),
- PINMUX_DATA(D17_MARK, PG1_FN),
- PINMUX_DATA(D16_MARK, PG0_FN),
-
- /* PH FN */
- PINMUX_DATA(SCIF1_SCK_MARK, PH7_FN),
- PINMUX_DATA(SCIF1_RXD_MARK, PH6_FN),
- PINMUX_DATA(SCIF1_TXD_MARK, PH5_FN),
- PINMUX_DATA(SCIF0_CTS_MARK, PH4_FN),
- PINMUX_DATA(INTD_MARK, P1MSEL7_1, PH4_FN),
- PINMUX_DATA(FCE_MARK, P1MSEL8_1, P1MSEL7_0, PH4_FN),
- PINMUX_DATA(SCIF0_RTS_MARK, P1MSEL8_0, P1MSEL7_0, PH3_FN),
- PINMUX_DATA(HSPI_CS_MARK, P1MSEL8_0, P1MSEL7_1, PH3_FN),
- PINMUX_DATA(FSE_MARK, P1MSEL8_1, P1MSEL7_0, PH3_FN),
- PINMUX_DATA(SCIF0_SCK_MARK, P1MSEL8_0, P1MSEL7_0, PH2_FN),
- PINMUX_DATA(HSPI_CLK_MARK, P1MSEL8_0, P1MSEL7_1, PH2_FN),
- PINMUX_DATA(FRE_MARK, P1MSEL8_1, P1MSEL7_0, PH2_FN),
- PINMUX_DATA(SCIF0_RXD_MARK, P1MSEL8_0, P1MSEL7_0, PH1_FN),
- PINMUX_DATA(HSPI_RX_MARK, P1MSEL8_0, P1MSEL7_1, PH1_FN),
- PINMUX_DATA(FRB_MARK, P1MSEL8_1, P1MSEL7_0, PH1_FN),
- PINMUX_DATA(SCIF0_TXD_MARK, P1MSEL8_0, P1MSEL7_0, PH0_FN),
- PINMUX_DATA(HSPI_TX_MARK, P1MSEL8_0, P1MSEL7_1, PH0_FN),
- PINMUX_DATA(FWE_MARK, P1MSEL8_1, P1MSEL7_0, PH0_FN),
-
- /* PJ FN */
- PINMUX_DATA(SCIF5_TXD_MARK, P1MSEL2_0, P1MSEL1_0, PJ7_FN),
- PINMUX_DATA(HAC1_SYNC_MARK, P1MSEL2_0, P1MSEL1_1, PJ7_FN),
- PINMUX_DATA(SSI1_WS_MARK, P1MSEL2_1, P1MSEL1_0, PJ7_FN),
- PINMUX_DATA(SIOF_TXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ6_FN),
- PINMUX_DATA(HAC0_SDOUT_MARK, P1MSEL4_0, P1MSEL3_1, PJ6_FN),
- PINMUX_DATA(SSI0_SDATA_MARK, P1MSEL4_1, P1MSEL3_0, PJ6_FN),
- PINMUX_DATA(SIOF_RXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ5_FN),
- PINMUX_DATA(HAC0_SDIN_MARK, P1MSEL4_0, P1MSEL3_1, PJ5_FN),
- PINMUX_DATA(SSI0_SCK_MARK, P1MSEL4_1, P1MSEL3_0, PJ5_FN),
- PINMUX_DATA(SIOF_SYNC_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ4_FN),
- PINMUX_DATA(HAC0_SYNC_MARK, P1MSEL4_0, P1MSEL3_1, PJ4_FN),
- PINMUX_DATA(SSI0_WS_MARK, P1MSEL4_1, P1MSEL3_0, PJ4_FN),
- PINMUX_DATA(SIOF_MCLK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ3_FN),
- PINMUX_DATA(HAC_RES_MARK, P1MSEL4_0, P1MSEL3_1, PJ3_FN),
- PINMUX_DATA(SIOF_SCK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ2_FN),
- PINMUX_DATA(HAC0_BITCLK_MARK, P1MSEL4_0, P1MSEL3_1, PJ2_FN),
- PINMUX_DATA(SSI0_CLK_MARK, P1MSEL4_1, P1MSEL3_0, PJ2_FN),
- PINMUX_DATA(HAC1_BITCLK_MARK, P1MSEL2_0, PJ1_FN),
- PINMUX_DATA(SSI1_CLK_MARK, P1MSEL2_1, P1MSEL1_0, PJ1_FN),
- PINMUX_DATA(TCLK_MARK, P1MSEL9_0, PJ0_FN),
- PINMUX_DATA(IOIS16_MARK, P1MSEL9_1, PJ0_FN),
-
- /* PK FN */
- PINMUX_DATA(STATUS0_MARK, P1MSEL15_0, PK7_FN),
- PINMUX_DATA(DRAK0_PK3_MARK, P1MSEL15_1, PK7_FN),
- PINMUX_DATA(STATUS1_MARK, P1MSEL15_0, PK6_FN),
- PINMUX_DATA(DRAK1_PK2_MARK, P1MSEL15_1, PK6_FN),
- PINMUX_DATA(DACK2_MARK, P1MSEL12_0, P1MSEL11_0, PK5_FN),
- PINMUX_DATA(SCIF2_TXD_MARK, P1MSEL12_1, P1MSEL11_0, PK5_FN),
- PINMUX_DATA(MMCCMD_MARK, P1MSEL12_1, P1MSEL11_1, PK5_FN),
- PINMUX_DATA(SIOF_TXD_PK_MARK, P2MSEL1_1,
- P1MSEL12_0, P1MSEL11_1, PK5_FN),
- PINMUX_DATA(DACK3_MARK, P1MSEL12_0, P1MSEL11_0, PK4_FN),
- PINMUX_DATA(SCIF2_SCK_MARK, P1MSEL12_1, P1MSEL11_0, PK4_FN),
- PINMUX_DATA(MMCDAT_MARK, P1MSEL12_1, P1MSEL11_1, PK4_FN),
- PINMUX_DATA(SIOF_SCK_PK_MARK, P2MSEL1_1,
- P1MSEL12_0, P1MSEL11_1, PK4_FN),
- PINMUX_DATA(DREQ0_MARK, PK3_FN),
- PINMUX_DATA(DREQ1_MARK, PK2_FN),
- PINMUX_DATA(DRAK0_PK1_MARK, PK1_FN),
- PINMUX_DATA(DRAK1_PK0_MARK, PK0_FN),
-
- /* PL FN */
- PINMUX_DATA(DREQ2_MARK, P1MSEL13_0, PL7_FN),
- PINMUX_DATA(INTB_MARK, P1MSEL13_1, PL7_FN),
- PINMUX_DATA(DREQ3_MARK, P1MSEL13_0, PL6_FN),
- PINMUX_DATA(INTC_MARK, P1MSEL13_1, PL6_FN),
- PINMUX_DATA(DRAK2_MARK, P1MSEL10_0, PL5_FN),
- PINMUX_DATA(CE2A_MARK, P1MSEL10_1, PL5_FN),
- PINMUX_DATA(IRL4_MARK, P1MSEL14_0, PL4_FN),
- PINMUX_DATA(FD4_MARK, P1MSEL14_1, PL4_FN),
- PINMUX_DATA(IRL5_MARK, P1MSEL14_0, PL3_FN),
- PINMUX_DATA(FD5_MARK, P1MSEL14_1, PL3_FN),
- PINMUX_DATA(IRL6_MARK, P1MSEL14_0, PL2_FN),
- PINMUX_DATA(FD6_MARK, P1MSEL14_1, PL2_FN),
- PINMUX_DATA(IRL7_MARK, P1MSEL14_0, PL1_FN),
- PINMUX_DATA(FD7_MARK, P1MSEL14_1, PL1_FN),
- PINMUX_DATA(DRAK3_MARK, P1MSEL10_0, PL0_FN),
- PINMUX_DATA(CE2B_MARK, P1MSEL10_1, PL0_FN),
-
- /* PM FN */
- PINMUX_DATA(BREQ_BSACK_MARK, PM1_FN),
- PINMUX_DATA(BACK_BSREQ_MARK, PM0_FN),
-
- /* PN FN */
- PINMUX_DATA(SCIF5_RXD_MARK, P1MSEL2_0, P1MSEL1_0, PN7_FN),
- PINMUX_DATA(HAC1_SDIN_MARK, P1MSEL2_0, P1MSEL1_1, PN7_FN),
- PINMUX_DATA(SSI1_SCK_MARK, P1MSEL2_1, P1MSEL1_0, PN7_FN),
- PINMUX_DATA(SCIF5_SCK_MARK, P1MSEL2_0, P1MSEL1_0, PN6_FN),
- PINMUX_DATA(HAC1_SDOUT_MARK, P1MSEL2_0, P1MSEL1_1, PN6_FN),
- PINMUX_DATA(SSI1_SDATA_MARK, P1MSEL2_1, P1MSEL1_0, PN6_FN),
- PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL0_0, PN5_FN),
- PINMUX_DATA(FCLE_MARK, P1MSEL0_1, PN5_FN),
- PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL0_0, PN4_FN),
- PINMUX_DATA(FALE_MARK, P1MSEL0_1, PN4_FN),
- PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL0_0, PN3_FN),
- PINMUX_DATA(FD0_MARK, P1MSEL0_1, PN3_FN),
- PINMUX_DATA(SCIF4_TXD_MARK, P1MSEL0_0, PN2_FN),
- PINMUX_DATA(FD1_MARK, P1MSEL0_1, PN2_FN),
- PINMUX_DATA(SCIF4_RXD_MARK, P1MSEL0_0, PN1_FN),
- PINMUX_DATA(FD2_MARK, P1MSEL0_1, PN1_FN),
- PINMUX_DATA(SCIF4_SCK_MARK, P1MSEL0_0, PN0_FN),
- PINMUX_DATA(FD3_MARK, P1MSEL0_1, PN0_FN),
-
- /* PP FN */
- PINMUX_DATA(DEVSEL_DCLKOUT_MARK, PP5_FN),
- PINMUX_DATA(STOP_CDE_MARK, PP4_FN),
- PINMUX_DATA(LOCK_ODDF_MARK, PP3_FN),
- PINMUX_DATA(TRDY_DISPL_MARK, PP2_FN),
- PINMUX_DATA(IRDY_HSYNC_MARK, PP1_FN),
- PINMUX_DATA(PCIFRAME_VSYNC_MARK, PP0_FN),
-
- /* PQ FN */
- PINMUX_DATA(INTA_MARK, PQ4_FN),
- PINMUX_DATA(GNT0_GNTIN_MARK, PQ3_FN),
- PINMUX_DATA(REQ0_REQOUT_MARK, PQ2_FN),
- PINMUX_DATA(PERR_MARK, PQ1_FN),
- PINMUX_DATA(SERR_MARK, PQ0_FN),
-
- /* PR FN */
- PINMUX_DATA(WE7_CBE3_MARK, PR3_FN),
- PINMUX_DATA(WE6_CBE2_MARK, PR2_FN),
- PINMUX_DATA(WE5_CBE1_MARK, PR1_FN),
- PINMUX_DATA(WE4_CBE0_MARK, PR0_FN),
-
- /* MISC FN */
- PINMUX_DATA(SCIF2_RXD_MARK, P1MSEL6_0, P1MSEL5_0),
- PINMUX_DATA(SIOF_RXD_MARK, P2MSEL1_1, P1MSEL6_1, P1MSEL5_0),
- PINMUX_DATA(MRESETOUT_MARK, P2MSEL2_0),
- PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- /* PA */
- PINMUX_GPIO(GPIO_PA7, PA7_DATA),
- PINMUX_GPIO(GPIO_PA6, PA6_DATA),
- PINMUX_GPIO(GPIO_PA5, PA5_DATA),
- PINMUX_GPIO(GPIO_PA4, PA4_DATA),
- PINMUX_GPIO(GPIO_PA3, PA3_DATA),
- PINMUX_GPIO(GPIO_PA2, PA2_DATA),
- PINMUX_GPIO(GPIO_PA1, PA1_DATA),
- PINMUX_GPIO(GPIO_PA0, PA0_DATA),
-
- /* PB */
- PINMUX_GPIO(GPIO_PB7, PB7_DATA),
- PINMUX_GPIO(GPIO_PB6, PB6_DATA),
- PINMUX_GPIO(GPIO_PB5, PB5_DATA),
- PINMUX_GPIO(GPIO_PB4, PB4_DATA),
- PINMUX_GPIO(GPIO_PB3, PB3_DATA),
- PINMUX_GPIO(GPIO_PB2, PB2_DATA),
- PINMUX_GPIO(GPIO_PB1, PB1_DATA),
- PINMUX_GPIO(GPIO_PB0, PB0_DATA),
-
- /* PC */
- PINMUX_GPIO(GPIO_PC7, PC7_DATA),
- PINMUX_GPIO(GPIO_PC6, PC6_DATA),
- PINMUX_GPIO(GPIO_PC5, PC5_DATA),
- PINMUX_GPIO(GPIO_PC4, PC4_DATA),
- PINMUX_GPIO(GPIO_PC3, PC3_DATA),
- PINMUX_GPIO(GPIO_PC2, PC2_DATA),
- PINMUX_GPIO(GPIO_PC1, PC1_DATA),
- PINMUX_GPIO(GPIO_PC0, PC0_DATA),
-
- /* PD */
- PINMUX_GPIO(GPIO_PD7, PD7_DATA),
- PINMUX_GPIO(GPIO_PD6, PD6_DATA),
- PINMUX_GPIO(GPIO_PD5, PD5_DATA),
- PINMUX_GPIO(GPIO_PD4, PD4_DATA),
- PINMUX_GPIO(GPIO_PD3, PD3_DATA),
- PINMUX_GPIO(GPIO_PD2, PD2_DATA),
- PINMUX_GPIO(GPIO_PD1, PD1_DATA),
- PINMUX_GPIO(GPIO_PD0, PD0_DATA),
-
- /* PE */
- PINMUX_GPIO(GPIO_PE5, PE5_DATA),
- PINMUX_GPIO(GPIO_PE4, PE4_DATA),
- PINMUX_GPIO(GPIO_PE3, PE3_DATA),
- PINMUX_GPIO(GPIO_PE2, PE2_DATA),
- PINMUX_GPIO(GPIO_PE1, PE1_DATA),
- PINMUX_GPIO(GPIO_PE0, PE0_DATA),
-
- /* PF */
- PINMUX_GPIO(GPIO_PF7, PF7_DATA),
- PINMUX_GPIO(GPIO_PF6, PF6_DATA),
- PINMUX_GPIO(GPIO_PF5, PF5_DATA),
- PINMUX_GPIO(GPIO_PF4, PF4_DATA),
- PINMUX_GPIO(GPIO_PF3, PF3_DATA),
- PINMUX_GPIO(GPIO_PF2, PF2_DATA),
- PINMUX_GPIO(GPIO_PF1, PF1_DATA),
- PINMUX_GPIO(GPIO_PF0, PF0_DATA),
-
- /* PG */
- PINMUX_GPIO(GPIO_PG7, PG7_DATA),
- PINMUX_GPIO(GPIO_PG6, PG6_DATA),
- PINMUX_GPIO(GPIO_PG5, PG5_DATA),
- PINMUX_GPIO(GPIO_PG4, PG4_DATA),
- PINMUX_GPIO(GPIO_PG3, PG3_DATA),
- PINMUX_GPIO(GPIO_PG2, PG2_DATA),
- PINMUX_GPIO(GPIO_PG1, PG1_DATA),
- PINMUX_GPIO(GPIO_PG0, PG0_DATA),
-
- /* PH */
- PINMUX_GPIO(GPIO_PH7, PH7_DATA),
- PINMUX_GPIO(GPIO_PH6, PH6_DATA),
- PINMUX_GPIO(GPIO_PH5, PH5_DATA),
- PINMUX_GPIO(GPIO_PH4, PH4_DATA),
- PINMUX_GPIO(GPIO_PH3, PH3_DATA),
- PINMUX_GPIO(GPIO_PH2, PH2_DATA),
- PINMUX_GPIO(GPIO_PH1, PH1_DATA),
- PINMUX_GPIO(GPIO_PH0, PH0_DATA),
-
- /* PJ */
- PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
- PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
- PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
- PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
- PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
- PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
- PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
- PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
-
- /* PK */
- PINMUX_GPIO(GPIO_PK7, PK7_DATA),
- PINMUX_GPIO(GPIO_PK6, PK6_DATA),
- PINMUX_GPIO(GPIO_PK5, PK5_DATA),
- PINMUX_GPIO(GPIO_PK4, PK4_DATA),
- PINMUX_GPIO(GPIO_PK3, PK3_DATA),
- PINMUX_GPIO(GPIO_PK2, PK2_DATA),
- PINMUX_GPIO(GPIO_PK1, PK1_DATA),
- PINMUX_GPIO(GPIO_PK0, PK0_DATA),
-
- /* PL */
- PINMUX_GPIO(GPIO_PL7, PL7_DATA),
- PINMUX_GPIO(GPIO_PL6, PL6_DATA),
- PINMUX_GPIO(GPIO_PL5, PL5_DATA),
- PINMUX_GPIO(GPIO_PL4, PL4_DATA),
- PINMUX_GPIO(GPIO_PL3, PL3_DATA),
- PINMUX_GPIO(GPIO_PL2, PL2_DATA),
- PINMUX_GPIO(GPIO_PL1, PL1_DATA),
- PINMUX_GPIO(GPIO_PL0, PL0_DATA),
-
- /* PM */
- PINMUX_GPIO(GPIO_PM1, PM1_DATA),
- PINMUX_GPIO(GPIO_PM0, PM0_DATA),
-
- /* PN */
- PINMUX_GPIO(GPIO_PN7, PN7_DATA),
- PINMUX_GPIO(GPIO_PN6, PN6_DATA),
- PINMUX_GPIO(GPIO_PN5, PN5_DATA),
- PINMUX_GPIO(GPIO_PN4, PN4_DATA),
- PINMUX_GPIO(GPIO_PN3, PN3_DATA),
- PINMUX_GPIO(GPIO_PN2, PN2_DATA),
- PINMUX_GPIO(GPIO_PN1, PN1_DATA),
- PINMUX_GPIO(GPIO_PN0, PN0_DATA),
-
- /* PP */
- PINMUX_GPIO(GPIO_PP5, PP5_DATA),
- PINMUX_GPIO(GPIO_PP4, PP4_DATA),
- PINMUX_GPIO(GPIO_PP3, PP3_DATA),
- PINMUX_GPIO(GPIO_PP2, PP2_DATA),
- PINMUX_GPIO(GPIO_PP1, PP1_DATA),
- PINMUX_GPIO(GPIO_PP0, PP0_DATA),
-
- /* PQ */
- PINMUX_GPIO(GPIO_PQ4, PQ4_DATA),
- PINMUX_GPIO(GPIO_PQ3, PQ3_DATA),
- PINMUX_GPIO(GPIO_PQ2, PQ2_DATA),
- PINMUX_GPIO(GPIO_PQ1, PQ1_DATA),
- PINMUX_GPIO(GPIO_PQ0, PQ0_DATA),
-
- /* PR */
- PINMUX_GPIO(GPIO_PR3, PR3_DATA),
- PINMUX_GPIO(GPIO_PR2, PR2_DATA),
- PINMUX_GPIO(GPIO_PR1, PR1_DATA),
- PINMUX_GPIO(GPIO_PR0, PR0_DATA),
-
- /* FN */
- PINMUX_GPIO(GPIO_FN_D63_AD31, D63_AD31_MARK),
- PINMUX_GPIO(GPIO_FN_D62_AD30, D62_AD30_MARK),
- PINMUX_GPIO(GPIO_FN_D61_AD29, D61_AD29_MARK),
- PINMUX_GPIO(GPIO_FN_D60_AD28, D60_AD28_MARK),
- PINMUX_GPIO(GPIO_FN_D59_AD27, D59_AD27_MARK),
- PINMUX_GPIO(GPIO_FN_D58_AD26, D58_AD26_MARK),
- PINMUX_GPIO(GPIO_FN_D57_AD25, D57_AD25_MARK),
- PINMUX_GPIO(GPIO_FN_D56_AD24, D56_AD24_MARK),
- PINMUX_GPIO(GPIO_FN_D55_AD23, D55_AD23_MARK),
- PINMUX_GPIO(GPIO_FN_D54_AD22, D54_AD22_MARK),
- PINMUX_GPIO(GPIO_FN_D53_AD21, D53_AD21_MARK),
- PINMUX_GPIO(GPIO_FN_D52_AD20, D52_AD20_MARK),
- PINMUX_GPIO(GPIO_FN_D51_AD19, D51_AD19_MARK),
- PINMUX_GPIO(GPIO_FN_D50_AD18, D50_AD18_MARK),
- PINMUX_GPIO(GPIO_FN_D49_AD17_DB5, D49_AD17_DB5_MARK),
- PINMUX_GPIO(GPIO_FN_D48_AD16_DB4, D48_AD16_DB4_MARK),
- PINMUX_GPIO(GPIO_FN_D47_AD15_DB3, D47_AD15_DB3_MARK),
- PINMUX_GPIO(GPIO_FN_D46_AD14_DB2, D46_AD14_DB2_MARK),
- PINMUX_GPIO(GPIO_FN_D45_AD13_DB1, D45_AD13_DB1_MARK),
- PINMUX_GPIO(GPIO_FN_D44_AD12_DB0, D44_AD12_DB0_MARK),
- PINMUX_GPIO(GPIO_FN_D43_AD11_DG5, D43_AD11_DG5_MARK),
- PINMUX_GPIO(GPIO_FN_D42_AD10_DG4, D42_AD10_DG4_MARK),
- PINMUX_GPIO(GPIO_FN_D41_AD9_DG3, D41_AD9_DG3_MARK),
- PINMUX_GPIO(GPIO_FN_D40_AD8_DG2, D40_AD8_DG2_MARK),
- PINMUX_GPIO(GPIO_FN_D39_AD7_DG1, D39_AD7_DG1_MARK),
- PINMUX_GPIO(GPIO_FN_D38_AD6_DG0, D38_AD6_DG0_MARK),
- PINMUX_GPIO(GPIO_FN_D37_AD5_DR5, D37_AD5_DR5_MARK),
- PINMUX_GPIO(GPIO_FN_D36_AD4_DR4, D36_AD4_DR4_MARK),
- PINMUX_GPIO(GPIO_FN_D35_AD3_DR3, D35_AD3_DR3_MARK),
- PINMUX_GPIO(GPIO_FN_D34_AD2_DR2, D34_AD2_DR2_MARK),
- PINMUX_GPIO(GPIO_FN_D33_AD1_DR1, D33_AD1_DR1_MARK),
- PINMUX_GPIO(GPIO_FN_D32_AD0_DR0, D32_AD0_DR0_MARK),
- PINMUX_GPIO(GPIO_FN_REQ1, REQ1_MARK),
- PINMUX_GPIO(GPIO_FN_REQ2, REQ2_MARK),
- PINMUX_GPIO(GPIO_FN_REQ3, REQ3_MARK),
- PINMUX_GPIO(GPIO_FN_GNT1, GNT1_MARK),
- PINMUX_GPIO(GPIO_FN_GNT2, GNT2_MARK),
- PINMUX_GPIO(GPIO_FN_GNT3, GNT3_MARK),
- PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
- PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
- PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
- PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
- PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
- PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
- PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
- PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
- PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
- PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
- PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
- PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
- PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
- PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
- PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
- PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
- PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
- PINMUX_GPIO(GPIO_FN_INTD, INTD_MARK),
- PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK),
- PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_FRE, FRE_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK),
- PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK),
- PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_TXD_PJ, SIOF_TXD_PJ_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_RXD_PJ, SIOF_RXD_PJ_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_SYNC_PJ, SIOF_SYNC_PJ_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_MCLK_PJ, SIOF_MCLK_PJ_MARK),
- PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_SCK_PJ, SIOF_SCK_PJ_MARK),
- PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK),
- PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
- PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
- PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK0_PK3, DRAK0_PK3_MARK),
- PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK1_PK2, DRAK1_PK2_MARK),
- PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_TXD_PK, SIOF_TXD_PK_MARK),
- PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT, MMCDAT_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_SCK_PK, SIOF_SCK_PK_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK0_PK1, DRAK0_PK1_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK1_PK0, DRAK1_PK0_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
- PINMUX_GPIO(GPIO_FN_INTB, INTB_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
- PINMUX_GPIO(GPIO_FN_INTC, INTC_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
- PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
- PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK),
- PINMUX_GPIO(GPIO_FN_FD4, FD4_MARK),
- PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK),
- PINMUX_GPIO(GPIO_FN_FD5, FD5_MARK),
- PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK),
- PINMUX_GPIO(GPIO_FN_FD6, FD6_MARK),
- PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK),
- PINMUX_GPIO(GPIO_FN_FD7, FD7_MARK),
- PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
- PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
- PINMUX_GPIO(GPIO_FN_BREQ_BSACK, BREQ_BSACK_MARK),
- PINMUX_GPIO(GPIO_FN_BACK_BSREQ, BACK_BSREQ_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_FD0, FD0_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_FD1, FD1_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_FD2, FD2_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_FD3, FD3_MARK),
- PINMUX_GPIO(GPIO_FN_DEVSEL_DCLKOUT, DEVSEL_DCLKOUT_MARK),
- PINMUX_GPIO(GPIO_FN_STOP_CDE, STOP_CDE_MARK),
- PINMUX_GPIO(GPIO_FN_LOCK_ODDF, LOCK_ODDF_MARK),
- PINMUX_GPIO(GPIO_FN_TRDY_DISPL, TRDY_DISPL_MARK),
- PINMUX_GPIO(GPIO_FN_IRDY_HSYNC, IRDY_HSYNC_MARK),
- PINMUX_GPIO(GPIO_FN_PCIFRAME_VSYNC, PCIFRAME_VSYNC_MARK),
- PINMUX_GPIO(GPIO_FN_INTA, INTA_MARK),
- PINMUX_GPIO(GPIO_FN_GNT0_GNTIN, GNT0_GNTIN_MARK),
- PINMUX_GPIO(GPIO_FN_REQ0_REQOUT, REQ0_REQOUT_MARK),
- PINMUX_GPIO(GPIO_FN_PERR, PERR_MARK),
- PINMUX_GPIO(GPIO_FN_SERR, SERR_MARK),
- PINMUX_GPIO(GPIO_FN_WE7_CBE3, WE7_CBE3_MARK),
- PINMUX_GPIO(GPIO_FN_WE6_CBE2, WE6_CBE2_MARK),
- PINMUX_GPIO(GPIO_FN_WE5_CBE1, WE5_CBE1_MARK),
- PINMUX_GPIO(GPIO_FN_WE4_CBE0, WE4_CBE0_MARK),
- PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_SIOF_RXD, SIOF_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_MRESETOUT, MRESETOUT_MARK),
- PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) {
- PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
- PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
- PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
- PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
- PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
- PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
- PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
- PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
- },
- { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2) {
- PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
- PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
- PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
- PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
- PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
- PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
- PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
- PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
- },
- { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2) {
- PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
- PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
- PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
- PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
- PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
- PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
- PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
- PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
- },
- { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2) {
- PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
- PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
- PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
- PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
- PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
- PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
- PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
- PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
- },
- { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
- PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
- PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
- PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
- PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
- PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU }
- },
- { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2) {
- PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
- PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
- PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
- PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
- PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
- PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
- PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
- PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
- },
- { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2) {
- PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
- PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
- PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
- PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
- PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
- PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
- PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
- PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU }
- },
- { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2) {
- PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
- PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
- PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
- PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
- PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
- PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
- PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
- PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
- },
- { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2) {
- PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
- PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
- PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
- PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
- PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
- PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
- PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
- PJ0_FN, PJ0_OUT, PJ0_IN, PJ0_IN_PU }
- },
- { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2) {
- PK7_FN, PK7_OUT, PK7_IN, PK7_IN_PU,
- PK6_FN, PK6_OUT, PK6_IN, PK6_IN_PU,
- PK5_FN, PK5_OUT, PK5_IN, PK5_IN_PU,
- PK4_FN, PK4_OUT, PK4_IN, PK4_IN_PU,
- PK3_FN, PK3_OUT, PK3_IN, PK3_IN_PU,
- PK2_FN, PK2_OUT, PK2_IN, PK2_IN_PU,
- PK1_FN, PK1_OUT, PK1_IN, PK1_IN_PU,
- PK0_FN, PK0_OUT, PK0_IN, PK0_IN_PU }
- },
- { PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2) {
- PL7_FN, PL7_OUT, PL7_IN, PL7_IN_PU,
- PL6_FN, PL6_OUT, PL6_IN, PL6_IN_PU,
- PL5_FN, PL5_OUT, PL5_IN, PL5_IN_PU,
- PL4_FN, PL4_OUT, PL4_IN, PL4_IN_PU,
- PL3_FN, PL3_OUT, PL3_IN, PL3_IN_PU,
- PL2_FN, PL2_OUT, PL2_IN, PL2_IN_PU,
- PL1_FN, PL1_OUT, PL1_IN, PL1_IN_PU,
- PL0_FN, PL0_OUT, PL0_IN, PL0_IN_PU }
- },
- { PINMUX_CFG_REG("PMCR", 0xffe70016, 16, 2) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PM1_FN, PM1_OUT, PM1_IN, PM1_IN_PU,
- PM0_FN, PM0_OUT, PM0_IN, PM0_IN_PU }
- },
- { PINMUX_CFG_REG("PNCR", 0xffe70018, 16, 2) {
- PN7_FN, PN7_OUT, PN7_IN, PN7_IN_PU,
- PN6_FN, PN6_OUT, PN6_IN, PN6_IN_PU,
- PN5_FN, PN5_OUT, PN5_IN, PN5_IN_PU,
- PN4_FN, PN4_OUT, PN4_IN, PN4_IN_PU,
- PN3_FN, PN3_OUT, PN3_IN, PN3_IN_PU,
- PN2_FN, PN2_OUT, PN2_IN, PN2_IN_PU,
- PN1_FN, PN1_OUT, PN1_IN, PN1_IN_PU,
- PN0_FN, PN0_OUT, PN0_IN, PN0_IN_PU }
- },
- { PINMUX_CFG_REG("PPCR", 0xffe7001a, 16, 2) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PP5_FN, PP5_OUT, PP5_IN, PP5_IN_PU,
- PP4_FN, PP4_OUT, PP4_IN, PP4_IN_PU,
- PP3_FN, PP3_OUT, PP3_IN, PP3_IN_PU,
- PP2_FN, PP2_OUT, PP2_IN, PP2_IN_PU,
- PP1_FN, PP1_OUT, PP1_IN, PP1_IN_PU,
- PP0_FN, PP0_OUT, PP0_IN, PP0_IN_PU }
- },
- { PINMUX_CFG_REG("PQCR", 0xffe7001c, 16, 2) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PQ4_FN, PQ4_OUT, PQ4_IN, PQ4_IN_PU,
- PQ3_FN, PQ3_OUT, PQ3_IN, PQ3_IN_PU,
- PQ2_FN, PQ2_OUT, PQ2_IN, PQ2_IN_PU,
- PQ1_FN, PQ1_OUT, PQ1_IN, PQ1_IN_PU,
- PQ0_FN, PQ0_OUT, PQ0_IN, PQ0_IN_PU }
- },
- { PINMUX_CFG_REG("PRCR", 0xffe7001e, 16, 2) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- PR3_FN, PR3_OUT, PR3_IN, PR3_IN_PU,
- PR2_FN, PR2_OUT, PR2_IN, PR2_IN_PU,
- PR1_FN, PR1_OUT, PR1_IN, PR1_IN_PU,
- PR0_FN, PR0_OUT, PR0_IN, PR0_IN_PU }
- },
- { PINMUX_CFG_REG("P1MSELR", 0xffe70080, 16, 1) {
- P1MSEL15_0, P1MSEL15_1,
- P1MSEL14_0, P1MSEL14_1,
- P1MSEL13_0, P1MSEL13_1,
- P1MSEL12_0, P1MSEL12_1,
- P1MSEL11_0, P1MSEL11_1,
- P1MSEL10_0, P1MSEL10_1,
- P1MSEL9_0, P1MSEL9_1,
- P1MSEL8_0, P1MSEL8_1,
- P1MSEL7_0, P1MSEL7_1,
- P1MSEL6_0, P1MSEL6_1,
- P1MSEL5_0, 0,
- P1MSEL4_0, P1MSEL4_1,
- P1MSEL3_0, P1MSEL3_1,
- P1MSEL2_0, P1MSEL2_1,
- P1MSEL1_0, P1MSEL1_1,
- P1MSEL0_0, P1MSEL0_1 }
- },
- { PINMUX_CFG_REG("P2MSELR", 0xffe70082, 16, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- P2MSEL2_0, P2MSEL2_1,
- P2MSEL1_0, P2MSEL1_1,
- P2MSEL0_0, P2MSEL0_1 }
- },
- {}
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xffe70020, 8) {
- PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
- PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
- },
- { PINMUX_DATA_REG("PBDR", 0xffe70022, 8) {
- PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
- PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
- },
- { PINMUX_DATA_REG("PCDR", 0xffe70024, 8) {
- PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
- PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
- },
- { PINMUX_DATA_REG("PDDR", 0xffe70026, 8) {
- PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
- PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
- },
- { PINMUX_DATA_REG("PEDR", 0xffe70028, 8) {
- 0, 0, PE5_DATA, PE4_DATA,
- PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
- },
- { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8) {
- PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
- PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
- },
- { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8) {
- PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
- PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
- },
- { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8) {
- PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
- PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
- },
- { PINMUX_DATA_REG("PJDR", 0xffe70030, 8) {
- PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
- PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
- },
- { PINMUX_DATA_REG("PKDR", 0xffe70032, 8) {
- PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
- PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
- },
- { PINMUX_DATA_REG("PLDR", 0xffe70034, 8) {
- PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
- PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA }
- },
- { PINMUX_DATA_REG("PMDR", 0xffe70036, 8) {
- 0, 0, 0, 0,
- 0, 0, PM1_DATA, PM0_DATA }
- },
- { PINMUX_DATA_REG("PNDR", 0xffe70038, 8) {
- PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
- PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA }
- },
- { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8) {
- 0, 0, PP5_DATA, PP4_DATA,
- PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA }
- },
- { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8) {
- 0, 0, 0, PQ4_DATA,
- PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA }
- },
- { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8) {
- 0, 0, 0, 0,
- PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA }
- },
- { },
-};
-
-static struct pinmux_info sh7785_pinmux_info = {
- .name = "sh7785_pfc",
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_PA7,
- .last_gpio = GPIO_FN_IRQOUT,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
static int __init plat_pinmux_setup(void)
{
- return sh_pfc_register_info(NULL, NULL, 0, &sh7785_pinmux_info);
+ return sh_pfc_register("pfc-sh7785", NULL, 0);
}
arch_initcall(plat_pinmux_setup);
--
1.7.8.6
^ permalink raw reply related
* [PATCH v3 75/81] sh: sh7757: pinmux: Use driver-provided pinmux info
From: Laurent Pinchart @ 2012-12-15 22:51 UTC (permalink / raw)
To: linux-sh
Pinmux info for the sh machines is now provided by pinmux drivers.
Remove the duplicate copy in arch code.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c | 2266 +------------------------------
1 files changed, 1 insertions(+), 2265 deletions(-)
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
index 784b428..cda6bd1 100644
--- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7757.c
@@ -15,2274 +15,10 @@
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/gpio.h>
#include <cpu/pfc.h>
-#include <cpu/sh7757.h>
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
- PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
- PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
- PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
- PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
- PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
- PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
- PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
- PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
- PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
- PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA,
- PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
- PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
- PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
- PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
- PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
- PTN6_DATA, PTN5_DATA, PTN4_DATA,
- PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
- PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
- PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA,
- PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
- PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
- PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
- PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
- PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
- PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
- PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
- PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
- PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
- PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
- PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
- PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
- PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
- PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
- PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
- PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
- PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
- PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
- PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
- PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
- PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
- PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
- PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
- PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
- PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN,
- PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
- PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
- PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
- PTG7_IN, PTG6_IN, PTG5_IN, PTG4_IN,
- PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
- PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
- PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
- PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN,
- PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN,
- PTJ6_IN, PTJ5_IN, PTJ4_IN,
- PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
- PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
- PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
- PTL6_IN, PTL5_IN, PTL4_IN,
- PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
- PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
- PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
- PTN6_IN, PTN5_IN, PTN4_IN,
- PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
- PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN,
- PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN,
- PTP7_IN, PTP6_IN, PTP5_IN, PTP4_IN,
- PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
- PTQ6_IN, PTQ5_IN, PTQ4_IN,
- PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
- PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
- PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
- PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
- PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
- PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN,
- PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
- PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
- PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
- PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
- PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
- PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
- PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
- PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
- PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
- PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
- PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
- PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
- PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
- PINMUX_INPUT_END,
-
- PINMUX_INPUT_PULLUP_BEGIN,
- PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
- PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
- PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
- PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
- PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
- PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
- PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
- PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
- PTG7_IN_PU, PTG6_IN_PU, PTG4_IN_PU,
- PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
- PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
- PTI7_IN_PU, PTI6_IN_PU, PTI4_IN_PU,
- PTI3_IN_PU, PTI2_IN_PU, PTI1_IN_PU, PTI0_IN_PU,
- PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
- PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
- PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
- PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
- PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
- PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
- PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
- PTN4_IN_PU,
- PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
- PTO7_IN_PU, PTO6_IN_PU, PTO5_IN_PU, PTO4_IN_PU,
- PTO3_IN_PU, PTO2_IN_PU, PTO1_IN_PU, PTO0_IN_PU,
- PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
- PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
- PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
- PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
- PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
- PTV3_IN_PU, PTV2_IN_PU,
- PTW1_IN_PU, PTW0_IN_PU,
- PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
- PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
- PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
- PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
- PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
- PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
- PINMUX_INPUT_PULLUP_END,
-
- PINMUX_OUTPUT_BEGIN,
- PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
- PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
- PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
- PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
- PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
- PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
- PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
- PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
- PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT,
- PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
- PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
- PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
- PTG7_OUT, PTG6_OUT, PTG5_OUT, PTG4_OUT,
- PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
- PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
- PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
- PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT,
- PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT,
- PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
- PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
- PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
- PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
- PTL6_OUT, PTL5_OUT, PTL4_OUT,
- PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
- PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
- PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
- PTN6_OUT, PTN5_OUT, PTN4_OUT,
- PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
- PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT,
- PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT,
- PTP7_OUT, PTP6_OUT, PTP5_OUT, PTP4_OUT,
- PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
- PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
- PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
- PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
- PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
- PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
- PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
- PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT,
- PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
- PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
- PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
- PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
- PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
- PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
- PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
- PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
- PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
- PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
- PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
- PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
- PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
- PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
- PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
- PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
- PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
- PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
- PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
- PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
- PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN,
- PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
- PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
- PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
- PTG7_FN, PTG6_FN, PTG5_FN, PTG4_FN,
- PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
- PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
- PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
- PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN,
- PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN,
- PTJ6_FN, PTJ5_FN, PTJ4_FN,
- PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
- PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
- PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
- PTL6_FN, PTL5_FN, PTL4_FN,
- PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
- PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
- PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
- PTN6_FN, PTN5_FN, PTN4_FN,
- PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
- PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN,
- PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN,
- PTP7_FN, PTP6_FN, PTP5_FN, PTP4_FN,
- PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
- PTQ6_FN, PTQ5_FN, PTQ4_FN,
- PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
- PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
- PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
- PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
- PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
- PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN,
- PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
- PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
- PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
- PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
- PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
- PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
- PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
- PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
- PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
- PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
- PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
- PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
- PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
-
- PS0_15_FN1, PS0_15_FN2,
- PS0_14_FN1, PS0_14_FN2,
- PS0_13_FN1, PS0_13_FN2,
- PS0_12_FN1, PS0_12_FN2,
- PS0_11_FN1, PS0_11_FN2,
- PS0_10_FN1, PS0_10_FN2,
- PS0_9_FN1, PS0_9_FN2,
- PS0_8_FN1, PS0_8_FN2,
- PS0_7_FN1, PS0_7_FN2,
- PS0_6_FN1, PS0_6_FN2,
- PS0_5_FN1, PS0_5_FN2,
- PS0_4_FN1, PS0_4_FN2,
- PS0_3_FN1, PS0_3_FN2,
- PS0_2_FN1, PS0_2_FN2,
-
- PS1_10_FN1, PS1_10_FN2,
- PS1_9_FN1, PS1_9_FN2,
- PS1_8_FN1, PS1_8_FN2,
- PS1_2_FN1, PS1_2_FN2,
-
- PS2_13_FN1, PS2_13_FN2,
- PS2_12_FN1, PS2_12_FN2,
- PS2_7_FN1, PS2_7_FN2,
- PS2_6_FN1, PS2_6_FN2,
- PS2_5_FN1, PS2_5_FN2,
- PS2_4_FN1, PS2_4_FN2,
- PS2_2_FN1, PS2_2_FN2,
-
- PS3_15_FN1, PS3_15_FN2,
- PS3_14_FN1, PS3_14_FN2,
- PS3_13_FN1, PS3_13_FN2,
- PS3_12_FN1, PS3_12_FN2,
- PS3_11_FN1, PS3_11_FN2,
- PS3_10_FN1, PS3_10_FN2,
- PS3_9_FN1, PS3_9_FN2,
- PS3_8_FN1, PS3_8_FN2,
- PS3_7_FN1, PS3_7_FN2,
- PS3_2_FN1, PS3_2_FN2,
- PS3_1_FN1, PS3_1_FN2,
-
- PS4_14_FN1, PS4_14_FN2,
- PS4_13_FN1, PS4_13_FN2,
- PS4_12_FN1, PS4_12_FN2,
- PS4_10_FN1, PS4_10_FN2,
- PS4_9_FN1, PS4_9_FN2,
- PS4_8_FN1, PS4_8_FN2,
- PS4_4_FN1, PS4_4_FN2,
- PS4_3_FN1, PS4_3_FN2,
- PS4_2_FN1, PS4_2_FN2,
- PS4_1_FN1, PS4_1_FN2,
- PS4_0_FN1, PS4_0_FN2,
-
- PS5_11_FN1, PS5_11_FN2,
- PS5_10_FN1, PS5_10_FN2,
- PS5_9_FN1, PS5_9_FN2,
- PS5_8_FN1, PS5_8_FN2,
- PS5_7_FN1, PS5_7_FN2,
- PS5_6_FN1, PS5_6_FN2,
- PS5_5_FN1, PS5_5_FN2,
- PS5_4_FN1, PS5_4_FN2,
- PS5_3_FN1, PS5_3_FN2,
- PS5_2_FN1, PS5_2_FN2,
-
- PS6_15_FN1, PS6_15_FN2,
- PS6_14_FN1, PS6_14_FN2,
- PS6_13_FN1, PS6_13_FN2,
- PS6_12_FN1, PS6_12_FN2,
- PS6_11_FN1, PS6_11_FN2,
- PS6_10_FN1, PS6_10_FN2,
- PS6_9_FN1, PS6_9_FN2,
- PS6_8_FN1, PS6_8_FN2,
- PS6_7_FN1, PS6_7_FN2,
- PS6_6_FN1, PS6_6_FN2,
- PS6_5_FN1, PS6_5_FN2,
- PS6_4_FN1, PS6_4_FN2,
- PS6_3_FN1, PS6_3_FN2,
- PS6_2_FN1, PS6_2_FN2,
- PS6_1_FN1, PS6_1_FN2,
- PS6_0_FN1, PS6_0_FN2,
-
- PS7_15_FN1, PS7_15_FN2,
- PS7_14_FN1, PS7_14_FN2,
- PS7_13_FN1, PS7_13_FN2,
- PS7_12_FN1, PS7_12_FN2,
- PS7_11_FN1, PS7_11_FN2,
- PS7_10_FN1, PS7_10_FN2,
- PS7_9_FN1, PS7_9_FN2,
- PS7_8_FN1, PS7_8_FN2,
- PS7_7_FN1, PS7_7_FN2,
- PS7_6_FN1, PS7_6_FN2,
- PS7_5_FN1, PS7_5_FN2,
- PS7_4_FN1, PS7_4_FN2,
-
- PS8_15_FN1, PS8_15_FN2,
- PS8_14_FN1, PS8_14_FN2,
- PS8_13_FN1, PS8_13_FN2,
- PS8_12_FN1, PS8_12_FN2,
- PS8_11_FN1, PS8_11_FN2,
- PS8_10_FN1, PS8_10_FN2,
- PS8_9_FN1, PS8_9_FN2,
- PS8_8_FN1, PS8_8_FN2,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- /* PTA (mobule: LBSC, RGMII) */
- BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK,
- ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK,
-
- /* PTB (mobule: INTC, ONFI, TMU) */
- IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK,
- IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK,
- ON_NRE_MARK, ON_NWE_MARK, ON_NWP_MARK, ON_NCE0_MARK,
- ON_R_B0_MARK, ON_ALE_MARK, ON_CLE_MARK, TCLK_MARK,
-
- /* PTC (mobule: IRQ, PWMU) */
- IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK,
- IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
- PWMU0_MARK, PWMU1_MARK, PWMU2_MARK, PWMU3_MARK,
- PWMU4_MARK, PWMU5_MARK,
-
- /* PTD (mobule: SPI0, DMAC) */
- SP0_MOSI_MARK, SP0_MISO_MARK, SP0_SCK_MARK, SP0_SCK_FB_MARK,
- SP0_SS0_MARK, SP0_SS1_MARK, SP0_SS2_MARK, SP0_SS3_MARK,
- DREQ0_MARK, DACK0_MARK, TEND0_MARK,
-
- /* PTE (mobule: RMII) */
- RMII0_CRS_DV_MARK, RMII0_TXD1_MARK,
- RMII0_TXD0_MARK, RMII0_TXEN_MARK,
- RMII0_REFCLK_MARK, RMII0_RXD1_MARK,
- RMII0_RXD0_MARK, RMII0_RX_ER_MARK,
-
- /* PTF (mobule: RMII, SerMux) */
- RMII1_CRS_DV_MARK, RMII1_TXD1_MARK,
- RMII1_TXD0_MARK, RMII1_TXEN_MARK,
- RMII1_REFCLK_MARK, RMII1_RXD1_MARK,
- RMII1_RXD0_MARK, RMII1_RX_ER_MARK,
- RAC_RI_MARK,
-
- /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
- BOOTFMS_MARK, BOOTWP_MARK, A25_MARK, A24_MARK,
- SERIRQ_MARK, WDTOVF_MARK, LPCPD_MARK, LDRQ_MARK,
- MMCCLK_MARK, MMCCMD_MARK,
-
- /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
- SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK,
- SP1_SS0_MARK, SP1_SS1_MARK, WP_MARK, FMS0_MARK,
- TEND1_MARK, DREQ1_MARK, DACK1_MARK, ADTRG1_MARK,
- ADTRG0_MARK,
-
- /* PTI (mobule: LBSC, SDHI) */
- D15_MARK, D14_MARK, D13_MARK, D12_MARK,
- D11_MARK, D10_MARK, D9_MARK, D8_MARK,
- SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK,
- SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK,
-
- /* PTJ (mobule: SCIF234) */
- RTS3_MARK, CTS3_MARK, TXD3_MARK, RXD3_MARK,
- RTS4_MARK, RXD4_MARK, TXD4_MARK,
-
- /* PTK (mobule: SERMUX, LBSC, SCIF) */
- COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK,
- COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, CLKOUT_MARK,
- SCK2_MARK, SCK4_MARK, SCK3_MARK,
-
- /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
- RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, RAC_DTR_MARK,
- RAC_DSR_MARK, RAC_DCD_MARK, RAC_TXD_MARK, RXD2_MARK,
- CS5_MARK, CS6_MARK, AUDSYNC_MARK, AUDCK_MARK,
- TXD2_MARK,
-
- /* PTM (mobule: LBSC, IIC) */
- CS4_MARK, RD_MARK, WE0_MARK, CS0_MARK,
- SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK,
-
- /* PTN (mobule: USB, JMC, SGPIO, WDT) */
- VBUS_EN_MARK, VBUS_OC_MARK, JMCTCK_MARK, JMCTMS_MARK,
- JMCTDO_MARK, JMCTDI_MARK, JMCTRST_MARK,
- SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, SGPIO1_DI_MARK,
- SGPIO1_DO_MARK, SUB_CLKIN_MARK,
-
- /* PTO (mobule: SGPIO, SerMux) */
- SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, SGPIO0_DI_MARK,
- SGPIO0_DO_MARK, SGPIO2_CLK_MARK, SGPIO2_LOAD_MARK,
- SGPIO2_DI_MARK, SGPIO2_DO_MARK,
- COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK,
-
- /* PTQ (mobule: LPC) */
- LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK,
- LFRAME_MARK, LRESET_MARK, LCLK_MARK,
-
- /* PTR (mobule: GRA, IIC) */
- DDC3_MARK, DDC2_MARK, SDA2_MARK, SCL2_MARK,
- SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK,
- SDA8_MARK, SCL8_MARK,
-
- /* PTS (mobule: GRA, IIC) */
- DDC1_MARK, DDC0_MARK, SDA5_MARK, SCL5_MARK,
- SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK,
- SDA9_MARK, SCL9_MARK,
-
- /* PTT (mobule: PWMX, AUD) */
- PWMX7_MARK, PWMX6_MARK, PWMX5_MARK, PWMX4_MARK,
- PWMX3_MARK, PWMX2_MARK, PWMX1_MARK, PWMX0_MARK,
- AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
- STATUS1_MARK, STATUS0_MARK,
-
- /* PTU (mobule: LPC, APM) */
- LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
- LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
- APMONCTL_O_MARK, APMPWBTOUT_O_MARK, APMSCI_O_MARK,
- APMVDDON_MARK, APMSLPBTN_MARK, APMPWRBTN_MARK, APMS5N_MARK,
- APMS3N_MARK,
-
- /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
- A23_MARK, A22_MARK, A21_MARK, A20_MARK,
- A19_MARK, A18_MARK, A17_MARK, A16_MARK,
- COM2_RI_MARK, R_SPI_MOSI_MARK, R_SPI_MISO_MARK,
- R_SPI_RSPCK_MARK, R_SPI_SSL0_MARK, R_SPI_SSL1_MARK,
- EVENT7_MARK, EVENT6_MARK, VBIOS_DI_MARK, VBIOS_DO_MARK,
- VBIOS_CLK_MARK, VBIOS_CS_MARK,
-
- /* PTW (mobule: LBSC, EVC, SCIF) */
- A15_MARK, A14_MARK, A13_MARK, A12_MARK,
- A11_MARK, A10_MARK, A9_MARK, A8_MARK,
- EVENT5_MARK, EVENT4_MARK, EVENT3_MARK, EVENT2_MARK,
- EVENT1_MARK, EVENT0_MARK, CTS4_MARK, CTS2_MARK,
-
- /* PTX (mobule: LBSC, SCIF, SIM) */
- A7_MARK, A6_MARK, A5_MARK, A4_MARK,
- A3_MARK, A2_MARK, A1_MARK, A0_MARK,
- RTS2_MARK, SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
-
- /* PTY (mobule: LBSC) */
- D7_MARK, D6_MARK, D5_MARK, D4_MARK,
- D3_MARK, D2_MARK, D1_MARK, D0_MARK,
-
- /* PTZ (mobule: eMMC, ONFI) */
- MMCDAT7_MARK, MMCDAT6_MARK, MMCDAT5_MARK, MMCDAT4_MARK,
- MMCDAT3_MARK, MMCDAT2_MARK, MMCDAT1_MARK, MMCDAT0_MARK,
- ON_DQ7_MARK, ON_DQ6_MARK, ON_DQ5_MARK, ON_DQ4_MARK,
- ON_DQ3_MARK, ON_DQ2_MARK, ON_DQ1_MARK, ON_DQ0_MARK,
-
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- /* PTA GPIO */
- PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
- PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
- PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
- PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
- PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
- PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
- PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
- PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
-
- /* PTB GPIO */
- PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
- PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
- PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
- PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
- PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
- PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
- PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
- PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
-
- /* PTC GPIO */
- PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
- PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
- PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
- PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
- PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
- PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
- PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
- PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
-
- /* PTD GPIO */
- PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
- PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
- PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
- PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
- PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
- PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
- PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
- PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
-
- /* PTE GPIO */
- PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT),
- PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT),
- PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
- PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
- PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
- PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
- PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
- PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
-
- /* PTF GPIO */
- PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
- PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
- PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
- PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
- PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
- PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
- PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
- PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
-
- /* PTG GPIO */
- PINMUX_DATA(PTG7_DATA, PTG7_IN, PTG7_OUT),
- PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT),
- PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT),
- PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT),
- PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT),
- PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT),
- PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT),
- PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT),
-
- /* PTH GPIO */
- PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
- PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
- PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
- PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
- PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
- PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
- PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
- PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
-
- /* PTI GPIO */
- PINMUX_DATA(PTI7_DATA, PTI7_IN, PTI7_OUT),
- PINMUX_DATA(PTI6_DATA, PTI6_IN, PTI6_OUT),
- PINMUX_DATA(PTI5_DATA, PTI5_IN, PTI5_OUT),
- PINMUX_DATA(PTI4_DATA, PTI4_IN, PTI4_OUT),
- PINMUX_DATA(PTI3_DATA, PTI3_IN, PTI3_OUT),
- PINMUX_DATA(PTI2_DATA, PTI2_IN, PTI2_OUT),
- PINMUX_DATA(PTI1_DATA, PTI1_IN, PTI1_OUT),
- PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT),
-
- /* PTJ GPIO */
- PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
- PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
- PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
- PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
- PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
- PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
- PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
-
- /* PTK GPIO */
- PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
- PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
- PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
- PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
- PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
- PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
- PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
- PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
-
- /* PTL GPIO */
- PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
- PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
- PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
- PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
- PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
- PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
- PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
-
- /* PTM GPIO */
- PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
- PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
- PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
- PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
- PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
- PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
- PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
-
- /* PTN GPIO */
- PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
- PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
- PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
- PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
- PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
- PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
- PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
-
- /* PTO GPIO */
- PINMUX_DATA(PTO7_DATA, PTO7_IN, PTO7_OUT),
- PINMUX_DATA(PTO6_DATA, PTO6_IN, PTO6_OUT),
- PINMUX_DATA(PTO5_DATA, PTO5_IN, PTO5_OUT),
- PINMUX_DATA(PTO4_DATA, PTO4_IN, PTO4_OUT),
- PINMUX_DATA(PTO3_DATA, PTO3_IN, PTO3_OUT),
- PINMUX_DATA(PTO2_DATA, PTO2_IN, PTO2_OUT),
- PINMUX_DATA(PTO1_DATA, PTO1_IN, PTO1_OUT),
- PINMUX_DATA(PTO0_DATA, PTO0_IN, PTO0_OUT),
-
- /* PTQ GPIO */
- PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT),
- PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT),
- PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT),
- PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT),
- PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT),
- PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT),
- PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT),
-
- /* PTR GPIO */
- PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
- PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
- PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
- PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
- PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT),
- PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT),
- PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
- PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
-
- /* PTS GPIO */
- PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT),
- PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
- PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
- PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
- PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
- PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
- PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
- PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
-
- /* PTT GPIO */
- PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT),
- PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT),
- PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
- PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
- PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
- PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
- PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
- PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
-
- /* PTU GPIO */
- PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT),
- PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT),
- PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
- PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
- PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
- PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
- PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
- PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
-
- /* PTV GPIO */
- PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
- PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
- PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
- PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
- PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
- PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
- PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
- PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
-
- /* PTW GPIO */
- PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
- PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
- PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
- PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
- PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
- PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
- PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
- PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
-
- /* PTX GPIO */
- PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
- PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
- PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
- PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
- PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
- PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
- PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
- PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
-
- /* PTY GPIO */
- PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
- PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
- PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
- PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
- PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
- PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
- PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
- PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
-
- /* PTZ GPIO */
- PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
- PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
- PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
- PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
- PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
- PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
- PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
- PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
-
- /* PTA FN */
- PINMUX_DATA(BS_MARK, PTA7_FN),
- PINMUX_DATA(RDWR_MARK, PTA6_FN),
- PINMUX_DATA(WE1_MARK, PTA5_FN),
- PINMUX_DATA(RDY_MARK, PTA4_FN),
- PINMUX_DATA(ET0_MDC_MARK, PTA3_FN),
- PINMUX_DATA(ET0_MDIO_MARK, PTA2_FN),
- PINMUX_DATA(ET1_MDC_MARK, PTA1_FN),
- PINMUX_DATA(ET1_MDIO_MARK, PTA0_FN),
-
- /* PTB FN */
- PINMUX_DATA(IRQ15_MARK, PS0_15_FN1, PTB7_FN),
- PINMUX_DATA(ON_NRE_MARK, PS0_15_FN2, PTB7_FN),
- PINMUX_DATA(IRQ14_MARK, PS0_14_FN1, PTB6_FN),
- PINMUX_DATA(ON_NWE_MARK, PS0_14_FN2, PTB6_FN),
- PINMUX_DATA(IRQ13_MARK, PS0_13_FN1, PTB5_FN),
- PINMUX_DATA(ON_NWP_MARK, PS0_13_FN2, PTB5_FN),
- PINMUX_DATA(IRQ12_MARK, PS0_12_FN1, PTB4_FN),
- PINMUX_DATA(ON_NCE0_MARK, PS0_12_FN2, PTB4_FN),
- PINMUX_DATA(IRQ11_MARK, PS0_11_FN1, PTB3_FN),
- PINMUX_DATA(ON_R_B0_MARK, PS0_11_FN2, PTB3_FN),
- PINMUX_DATA(IRQ10_MARK, PS0_10_FN1, PTB2_FN),
- PINMUX_DATA(ON_ALE_MARK, PS0_10_FN2, PTB2_FN),
- PINMUX_DATA(IRQ9_MARK, PS0_9_FN1, PTB1_FN),
- PINMUX_DATA(ON_CLE_MARK, PS0_9_FN2, PTB1_FN),
- PINMUX_DATA(IRQ8_MARK, PS0_8_FN1, PTB0_FN),
- PINMUX_DATA(TCLK_MARK, PS0_8_FN2, PTB0_FN),
-
- /* PTC FN */
- PINMUX_DATA(IRQ7_MARK, PS0_7_FN1, PTC7_FN),
- PINMUX_DATA(PWMU0_MARK, PS0_7_FN2, PTC7_FN),
- PINMUX_DATA(IRQ6_MARK, PS0_6_FN1, PTC6_FN),
- PINMUX_DATA(PWMU1_MARK, PS0_6_FN2, PTC6_FN),
- PINMUX_DATA(IRQ5_MARK, PS0_5_FN1, PTC5_FN),
- PINMUX_DATA(PWMU2_MARK, PS0_5_FN2, PTC5_FN),
- PINMUX_DATA(IRQ4_MARK, PS0_4_FN1, PTC5_FN),
- PINMUX_DATA(PWMU3_MARK, PS0_4_FN2, PTC4_FN),
- PINMUX_DATA(IRQ3_MARK, PS0_3_FN1, PTC3_FN),
- PINMUX_DATA(PWMU4_MARK, PS0_3_FN2, PTC3_FN),
- PINMUX_DATA(IRQ2_MARK, PS0_2_FN1, PTC2_FN),
- PINMUX_DATA(PWMU5_MARK, PS0_2_FN2, PTC2_FN),
- PINMUX_DATA(IRQ1_MARK, PTC1_FN),
- PINMUX_DATA(IRQ0_MARK, PTC0_FN),
-
- /* PTD FN */
- PINMUX_DATA(SP0_MOSI_MARK, PTD7_FN),
- PINMUX_DATA(SP0_MISO_MARK, PTD6_FN),
- PINMUX_DATA(SP0_SCK_MARK, PTD5_FN),
- PINMUX_DATA(SP0_SCK_FB_MARK, PTD4_FN),
- PINMUX_DATA(SP0_SS0_MARK, PTD3_FN),
- PINMUX_DATA(SP0_SS1_MARK, PS1_10_FN1, PTD2_FN),
- PINMUX_DATA(DREQ0_MARK, PS1_10_FN2, PTD2_FN),
- PINMUX_DATA(SP0_SS2_MARK, PS1_9_FN1, PTD1_FN),
- PINMUX_DATA(DACK0_MARK, PS1_9_FN2, PTD1_FN),
- PINMUX_DATA(SP0_SS3_MARK, PS1_8_FN1, PTD0_FN),
- PINMUX_DATA(TEND0_MARK, PS1_8_FN2, PTD0_FN),
-
- /* PTE FN */
- PINMUX_DATA(RMII0_CRS_DV_MARK, PTE7_FN),
- PINMUX_DATA(RMII0_TXD1_MARK, PTE6_FN),
- PINMUX_DATA(RMII0_TXD0_MARK, PTE5_FN),
- PINMUX_DATA(RMII0_TXEN_MARK, PTE4_FN),
- PINMUX_DATA(RMII0_REFCLK_MARK, PTE3_FN),
- PINMUX_DATA(RMII0_RXD1_MARK, PTE2_FN),
- PINMUX_DATA(RMII0_RXD0_MARK, PTE1_FN),
- PINMUX_DATA(RMII0_RX_ER_MARK, PTE0_FN),
-
- /* PTF FN */
- PINMUX_DATA(RMII1_CRS_DV_MARK, PTF7_FN),
- PINMUX_DATA(RMII1_TXD1_MARK, PTF6_FN),
- PINMUX_DATA(RMII1_TXD0_MARK, PTF5_FN),
- PINMUX_DATA(RMII1_TXEN_MARK, PTF4_FN),
- PINMUX_DATA(RMII1_REFCLK_MARK, PTF3_FN),
- PINMUX_DATA(RMII1_RXD1_MARK, PS1_2_FN1, PTF2_FN),
- PINMUX_DATA(RAC_RI_MARK, PS1_2_FN2, PTF2_FN),
- PINMUX_DATA(RMII1_RXD0_MARK, PTF1_FN),
- PINMUX_DATA(RMII1_RX_ER_MARK, PTF0_FN),
-
- /* PTG FN */
- PINMUX_DATA(BOOTFMS_MARK, PTG7_FN),
- PINMUX_DATA(BOOTWP_MARK, PTG6_FN),
- PINMUX_DATA(A25_MARK, PS2_13_FN1, PTG5_FN),
- PINMUX_DATA(MMCCLK_MARK, PS2_13_FN2, PTG5_FN),
- PINMUX_DATA(A24_MARK, PS2_12_FN1, PTG4_FN),
- PINMUX_DATA(MMCCMD_MARK, PS2_12_FN2, PTG4_FN),
- PINMUX_DATA(SERIRQ_MARK, PTG3_FN),
- PINMUX_DATA(WDTOVF_MARK, PTG2_FN),
- PINMUX_DATA(LPCPD_MARK, PTG1_FN),
- PINMUX_DATA(LDRQ_MARK, PTG0_FN),
-
- /* PTH FN */
- PINMUX_DATA(SP1_MOSI_MARK, PS2_7_FN1, PTH7_FN),
- PINMUX_DATA(TEND1_MARK, PS2_7_FN2, PTH7_FN),
- PINMUX_DATA(SP1_MISO_MARK, PS2_6_FN1, PTH6_FN),
- PINMUX_DATA(DREQ1_MARK, PS2_6_FN2, PTH6_FN),
- PINMUX_DATA(SP1_SCK_MARK, PS2_5_FN1, PTH5_FN),
- PINMUX_DATA(DACK1_MARK, PS2_5_FN2, PTH5_FN),
- PINMUX_DATA(SP1_SCK_FB_MARK, PS2_4_FN1, PTH4_FN),
- PINMUX_DATA(ADTRG1_MARK, PS2_4_FN2, PTH4_FN),
- PINMUX_DATA(SP1_SS0_MARK, PTH3_FN),
- PINMUX_DATA(SP1_SS1_MARK, PS2_2_FN1, PTH2_FN),
- PINMUX_DATA(ADTRG0_MARK, PS2_2_FN2, PTH2_FN),
- PINMUX_DATA(WP_MARK, PTH1_FN),
- PINMUX_DATA(FMS0_MARK, PTH0_FN),
-
- /* PTI FN */
- PINMUX_DATA(D15_MARK, PS3_15_FN1, PTI7_FN),
- PINMUX_DATA(SD_WP_MARK, PS3_15_FN2, PTI7_FN),
- PINMUX_DATA(D14_MARK, PS3_14_FN1, PTI6_FN),
- PINMUX_DATA(SD_CD_MARK, PS3_14_FN2, PTI6_FN),
- PINMUX_DATA(D13_MARK, PS3_13_FN1, PTI5_FN),
- PINMUX_DATA(SD_CLK_MARK, PS3_13_FN2, PTI5_FN),
- PINMUX_DATA(D12_MARK, PS3_12_FN1, PTI4_FN),
- PINMUX_DATA(SD_CMD_MARK, PS3_12_FN2, PTI4_FN),
- PINMUX_DATA(D11_MARK, PS3_11_FN1, PTI3_FN),
- PINMUX_DATA(SD_D3_MARK, PS3_11_FN2, PTI3_FN),
- PINMUX_DATA(D10_MARK, PS3_10_FN1, PTI2_FN),
- PINMUX_DATA(SD_D2_MARK, PS3_10_FN2, PTI2_FN),
- PINMUX_DATA(D9_MARK, PS3_9_FN1, PTI1_FN),
- PINMUX_DATA(SD_D1_MARK, PS3_9_FN2, PTI1_FN),
- PINMUX_DATA(D8_MARK, PS3_8_FN1, PTI0_FN),
- PINMUX_DATA(SD_D0_MARK, PS3_8_FN2, PTI0_FN),
-
- /* PTJ FN */
- PINMUX_DATA(RTS3_MARK, PTJ6_FN),
- PINMUX_DATA(CTS3_MARK, PTJ5_FN),
- PINMUX_DATA(TXD3_MARK, PTJ4_FN),
- PINMUX_DATA(RXD3_MARK, PTJ3_FN),
- PINMUX_DATA(RTS4_MARK, PTJ2_FN),
- PINMUX_DATA(RXD4_MARK, PTJ1_FN),
- PINMUX_DATA(TXD4_MARK, PTJ0_FN),
-
- /* PTK FN */
- PINMUX_DATA(COM2_TXD_MARK, PS3_7_FN1, PTK7_FN),
- PINMUX_DATA(SCK2_MARK, PS3_7_FN2, PTK7_FN),
- PINMUX_DATA(COM2_RXD_MARK, PTK6_FN),
- PINMUX_DATA(COM2_RTS_MARK, PTK5_FN),
- PINMUX_DATA(COM2_CTS_MARK, PTK4_FN),
- PINMUX_DATA(COM2_DTR_MARK, PTK3_FN),
- PINMUX_DATA(COM2_DSR_MARK, PS3_2_FN1, PTK2_FN),
- PINMUX_DATA(SCK4_MARK, PS3_2_FN2, PTK2_FN),
- PINMUX_DATA(COM2_DCD_MARK, PS3_1_FN1, PTK1_FN),
- PINMUX_DATA(SCK3_MARK, PS3_1_FN2, PTK1_FN),
- PINMUX_DATA(CLKOUT_MARK, PTK0_FN),
-
- /* PTL FN */
- PINMUX_DATA(RAC_RXD_MARK, PS4_14_FN1, PTL6_FN),
- PINMUX_DATA(RXD2_MARK, PS4_14_FN2, PTL6_FN),
- PINMUX_DATA(RAC_RTS_MARK, PS4_13_FN1, PTL5_FN),
- PINMUX_DATA(CS5_MARK, PS4_13_FN2, PTL5_FN),
- PINMUX_DATA(RAC_CTS_MARK, PS4_12_FN1, PTL4_FN),
- PINMUX_DATA(CS6_MARK, PS4_12_FN2, PTL4_FN),
- PINMUX_DATA(RAC_DTR_MARK, PTL3_FN),
- PINMUX_DATA(RAC_DSR_MARK, PS4_10_FN1, PTL2_FN),
- PINMUX_DATA(AUDSYNC_MARK, PS4_10_FN2, PTL2_FN),
- PINMUX_DATA(RAC_DCD_MARK, PS4_9_FN1, PTL1_FN),
- PINMUX_DATA(AUDCK_MARK, PS4_9_FN2, PTL1_FN),
- PINMUX_DATA(RAC_TXD_MARK, PS4_8_FN1, PTL0_FN),
- PINMUX_DATA(TXD2_MARK, PS4_8_FN1, PTL0_FN),
-
- /* PTM FN */
- PINMUX_DATA(CS4_MARK, PTM7_FN),
- PINMUX_DATA(RD_MARK, PTM6_FN),
- PINMUX_DATA(WE0_MARK, PTM7_FN),
- PINMUX_DATA(CS0_MARK, PTM4_FN),
- PINMUX_DATA(SDA6_MARK, PTM3_FN),
- PINMUX_DATA(SCL6_MARK, PTM2_FN),
- PINMUX_DATA(SDA7_MARK, PTM1_FN),
- PINMUX_DATA(SCL7_MARK, PTM0_FN),
-
- /* PTN FN */
- PINMUX_DATA(VBUS_EN_MARK, PTN6_FN),
- PINMUX_DATA(VBUS_OC_MARK, PTN5_FN),
- PINMUX_DATA(JMCTCK_MARK, PS4_4_FN1, PTN4_FN),
- PINMUX_DATA(SGPIO1_CLK_MARK, PS4_4_FN2, PTN4_FN),
- PINMUX_DATA(JMCTMS_MARK, PS4_3_FN1, PTN5_FN),
- PINMUX_DATA(SGPIO1_LOAD_MARK, PS4_3_FN2, PTN5_FN),
- PINMUX_DATA(JMCTDO_MARK, PS4_2_FN1, PTN2_FN),
- PINMUX_DATA(SGPIO1_DO_MARK, PS4_2_FN2, PTN2_FN),
- PINMUX_DATA(JMCTDI_MARK, PS4_1_FN1, PTN1_FN),
- PINMUX_DATA(SGPIO1_DI_MARK, PS4_1_FN2, PTN1_FN),
- PINMUX_DATA(JMCTRST_MARK, PS4_0_FN1, PTN0_FN),
- PINMUX_DATA(SUB_CLKIN_MARK, PS4_0_FN2, PTN0_FN),
-
- /* PTO FN */
- PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN),
- PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN),
- PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN),
- PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN),
- PINMUX_DATA(SGPIO2_CLK_MARK, PS5_11_FN1, PTO3_FN),
- PINMUX_DATA(COM1_TXD_MARK, PS5_11_FN2, PTO3_FN),
- PINMUX_DATA(SGPIO2_LOAD_MARK, PS5_10_FN1, PTO2_FN),
- PINMUX_DATA(COM1_RXD_MARK, PS5_10_FN2, PTO2_FN),
- PINMUX_DATA(SGPIO2_DI_MARK, PS5_9_FN1, PTO1_FN),
- PINMUX_DATA(COM1_RTS_MARK, PS5_9_FN2, PTO1_FN),
- PINMUX_DATA(SGPIO2_DO_MARK, PS5_8_FN1, PTO0_FN),
- PINMUX_DATA(COM1_CTS_MARK, PS5_8_FN2, PTO0_FN),
-
- /* PTP FN */
-
- /* PTQ FN */
- PINMUX_DATA(LAD3_MARK, PTQ6_FN),
- PINMUX_DATA(LAD2_MARK, PTQ5_FN),
- PINMUX_DATA(LAD1_MARK, PTQ4_FN),
- PINMUX_DATA(LAD0_MARK, PTQ3_FN),
- PINMUX_DATA(LFRAME_MARK, PTQ2_FN),
- PINMUX_DATA(LRESET_MARK, PTQ1_FN),
- PINMUX_DATA(LCLK_MARK, PTQ0_FN),
-
- /* PTR FN */
- PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */
- PINMUX_DATA(SCL8_MARK, PTR6_FN), /* DDC2? */
- PINMUX_DATA(SDA2_MARK, PTR5_FN),
- PINMUX_DATA(SCL2_MARK, PTR4_FN),
- PINMUX_DATA(SDA1_MARK, PTR3_FN),
- PINMUX_DATA(SCL1_MARK, PTR2_FN),
- PINMUX_DATA(SDA0_MARK, PTR1_FN),
- PINMUX_DATA(SCL0_MARK, PTR0_FN),
-
- /* PTS FN */
- PINMUX_DATA(SDA9_MARK, PTS7_FN), /* DDC1? */
- PINMUX_DATA(SCL9_MARK, PTS6_FN), /* DDC0? */
- PINMUX_DATA(SDA5_MARK, PTS5_FN),
- PINMUX_DATA(SCL5_MARK, PTS4_FN),
- PINMUX_DATA(SDA4_MARK, PTS3_FN),
- PINMUX_DATA(SCL4_MARK, PTS2_FN),
- PINMUX_DATA(SDA3_MARK, PTS1_FN),
- PINMUX_DATA(SCL3_MARK, PTS0_FN),
-
- /* PTT FN */
- PINMUX_DATA(PWMX7_MARK, PS5_7_FN1, PTT7_FN),
- PINMUX_DATA(AUDATA3_MARK, PS5_7_FN2, PTT7_FN),
- PINMUX_DATA(PWMX6_MARK, PS5_6_FN1, PTT6_FN),
- PINMUX_DATA(AUDATA2_MARK, PS5_6_FN2, PTT6_FN),
- PINMUX_DATA(PWMX5_MARK, PS5_5_FN1, PTT5_FN),
- PINMUX_DATA(AUDATA1_MARK, PS5_5_FN2, PTT5_FN),
- PINMUX_DATA(PWMX4_MARK, PS5_4_FN1, PTT4_FN),
- PINMUX_DATA(AUDATA0_MARK, PS5_4_FN2, PTT4_FN),
- PINMUX_DATA(PWMX3_MARK, PS5_3_FN1, PTT3_FN),
- PINMUX_DATA(STATUS1_MARK, PS5_3_FN2, PTT3_FN),
- PINMUX_DATA(PWMX2_MARK, PS5_2_FN1, PTT2_FN),
- PINMUX_DATA(STATUS0_MARK, PS5_2_FN2, PTT2_FN),
- PINMUX_DATA(PWMX1_MARK, PTT1_FN),
- PINMUX_DATA(PWMX0_MARK, PTT0_FN),
-
- /* PTU FN */
- PINMUX_DATA(LGPIO7_MARK, PS6_15_FN1, PTU7_FN),
- PINMUX_DATA(APMONCTL_O_MARK, PS6_15_FN2, PTU7_FN),
- PINMUX_DATA(LGPIO6_MARK, PS6_14_FN1, PTU6_FN),
- PINMUX_DATA(APMPWBTOUT_O_MARK, PS6_14_FN2, PTU6_FN),
- PINMUX_DATA(LGPIO5_MARK, PS6_13_FN1, PTU5_FN),
- PINMUX_DATA(APMSCI_O_MARK, PS6_13_FN2, PTU5_FN),
- PINMUX_DATA(LGPIO4_MARK, PS6_12_FN1, PTU4_FN),
- PINMUX_DATA(APMVDDON_MARK, PS6_12_FN2, PTU4_FN),
- PINMUX_DATA(LGPIO3_MARK, PS6_11_FN1, PTU3_FN),
- PINMUX_DATA(APMSLPBTN_MARK, PS6_11_FN2, PTU3_FN),
- PINMUX_DATA(LGPIO2_MARK, PS6_10_FN1, PTU2_FN),
- PINMUX_DATA(APMPWRBTN_MARK, PS6_10_FN2, PTU2_FN),
- PINMUX_DATA(LGPIO1_MARK, PS6_9_FN1, PTU1_FN),
- PINMUX_DATA(APMS5N_MARK, PS6_9_FN2, PTU1_FN),
- PINMUX_DATA(LGPIO0_MARK, PS6_8_FN1, PTU0_FN),
- PINMUX_DATA(APMS3N_MARK, PS6_8_FN2, PTU0_FN),
-
- /* PTV FN */
- PINMUX_DATA(A23_MARK, PS6_7_FN1, PTV7_FN),
- PINMUX_DATA(COM2_RI_MARK, PS6_7_FN2, PTV7_FN),
- PINMUX_DATA(A22_MARK, PS6_6_FN1, PTV6_FN),
- PINMUX_DATA(R_SPI_MOSI_MARK, PS6_6_FN2, PTV6_FN),
- PINMUX_DATA(A21_MARK, PS6_5_FN1, PTV5_FN),
- PINMUX_DATA(R_SPI_MISO_MARK, PS6_5_FN2, PTV5_FN),
- PINMUX_DATA(A20_MARK, PS6_4_FN1, PTV4_FN),
- PINMUX_DATA(R_SPI_RSPCK_MARK, PS6_4_FN2, PTV4_FN),
- PINMUX_DATA(A19_MARK, PS6_3_FN1, PTV3_FN),
- PINMUX_DATA(R_SPI_SSL0_MARK, PS6_3_FN2, PTV3_FN),
- PINMUX_DATA(A18_MARK, PS6_2_FN1, PTV2_FN),
- PINMUX_DATA(R_SPI_SSL1_MARK, PS6_2_FN2, PTV2_FN),
- PINMUX_DATA(A17_MARK, PS6_1_FN1, PTV1_FN),
- PINMUX_DATA(EVENT7_MARK, PS6_1_FN2, PTV1_FN),
- PINMUX_DATA(A16_MARK, PS6_0_FN1, PTV0_FN),
- PINMUX_DATA(EVENT6_MARK, PS6_0_FN1, PTV0_FN),
-
- /* PTW FN */
- PINMUX_DATA(A15_MARK, PS7_15_FN1, PTW7_FN),
- PINMUX_DATA(EVENT5_MARK, PS7_15_FN2, PTW7_FN),
- PINMUX_DATA(A14_MARK, PS7_14_FN1, PTW6_FN),
- PINMUX_DATA(EVENT4_MARK, PS7_14_FN2, PTW6_FN),
- PINMUX_DATA(A13_MARK, PS7_13_FN1, PTW5_FN),
- PINMUX_DATA(EVENT3_MARK, PS7_13_FN2, PTW5_FN),
- PINMUX_DATA(A12_MARK, PS7_12_FN1, PTW4_FN),
- PINMUX_DATA(EVENT2_MARK, PS7_12_FN2, PTW4_FN),
- PINMUX_DATA(A11_MARK, PS7_11_FN1, PTW3_FN),
- PINMUX_DATA(EVENT1_MARK, PS7_11_FN2, PTW3_FN),
- PINMUX_DATA(A10_MARK, PS7_10_FN1, PTW2_FN),
- PINMUX_DATA(EVENT0_MARK, PS7_10_FN2, PTW2_FN),
- PINMUX_DATA(A9_MARK, PS7_9_FN1, PTW1_FN),
- PINMUX_DATA(CTS4_MARK, PS7_9_FN2, PTW1_FN),
- PINMUX_DATA(A8_MARK, PS7_8_FN1, PTW0_FN),
- PINMUX_DATA(CTS2_MARK, PS7_8_FN2, PTW0_FN),
-
- /* PTX FN */
- PINMUX_DATA(A7_MARK, PS7_7_FN1, PTX7_FN),
- PINMUX_DATA(RTS2_MARK, PS7_7_FN2, PTX7_FN),
- PINMUX_DATA(A6_MARK, PS7_6_FN1, PTX6_FN),
- PINMUX_DATA(SIM_D_MARK, PS7_6_FN2, PTX6_FN),
- PINMUX_DATA(A5_MARK, PS7_5_FN1, PTX5_FN),
- PINMUX_DATA(SIM_CLK_MARK, PS7_5_FN2, PTX5_FN),
- PINMUX_DATA(A4_MARK, PS7_4_FN1, PTX4_FN),
- PINMUX_DATA(SIM_RST_MARK, PS7_4_FN2, PTX4_FN),
- PINMUX_DATA(A3_MARK, PTX3_FN),
- PINMUX_DATA(A2_MARK, PTX2_FN),
- PINMUX_DATA(A1_MARK, PTX1_FN),
- PINMUX_DATA(A0_MARK, PTX0_FN),
-
- /* PTY FN */
- PINMUX_DATA(D7_MARK, PTY7_FN),
- PINMUX_DATA(D6_MARK, PTY6_FN),
- PINMUX_DATA(D5_MARK, PTY5_FN),
- PINMUX_DATA(D4_MARK, PTY4_FN),
- PINMUX_DATA(D3_MARK, PTY3_FN),
- PINMUX_DATA(D2_MARK, PTY2_FN),
- PINMUX_DATA(D1_MARK, PTY1_FN),
- PINMUX_DATA(D0_MARK, PTY0_FN),
-
- /* PTZ FN */
- PINMUX_DATA(MMCDAT7_MARK, PS8_15_FN1, PTZ7_FN),
- PINMUX_DATA(ON_DQ7_MARK, PS8_15_FN2, PTZ7_FN),
- PINMUX_DATA(MMCDAT6_MARK, PS8_14_FN1, PTZ6_FN),
- PINMUX_DATA(ON_DQ6_MARK, PS8_14_FN2, PTZ6_FN),
- PINMUX_DATA(MMCDAT5_MARK, PS8_13_FN1, PTZ5_FN),
- PINMUX_DATA(ON_DQ5_MARK, PS8_13_FN2, PTZ5_FN),
- PINMUX_DATA(MMCDAT4_MARK, PS8_12_FN1, PTZ4_FN),
- PINMUX_DATA(ON_DQ4_MARK, PS8_12_FN2, PTZ4_FN),
- PINMUX_DATA(MMCDAT3_MARK, PS8_11_FN1, PTZ3_FN),
- PINMUX_DATA(ON_DQ3_MARK, PS8_11_FN2, PTZ3_FN),
- PINMUX_DATA(MMCDAT2_MARK, PS8_10_FN1, PTZ2_FN),
- PINMUX_DATA(ON_DQ2_MARK, PS8_10_FN2, PTZ2_FN),
- PINMUX_DATA(MMCDAT1_MARK, PS8_9_FN1, PTZ1_FN),
- PINMUX_DATA(ON_DQ1_MARK, PS8_9_FN2, PTZ1_FN),
- PINMUX_DATA(MMCDAT0_MARK, PS8_8_FN1, PTZ0_FN),
- PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- /* PTA */
- PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
- PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
- PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
- PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
- PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
- PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
- PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
- PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
-
- /* PTB */
- PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
- PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
- PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
- PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
- PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
- PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
- PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
- PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
-
- /* PTC */
- PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
- PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
- PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
- PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
- PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
- PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
- PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
- PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
-
- /* PTD */
- PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
- PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
- PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
- PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
- PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
- PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
- PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
- PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
-
- /* PTE */
- PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
- PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
- PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
- PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
- PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
- PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
- PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
- PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
-
- /* PTF */
- PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
- PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
- PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
- PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
- PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
- PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
- PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
- PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
-
- /* PTG */
- PINMUX_GPIO(GPIO_PTG7, PTG7_DATA),
- PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
- PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
- PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
- PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
- PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
- PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
- PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
-
- /* PTH */
- PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
- PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
- PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
- PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
- PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
- PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
- PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
- PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
-
- /* PTI */
- PINMUX_GPIO(GPIO_PTI7, PTI7_DATA),
- PINMUX_GPIO(GPIO_PTI6, PTI6_DATA),
- PINMUX_GPIO(GPIO_PTI5, PTI5_DATA),
- PINMUX_GPIO(GPIO_PTI4, PTI4_DATA),
- PINMUX_GPIO(GPIO_PTI3, PTI3_DATA),
- PINMUX_GPIO(GPIO_PTI2, PTI2_DATA),
- PINMUX_GPIO(GPIO_PTI1, PTI1_DATA),
- PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
-
- /* PTJ */
- PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
- PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
- PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
- PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
- PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
- PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
- PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
-
- /* PTK */
- PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
- PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
- PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
- PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
- PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
- PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
- PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
- PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
-
- /* PTL */
- PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
- PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
- PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
- PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
- PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
- PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
- PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
-
- /* PTM */
- PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
- PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
- PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
- PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
- PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
- PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
- PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
- PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
-
- /* PTN */
- PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
- PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
- PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
- PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
- PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
- PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
- PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
-
- /* PTO */
- PINMUX_GPIO(GPIO_PTO7, PTO7_DATA),
- PINMUX_GPIO(GPIO_PTO6, PTO6_DATA),
- PINMUX_GPIO(GPIO_PTO5, PTO5_DATA),
- PINMUX_GPIO(GPIO_PTO4, PTO4_DATA),
- PINMUX_GPIO(GPIO_PTO3, PTO3_DATA),
- PINMUX_GPIO(GPIO_PTO2, PTO2_DATA),
- PINMUX_GPIO(GPIO_PTO1, PTO1_DATA),
- PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
-
- /* PTP */
- PINMUX_GPIO(GPIO_PTP7, PTP7_DATA),
- PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
- PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
- PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
- PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
- PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
- PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
- PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
-
- /* PTQ */
- PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
- PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
- PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
- PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
- PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
- PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
- PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
-
- /* PTR */
- PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
- PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
- PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
- PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
- PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
- PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
- PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
- PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
-
- /* PTS */
- PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
- PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
- PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
- PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
- PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
- PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
- PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
- PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
-
- /* PTT */
- PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
- PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
- PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
- PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
- PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
- PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
- PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
- PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
-
- /* PTU */
- PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
- PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
- PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
- PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
- PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
- PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
- PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
- PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
-
- /* PTV */
- PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
- PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
- PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
- PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
- PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
- PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
- PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
- PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
-
- /* PTW */
- PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
- PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
- PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
- PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
- PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
- PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
- PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
- PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
-
- /* PTX */
- PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
- PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
- PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
- PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
- PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
- PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
- PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
- PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
-
- /* PTY */
- PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
- PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
- PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
- PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
- PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
- PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
- PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
- PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
-
- /* PTZ */
- PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
- PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
- PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
- PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
- PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
- PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
- PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
- PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
-
- /* PTA (mobule: LBSC, RGMII) */
- PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
- PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
- PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK),
- PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK),
- PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK),
- PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK),
- PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK),
- PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK),
-
- /* PTB (mobule: INTC, ONFI, TMU) */
- PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK),
- PINMUX_GPIO(GPIO_FN_ON_NRE, ON_NRE_MARK),
- PINMUX_GPIO(GPIO_FN_ON_NWE, ON_NWE_MARK),
- PINMUX_GPIO(GPIO_FN_ON_NWP, ON_NWP_MARK),
- PINMUX_GPIO(GPIO_FN_ON_NCE0, ON_NCE0_MARK),
- PINMUX_GPIO(GPIO_FN_ON_R_B0, ON_R_B0_MARK),
- PINMUX_GPIO(GPIO_FN_ON_ALE, ON_ALE_MARK),
- PINMUX_GPIO(GPIO_FN_ON_CLE, ON_CLE_MARK),
- PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
-
- /* PTC (mobule: IRQ, PWMU) */
- PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
- PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
- PINMUX_GPIO(GPIO_FN_PWMU0, PWMU0_MARK),
- PINMUX_GPIO(GPIO_FN_PWMU1, PWMU1_MARK),
- PINMUX_GPIO(GPIO_FN_PWMU2, PWMU2_MARK),
- PINMUX_GPIO(GPIO_FN_PWMU3, PWMU3_MARK),
- PINMUX_GPIO(GPIO_FN_PWMU4, PWMU4_MARK),
- PINMUX_GPIO(GPIO_FN_PWMU5, PWMU5_MARK),
-
- /* PTD (mobule: SPI0, DMAC) */
- PINMUX_GPIO(GPIO_FN_SP0_MOSI, SP0_MOSI_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_MISO, SP0_MISO_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_SCK, SP0_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_SCK_FB, SP0_SCK_FB_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_SS0, SP0_SS0_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_SS2, SP0_SS2_MARK),
- PINMUX_GPIO(GPIO_FN_SP0_SS3, SP0_SS3_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
- PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
- PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
-
- /* PTE (mobule: RMII) */
- PINMUX_GPIO(GPIO_FN_RMII0_CRS_DV, RMII0_CRS_DV_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_TXD1, RMII0_TXD1_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_TXD0, RMII0_TXD0_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_TXEN, RMII0_TXEN_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_REFCLK, RMII0_REFCLK_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_RXD1, RMII0_RXD1_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_RXD0, RMII0_RXD0_MARK),
- PINMUX_GPIO(GPIO_FN_RMII0_RX_ER, RMII0_RX_ER_MARK),
-
- /* PTF (mobule: RMII, SerMux) */
- PINMUX_GPIO(GPIO_FN_RMII1_CRS_DV, RMII1_CRS_DV_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_TXD1, RMII1_TXD1_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_TXD0, RMII1_TXD0_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_TXEN, RMII1_TXEN_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_REFCLK, RMII1_REFCLK_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_RXD1, RMII1_RXD1_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_RXD0, RMII1_RXD0_MARK),
- PINMUX_GPIO(GPIO_FN_RMII1_RX_ER, RMII1_RX_ER_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK),
-
- /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
- PINMUX_GPIO(GPIO_FN_BOOTFMS, BOOTFMS_MARK),
- PINMUX_GPIO(GPIO_FN_BOOTWP, BOOTWP_MARK),
- PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
- PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
- PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK),
- PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
- PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK),
- PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK),
- PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
- PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
-
- /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
- PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK),
- PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK),
- PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK),
- PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK),
- PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK),
- PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK),
- PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
- PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
- PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
- PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
- PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
- PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK),
- PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK),
-
- /* PTI (mobule: LBSC, SDHI) */
- PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
- PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
- PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
- PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
- PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
- PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
- PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
- PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
- PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
- PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
- PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
- PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
- PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
- PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
- PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
-
- /* PTJ (mobule: SCIF234, SERMUX) */
- PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
- PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
- PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
- PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
- PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK),
- PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
- PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
-
- /* PTK (mobule: SERMUX, LBSC, SCIF) */
- PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_CTS, COM2_CTS_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK),
- PINMUX_GPIO(GPIO_FN_CLKOUT, CLKOUT_MARK),
- PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
- PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
- PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
-
- /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
- PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK),
- PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
- PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
- PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
- PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
- PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
- PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
-
- /* PTM (mobule: LBSC, IIC) */
- PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
- PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
- PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
- PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
- PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK),
- PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK),
- PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK),
- PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK),
-
- /* PTN (mobule: USB, JMC, SGPIO, WDT) */
- PINMUX_GPIO(GPIO_FN_VBUS_EN, VBUS_EN_MARK),
- PINMUX_GPIO(GPIO_FN_VBUS_OC, VBUS_OC_MARK),
- PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
- PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
- PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
- PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
- PINMUX_GPIO(GPIO_FN_JMCTRST, JMCTRST_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK),
- PINMUX_GPIO(GPIO_FN_SUB_CLKIN, SUB_CLKIN_MARK),
-
- /* PTO (mobule: SGPIO, SerMux) */
- PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO2_CLK, SGPIO2_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO2_LOAD, SGPIO2_LOAD_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO2_DI, SGPIO2_DI_MARK),
- PINMUX_GPIO(GPIO_FN_SGPIO2_DO, SGPIO2_DO_MARK),
- PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK),
- PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK),
- PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
- PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
-
- /* PTP (mobule: EVC, ADC) */
-
- /* PTQ (mobule: LPC) */
- PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK),
- PINMUX_GPIO(GPIO_FN_LAD2, LAD2_MARK),
- PINMUX_GPIO(GPIO_FN_LAD1, LAD1_MARK),
- PINMUX_GPIO(GPIO_FN_LAD0, LAD0_MARK),
- PINMUX_GPIO(GPIO_FN_LFRAME, LFRAME_MARK),
- PINMUX_GPIO(GPIO_FN_LRESET, LRESET_MARK),
- PINMUX_GPIO(GPIO_FN_LCLK, LCLK_MARK),
-
- /* PTR (mobule: GRA, IIC) */
- PINMUX_GPIO(GPIO_FN_DDC3, DDC3_MARK),
- PINMUX_GPIO(GPIO_FN_DDC2, DDC2_MARK),
- PINMUX_GPIO(GPIO_FN_SDA8, SDA8_MARK),
- PINMUX_GPIO(GPIO_FN_SCL8, SCL8_MARK),
- PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
- PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
- PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
- PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
- PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
- PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
-
- /* PTS (mobule: GRA, IIC) */
- PINMUX_GPIO(GPIO_FN_DDC1, DDC1_MARK),
- PINMUX_GPIO(GPIO_FN_DDC0, DDC0_MARK),
- PINMUX_GPIO(GPIO_FN_SDA9, SDA9_MARK),
- PINMUX_GPIO(GPIO_FN_SCL9, SCL9_MARK),
- PINMUX_GPIO(GPIO_FN_SDA5, SDA5_MARK),
- PINMUX_GPIO(GPIO_FN_SCL5, SCL5_MARK),
- PINMUX_GPIO(GPIO_FN_SDA4, SDA4_MARK),
- PINMUX_GPIO(GPIO_FN_SCL4, SCL4_MARK),
- PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
- PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
-
- /* PTT (mobule: PWMX, AUD) */
- PINMUX_GPIO(GPIO_FN_PWMX7, PWMX7_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX6, PWMX6_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX5, PWMX5_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX4, PWMX4_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX3, PWMX3_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX2, PWMX2_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX1, PWMX1_MARK),
- PINMUX_GPIO(GPIO_FN_PWMX0, PWMX0_MARK),
- PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
- PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
- PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
- PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
- PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
- PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
-
- /* PTU (mobule: LPC, APM) */
- PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
- PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
- PINMUX_GPIO(GPIO_FN_APMONCTL_O, APMONCTL_O_MARK),
- PINMUX_GPIO(GPIO_FN_APMPWBTOUT_O, APMPWBTOUT_O_MARK),
- PINMUX_GPIO(GPIO_FN_APMSCI_O, APMSCI_O_MARK),
- PINMUX_GPIO(GPIO_FN_APMVDDON, APMVDDON_MARK),
- PINMUX_GPIO(GPIO_FN_APMSLPBTN, APMSLPBTN_MARK),
- PINMUX_GPIO(GPIO_FN_APMPWRBTN, APMPWRBTN_MARK),
- PINMUX_GPIO(GPIO_FN_APMS5N, APMS5N_MARK),
- PINMUX_GPIO(GPIO_FN_APMS3N, APMS3N_MARK),
-
- /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
- PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
- PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
- PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
- PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
- PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
- PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
- PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
- PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
- PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK),
- PINMUX_GPIO(GPIO_FN_R_SPI_MOSI, R_SPI_MOSI_MARK),
- PINMUX_GPIO(GPIO_FN_R_SPI_MISO, R_SPI_MISO_MARK),
- PINMUX_GPIO(GPIO_FN_R_SPI_RSPCK, R_SPI_RSPCK_MARK),
- PINMUX_GPIO(GPIO_FN_R_SPI_SSL0, R_SPI_SSL0_MARK),
- PINMUX_GPIO(GPIO_FN_R_SPI_SSL1, R_SPI_SSL1_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK),
- PINMUX_GPIO(GPIO_FN_VBIOS_DI, VBIOS_DI_MARK),
- PINMUX_GPIO(GPIO_FN_VBIOS_DO, VBIOS_DO_MARK),
- PINMUX_GPIO(GPIO_FN_VBIOS_CLK, VBIOS_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_VBIOS_CS, VBIOS_CS_MARK),
-
- /* PTW (mobule: LBSC, EVC, SCIF) */
- PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
- PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
- PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
- PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
- PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
- PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
- PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
- PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
- PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
- PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
- PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK),
- PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK),
-
- /* PTX (mobule: LBSC) */
- PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
- PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
- PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
- PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
- PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
- PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
- PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
- PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
- PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK),
- PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
- PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
- PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
-
- /* PTY (mobule: LBSC) */
- PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
- PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
- PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
- PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
- PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
- PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
- PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
- PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
-
- /* PTZ (mobule: eMMC, ONFI) */
- PINMUX_GPIO(GPIO_FN_MMCDAT7, MMCDAT7_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT6, MMCDAT6_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT5, MMCDAT5_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT4, MMCDAT4_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT3, MMCDAT3_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT2, MMCDAT2_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT1, MMCDAT1_MARK),
- PINMUX_GPIO(GPIO_FN_MMCDAT0, MMCDAT0_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ7, ON_DQ7_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ6, ON_DQ6_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ5, ON_DQ5_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ4, ON_DQ4_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ3, ON_DQ3_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ2, ON_DQ2_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ1, ON_DQ1_MARK),
- PINMUX_GPIO(GPIO_FN_ON_DQ0, ON_DQ0_MARK),
- };
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
- PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
- PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
- PTA5_FN, PTA5_OUT, PTA5_IN, PTA5_IN_PU,
- PTA4_FN, PTA4_OUT, PTA4_IN, PTA4_IN_PU,
- PTA3_FN, PTA3_OUT, PTA3_IN, PTA3_IN_PU,
- PTA2_FN, PTA2_OUT, PTA2_IN, PTA2_IN_PU,
- PTA1_FN, PTA1_OUT, PTA1_IN, PTA1_IN_PU,
- PTA0_FN, PTA0_OUT, PTA0_IN, PTA0_IN_PU }
- },
- { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
- PTB7_FN, PTB7_OUT, PTB7_IN, 0,
- PTB6_FN, PTB6_OUT, PTB6_IN, 0,
- PTB5_FN, PTB5_OUT, PTB5_IN, 0,
- PTB4_FN, PTB4_OUT, PTB4_IN, 0,
- PTB3_FN, PTB3_OUT, PTB3_IN, 0,
- PTB2_FN, PTB2_OUT, PTB2_IN, 0,
- PTB1_FN, PTB1_OUT, PTB1_IN, 0,
- PTB0_FN, PTB0_OUT, PTB0_IN, 0 }
- },
- { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2) {
- PTC7_FN, PTC7_OUT, PTC7_IN, 0,
- PTC6_FN, PTC6_OUT, PTC6_IN, 0,
- PTC5_FN, PTC5_OUT, PTC5_IN, 0,
- PTC4_FN, PTC4_OUT, PTC4_IN, 0,
- PTC3_FN, PTC3_OUT, PTC3_IN, 0,
- PTC2_FN, PTC2_OUT, PTC2_IN, 0,
- PTC1_FN, PTC1_OUT, PTC1_IN, 0,
- PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
- },
- { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
- PTD7_FN, PTD7_OUT, PTD7_IN, PTD7_IN_PU,
- PTD6_FN, PTD6_OUT, PTD6_IN, PTD6_IN_PU,
- PTD5_FN, PTD5_OUT, PTD5_IN, PTD5_IN_PU,
- PTD4_FN, PTD4_OUT, PTD4_IN, PTD4_IN_PU,
- PTD3_FN, PTD3_OUT, PTD3_IN, PTD3_IN_PU,
- PTD2_FN, PTD2_OUT, PTD2_IN, PTD2_IN_PU,
- PTD1_FN, PTD1_OUT, PTD1_IN, PTD1_IN_PU,
- PTD0_FN, PTD0_OUT, PTD0_IN, PTD0_IN_PU }
- },
- { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
- PTE7_FN, PTE7_OUT, PTE7_IN, PTE7_IN_PU,
- PTE6_FN, PTE6_OUT, PTE6_IN, PTE6_IN_PU,
- PTE5_FN, PTE5_OUT, PTE5_IN, PTE5_IN_PU,
- PTE4_FN, PTE4_OUT, PTE4_IN, PTE4_IN_PU,
- PTE3_FN, PTE3_OUT, PTE3_IN, PTE3_IN_PU,
- PTE2_FN, PTE2_OUT, PTE2_IN, PTE2_IN_PU,
- PTE1_FN, PTE1_OUT, PTE1_IN, PTE1_IN_PU,
- PTE0_FN, PTE0_OUT, PTE0_IN, PTE0_IN_PU }
- },
- { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
- PTF7_FN, PTF7_OUT, PTF7_IN, PTF7_IN_PU,
- PTF6_FN, PTF6_OUT, PTF6_IN, PTF6_IN_PU,
- PTF5_FN, PTF5_OUT, PTF5_IN, PTF5_IN_PU,
- PTF4_FN, PTF4_OUT, PTF4_IN, PTF4_IN_PU,
- PTF3_FN, PTF3_OUT, PTF3_IN, PTF3_IN_PU,
- PTF2_FN, PTF2_OUT, PTF2_IN, PTF2_IN_PU,
- PTF1_FN, PTF1_OUT, PTF1_IN, PTF1_IN_PU,
- PTF0_FN, PTF0_OUT, PTF0_IN, PTF0_IN_PU }
- },
- { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
- PTG7_FN, PTG7_OUT, PTG7_IN, PTG7_IN_PU ,
- PTG6_FN, PTG6_OUT, PTG6_IN, PTG6_IN_PU ,
- PTG5_FN, PTG5_OUT, PTG5_IN, 0,
- PTG4_FN, PTG4_OUT, PTG4_IN, PTG4_IN_PU ,
- PTG3_FN, PTG3_OUT, PTG3_IN, 0,
- PTG2_FN, PTG2_OUT, PTG2_IN, 0,
- PTG1_FN, PTG1_OUT, PTG1_IN, 0,
- PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
- },
- { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
- PTH7_FN, PTH7_OUT, PTH7_IN, PTH7_IN_PU,
- PTH6_FN, PTH6_OUT, PTH6_IN, PTH6_IN_PU,
- PTH5_FN, PTH5_OUT, PTH5_IN, PTH5_IN_PU,
- PTH4_FN, PTH4_OUT, PTH4_IN, PTH4_IN_PU,
- PTH3_FN, PTH3_OUT, PTH3_IN, PTH3_IN_PU,
- PTH2_FN, PTH2_OUT, PTH2_IN, PTH2_IN_PU,
- PTH1_FN, PTH1_OUT, PTH1_IN, PTH1_IN_PU,
- PTH0_FN, PTH0_OUT, PTH0_IN, PTH0_IN_PU }
- },
- { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
- PTI7_FN, PTI7_OUT, PTI7_IN, PTI7_IN_PU,
- PTI6_FN, PTI6_OUT, PTI6_IN, PTI6_IN_PU,
- PTI5_FN, PTI5_OUT, PTI5_IN, 0,
- PTI4_FN, PTI4_OUT, PTI4_IN, PTI4_IN_PU,
- PTI3_FN, PTI3_OUT, PTI3_IN, PTI3_IN_PU,
- PTI2_FN, PTI2_OUT, PTI2_IN, PTI2_IN_PU,
- PTI1_FN, PTI1_OUT, PTI1_IN, PTI1_IN_PU,
- PTI0_FN, PTI0_OUT, PTI0_IN, PTI0_IN_PU }
- },
- { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
- 0, 0, 0, 0, /* reserved: always set 1 */
- PTJ6_FN, PTJ6_OUT, PTJ6_IN, PTJ6_IN_PU,
- PTJ5_FN, PTJ5_OUT, PTJ5_IN, PTJ5_IN_PU,
- PTJ4_FN, PTJ4_OUT, PTJ4_IN, PTJ4_IN_PU,
- PTJ3_FN, PTJ3_OUT, PTJ3_IN, PTJ3_IN_PU,
- PTJ2_FN, PTJ2_OUT, PTJ2_IN, PTJ2_IN_PU,
- PTJ1_FN, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU,
- PTJ0_FN, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU }
- },
- { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
- PTK7_FN, PTK7_OUT, PTK7_IN, PTK7_IN_PU,
- PTK6_FN, PTK6_OUT, PTK6_IN, PTK6_IN_PU,
- PTK5_FN, PTK5_OUT, PTK5_IN, PTK5_IN_PU,
- PTK4_FN, PTK4_OUT, PTK4_IN, PTK4_IN_PU,
- PTK3_FN, PTK3_OUT, PTK3_IN, PTK3_IN_PU,
- PTK2_FN, PTK2_OUT, PTK2_IN, PTK2_IN_PU,
- PTK1_FN, PTK1_OUT, PTK1_IN, PTK1_IN_PU,
- PTK0_FN, PTK0_OUT, PTK0_IN, PTK0_IN_PU }
- },
- { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
- 0, 0, 0, 0, /* reserved: always set 1 */
- PTL6_FN, PTL6_OUT, PTL6_IN, PTL6_IN_PU,
- PTL5_FN, PTL5_OUT, PTL5_IN, PTL5_IN_PU,
- PTL4_FN, PTL4_OUT, PTL4_IN, PTL4_IN_PU,
- PTL3_FN, PTL3_OUT, PTL3_IN, PTL3_IN_PU,
- PTL2_FN, PTL2_OUT, PTL2_IN, PTL2_IN_PU,
- PTL1_FN, PTL1_OUT, PTL1_IN, PTL1_IN_PU,
- PTL0_FN, PTL0_OUT, PTL0_IN, PTL0_IN_PU }
- },
- { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
- PTM7_FN, PTM7_OUT, PTM7_IN, PTM7_IN_PU,
- PTM6_FN, PTM6_OUT, PTM6_IN, PTM6_IN_PU,
- PTM5_FN, PTM5_OUT, PTM5_IN, PTM5_IN_PU,
- PTM4_FN, PTM4_OUT, PTM4_IN, PTM4_IN_PU,
- PTM3_FN, PTM3_OUT, PTM3_IN, 0,
- PTM2_FN, PTM2_OUT, PTM2_IN, 0,
- PTM1_FN, PTM1_OUT, PTM1_IN, 0,
- PTM0_FN, PTM0_OUT, PTM0_IN, 0 }
- },
- { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) {
- 0, 0, 0, 0, /* reserved: always set 1 */
- PTN6_FN, PTN6_OUT, PTN6_IN, 0,
- PTN5_FN, PTN5_OUT, PTN5_IN, 0,
- PTN4_FN, PTN4_OUT, PTN4_IN, PTN4_IN_PU,
- PTN3_FN, PTN3_OUT, PTN3_IN, PTN3_IN_PU,
- PTN2_FN, PTN2_OUT, PTN2_IN, PTN2_IN_PU,
- PTN1_FN, PTN1_OUT, PTN1_IN, PTN1_IN_PU,
- PTN0_FN, PTN0_OUT, PTN0_IN, PTN0_IN_PU }
- },
- { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
- PTO7_FN, PTO7_OUT, PTO7_IN, PTO7_IN_PU,
- PTO6_FN, PTO6_OUT, PTO6_IN, PTO6_IN_PU,
- PTO5_FN, PTO5_OUT, PTO5_IN, PTO5_IN_PU,
- PTO4_FN, PTO4_OUT, PTO4_IN, PTO4_IN_PU,
- PTO3_FN, PTO3_OUT, PTO3_IN, PTO3_IN_PU,
- PTO2_FN, PTO2_OUT, PTO2_IN, PTO2_IN_PU,
- PTO1_FN, PTO1_OUT, PTO1_IN, PTO1_IN_PU,
- PTO0_FN, PTO0_OUT, PTO0_IN, PTO0_IN_PU }
- },
-#if 0 /* FIXME: Remove it? */
- { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
- 0, 0, 0, 0, /* reserved: always set 1 */
- PTP6_FN, PTP6_OUT, PTP6_IN, 0,
- PTP5_FN, PTP5_OUT, PTP5_IN, 0,
- PTP4_FN, PTP4_OUT, PTP4_IN, 0,
- PTP3_FN, PTP3_OUT, PTP3_IN, 0,
- PTP2_FN, PTP2_OUT, PTP2_IN, 0,
- PTP1_FN, PTP1_OUT, PTP1_IN, 0,
- PTP0_FN, PTP0_OUT, PTP0_IN, 0 }
- },
-#endif
- { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) {
- 0, 0, 0, 0, /* reserved: always set 1 */
- PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0,
- PTQ5_FN, PTQ5_OUT, PTQ5_IN, 0,
- PTQ4_FN, PTQ4_OUT, PTQ4_IN, 0,
- PTQ3_FN, PTQ3_OUT, PTQ3_IN, 0,
- PTQ2_FN, PTQ2_OUT, PTQ2_IN, 0,
- PTQ1_FN, PTQ1_OUT, PTQ1_IN, 0,
- PTQ0_FN, PTQ0_OUT, PTQ0_IN, 0 }
- },
- { PINMUX_CFG_REG("PRCR", 0xffec0022, 16, 2) {
- PTR7_FN, PTR7_OUT, PTR7_IN, 0,
- PTR6_FN, PTR6_OUT, PTR6_IN, 0,
- PTR5_FN, PTR5_OUT, PTR5_IN, 0,
- PTR4_FN, PTR4_OUT, PTR4_IN, 0,
- PTR3_FN, PTR3_OUT, PTR3_IN, 0,
- PTR2_FN, PTR2_OUT, PTR2_IN, 0,
- PTR1_FN, PTR1_OUT, PTR1_IN, 0,
- PTR0_FN, PTR0_OUT, PTR0_IN, 0 }
- },
- { PINMUX_CFG_REG("PSCR", 0xffec0024, 16, 2) {
- PTS7_FN, PTS7_OUT, PTS7_IN, 0,
- PTS6_FN, PTS6_OUT, PTS6_IN, 0,
- PTS5_FN, PTS5_OUT, PTS5_IN, 0,
- PTS4_FN, PTS4_OUT, PTS4_IN, 0,
- PTS3_FN, PTS3_OUT, PTS3_IN, 0,
- PTS2_FN, PTS2_OUT, PTS2_IN, 0,
- PTS1_FN, PTS1_OUT, PTS1_IN, 0,
- PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
- },
- { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
- PTT7_FN, PTT7_OUT, PTT7_IN, PTO7_IN_PU,
- PTT6_FN, PTT6_OUT, PTT6_IN, PTO6_IN_PU,
- PTT5_FN, PTT5_OUT, PTT5_IN, PTO5_IN_PU,
- PTT4_FN, PTT4_OUT, PTT4_IN, PTO4_IN_PU,
- PTT3_FN, PTT3_OUT, PTT3_IN, PTO3_IN_PU,
- PTT2_FN, PTT2_OUT, PTT2_IN, PTO2_IN_PU,
- PTT1_FN, PTT1_OUT, PTT1_IN, PTO1_IN_PU,
- PTT0_FN, PTT0_OUT, PTT0_IN, PTO0_IN_PU }
- },
- { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
- PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
- PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU,
- PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU,
- PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU,
- PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU,
- PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU,
- PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU,
- PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU }
- },
- { PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) {
- PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU,
- PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU,
- PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU,
- PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
- PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
- PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
- PTV1_FN, PTV1_OUT, PTV1_IN, 0,
- PTV0_FN, PTV0_OUT, PTV0_IN, 0 }
- },
- { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) {
- PTW7_FN, PTW7_OUT, PTW7_IN, 0,
- PTW6_FN, PTW6_OUT, PTW6_IN, 0,
- PTW5_FN, PTW5_OUT, PTW5_IN, 0,
- PTW4_FN, PTW4_OUT, PTW4_IN, 0,
- PTW3_FN, PTW3_OUT, PTW3_IN, 0,
- PTW2_FN, PTW2_OUT, PTW2_IN, 0,
- PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
- PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
- },
- { PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) {
- PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU,
- PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU,
- PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU,
- PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU,
- PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU,
- PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU,
- PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU,
- PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU }
- },
- { PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) {
- PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU,
- PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU,
- PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU,
- PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU,
- PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU,
- PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU,
- PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU,
- PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
- },
- { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
- PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0,
- PTZ6_FN, PTZ6_OUT, PTZ6_IN, 0,
- PTZ5_FN, PTZ5_OUT, PTZ5_IN, 0,
- PTZ4_FN, PTZ4_OUT, PTZ4_IN, 0,
- PTZ3_FN, PTZ3_OUT, PTZ3_IN, 0,
- PTZ2_FN, PTZ2_OUT, PTZ2_IN, 0,
- PTZ1_FN, PTZ1_OUT, PTZ1_IN, 0,
- PTZ0_FN, PTZ0_OUT, PTZ0_IN, 0 }
- },
-
- { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) {
- PS0_15_FN1, PS0_15_FN2,
- PS0_14_FN1, PS0_14_FN2,
- PS0_13_FN1, PS0_13_FN2,
- PS0_12_FN1, PS0_12_FN2,
- PS0_11_FN1, PS0_11_FN2,
- PS0_10_FN1, PS0_10_FN2,
- PS0_9_FN1, PS0_9_FN2,
- PS0_8_FN1, PS0_8_FN2,
- PS0_7_FN1, PS0_7_FN2,
- PS0_6_FN1, PS0_6_FN2,
- PS0_5_FN1, PS0_5_FN2,
- PS0_4_FN1, PS0_4_FN2,
- PS0_3_FN1, PS0_3_FN2,
- PS0_2_FN1, PS0_2_FN2,
- 0, 0,
- 0, 0, }
- },
- { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- PS1_10_FN1, PS1_10_FN2,
- PS1_9_FN1, PS1_9_FN2,
- PS1_8_FN1, PS1_8_FN2,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- PS1_2_FN1, PS1_2_FN2,
- 0, 0,
- 0, 0, }
- },
- { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) {
- 0, 0,
- 0, 0,
- PS2_13_FN1, PS2_13_FN2,
- PS2_12_FN1, PS2_12_FN2,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- PS2_7_FN1, PS2_7_FN2,
- PS2_6_FN1, PS2_6_FN2,
- PS2_5_FN1, PS2_5_FN2,
- PS2_4_FN1, PS2_4_FN2,
- 0, 0,
- PS2_2_FN1, PS2_2_FN2,
- 0, 0,
- 0, 0, }
- },
- { PINMUX_CFG_REG("PSEL3", 0xffec0076, 16, 1) {
- PS3_15_FN1, PS3_15_FN2,
- PS3_14_FN1, PS3_14_FN2,
- PS3_13_FN1, PS3_13_FN2,
- PS3_12_FN1, PS3_12_FN2,
- PS3_11_FN1, PS3_11_FN2,
- PS3_10_FN1, PS3_10_FN2,
- PS3_9_FN1, PS3_9_FN2,
- PS3_8_FN1, PS3_8_FN2,
- PS3_7_FN1, PS3_7_FN2,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- PS3_2_FN1, PS3_2_FN2,
- PS3_1_FN1, PS3_1_FN2,
- 0, 0, }
- },
-
- { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) {
- 0, 0,
- PS4_14_FN1, PS4_14_FN2,
- PS4_13_FN1, PS4_13_FN2,
- PS4_12_FN1, PS4_12_FN2,
- 0, 0,
- PS4_10_FN1, PS4_10_FN2,
- PS4_9_FN1, PS4_9_FN2,
- PS4_8_FN1, PS4_8_FN2,
- 0, 0,
- 0, 0,
- 0, 0,
- PS4_4_FN1, PS4_4_FN2,
- PS4_3_FN1, PS4_3_FN2,
- PS4_2_FN1, PS4_2_FN2,
- PS4_1_FN1, PS4_1_FN2,
- PS4_0_FN1, PS4_0_FN2, }
- },
- { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- PS5_11_FN1, PS5_11_FN2,
- PS5_10_FN1, PS5_10_FN2,
- PS5_9_FN1, PS5_9_FN2,
- PS5_8_FN1, PS5_8_FN2,
- PS5_7_FN1, PS5_7_FN2,
- PS5_6_FN1, PS5_6_FN2,
- PS5_5_FN1, PS5_5_FN2,
- PS5_4_FN1, PS5_4_FN2,
- PS5_3_FN1, PS5_3_FN2,
- PS5_2_FN1, PS5_2_FN2,
- 0, 0,
- 0, 0, }
- },
- { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) {
- PS6_15_FN1, PS6_15_FN2,
- PS6_14_FN1, PS6_14_FN2,
- PS6_13_FN1, PS6_13_FN2,
- PS6_12_FN1, PS6_12_FN2,
- PS6_11_FN1, PS6_11_FN2,
- PS6_10_FN1, PS6_10_FN2,
- PS6_9_FN1, PS6_9_FN2,
- PS6_8_FN1, PS6_8_FN2,
- PS6_7_FN1, PS6_7_FN2,
- PS6_6_FN1, PS6_6_FN2,
- PS6_5_FN1, PS6_5_FN2,
- PS6_4_FN1, PS6_4_FN2,
- PS6_3_FN1, PS6_3_FN2,
- PS6_2_FN1, PS6_2_FN2,
- PS6_1_FN1, PS6_1_FN2,
- PS6_0_FN1, PS6_0_FN2, }
- },
- { PINMUX_CFG_REG("PSEL7", 0xffec0082, 16, 1) {
- PS7_15_FN1, PS7_15_FN2,
- PS7_14_FN1, PS7_14_FN2,
- PS7_13_FN1, PS7_13_FN2,
- PS7_12_FN1, PS7_12_FN2,
- PS7_11_FN1, PS7_11_FN2,
- PS7_10_FN1, PS7_10_FN2,
- PS7_9_FN1, PS7_9_FN2,
- PS7_8_FN1, PS7_8_FN2,
- PS7_7_FN1, PS7_7_FN2,
- PS7_6_FN1, PS7_6_FN2,
- PS7_5_FN1, PS7_5_FN2,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0, }
- },
- { PINMUX_CFG_REG("PSEL8", 0xffec0084, 16, 1) {
- PS8_15_FN1, PS8_15_FN2,
- PS8_14_FN1, PS8_14_FN2,
- PS8_13_FN1, PS8_13_FN2,
- PS8_12_FN1, PS8_12_FN2,
- PS8_11_FN1, PS8_11_FN2,
- PS8_10_FN1, PS8_10_FN2,
- PS8_9_FN1, PS8_9_FN2,
- PS8_8_FN1, PS8_8_FN2,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0, }
- },
- {}
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("PADR", 0xffec0034, 8) {
- PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
- PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
- },
- { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) {
- PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
- PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
- },
- { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) {
- PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
- PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
- },
- { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) {
- PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
- PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
- },
- { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) {
- PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
- PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
- },
- { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) {
- PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
- PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
- },
- { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) {
- PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
- PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
- },
- { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) {
- PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
- PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
- },
- { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) {
- PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
- PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
- },
- { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
- 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
- PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
- },
- { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
- PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
- PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
- },
- { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
- 0, PTL6_DATA, PTL5_DATA, PTL4_DATA,
- PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
- },
- { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
- PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
- PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
- },
- { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
- 0, PTN6_DATA, PTN5_DATA, PTN4_DATA,
- PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
- },
- { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
- PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
- PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
- },
- { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
- PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
- PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
- },
- { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
- 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
- PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
- },
- { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) {
- PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
- PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
- },
- { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) {
- PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
- PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
- },
- { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
- PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
- PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
- },
- { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
- PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
- PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
- },
- { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) {
- PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
- PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
- },
- { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) {
- PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
- PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
- },
- { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) {
- PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
- PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
- },
- { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) {
- PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
- PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
- },
- { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) {
- PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
- PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
- },
- { },
-};
-
-static struct pinmux_info sh7757_pinmux_info = {
- .name = "sh7757_pfc",
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_PTA0,
- .last_gpio = GPIO_FN_ON_DQ0,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
static int __init plat_pinmux_setup(void)
{
- return sh_pfc_register_info(NULL, NULL, 0, &sh7757_pinmux_info);
+ return sh_pfc_register("pfc-sh7757", NULL, 0);
}
arch_initcall(plat_pinmux_setup);
--
1.7.8.6
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox