From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Nick Gaugler" Subject: unexpected IO-APIC Date: Thu, 27 Feb 2003 02:14:15 -0600 Sender: linux-smp-owner@vger.kernel.org Message-ID: <001501c2de38$385dc740$b3691e41@LAPTOP> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Return-path: List-Id: Content-Type: text/plain; charset="us-ascii" To: linux-smp@vger.kernel.org I am running the following configuration: Super Micro X5DPR-8G2 Motherboard (http://www.supermicro.com/PRODUCT/MotherBoards/E7501/X5DPR-8G2.htm) 1 P4 Xeon 2.4Ghz 533Mhz FSB with Hyper Threading 2GB DDR226 ECC Registered RAM Linux 2.4.20 (ftp.kernel.org) CPU: L1 I cache: 0K, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 0 Intel machine check architecture supported. Intel machine check reporting enabled on CPU#0. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 Enabling fast FPU save and restore... done. Enabling unmasked SIMD FPU exception support... done. Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX CPU: L1 I cache: 0K, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 0 Intel machine check reporting enabled on CPU#0. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 CPU0: Intel(R) Xeon(TM) CPU 2.40GHz stepping 07 per-CPU timeslice cutoff: 1462.99 usecs. enabled ExtINT on CPU#0 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Booting processor 1/1 eip 2000 Initializing CPU#1 masked ExtINT on CPU#1 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Calibrating delay loop... 4797.23 BogoMIPS CPU: L1 I cache: 0K, L1 D cache: 8K CPU: L2 cache: 512K CPU: Physical Processor ID: 0 Intel machine check reporting enabled on CPU#1. CPU: After generic, caps: bfebfbff 00000000 00000000 00000000 CPU: Common caps: bfebfbff 00000000 00000000 00000000 CPU1: Intel(R) Xeon(TM) CPU 2.40GHz stepping 07 Total of 2 processors activated (9581.36 BogoMIPS). cpu_sibling_map[0] = 1 cpu_sibling_map[1] = 0 ENABLING IO-APIC IRQs Setting 2 in the phys_id_present_map ....changing IO-APIC physical APIC ID to 2 ... ok. Setting 3 in the phys_id_present_map ....changing IO-APIC physical APIC ID to 3 ... ok. Setting 4 in the phys_id_present_map ....changing IO-APIC physical APIC ID to 4 ... ok. init IO_APIC IRQs IO-APIC (apicid-pin) 2-0, 2-10, 2-11, 2-17, 2-20, 2-21, 2-22, 2-23, 3-0, 3-1, 3-2, 3-3, 3-6, 3-7, 3-8, 3-9, 3-10, 3-11, 3-12, 3-13, 3-14, 3-15, 3-16, 3-17, 3-18, 3-19, 3-20, 3-21, 3-22, 3-23, 4-0, 4-1, 4-2, 4-3, 4-4, 4-5, 4- 8, 4-9, 4-10, 4-11, 4-12, 4-13, 4-14, 4-15, 4-16, 4-17, 4-18, 4-19, 4-20, 4-21, 4-22, 4-23 not connected. ...TIMER: vector=0x31 pin1=2 pin2=0 number of MP IRQ sources: 22. number of IO-APIC #2 registers: 24. number of IO-APIC #3 registers: 24. number of IO-APIC #4 registers: 24. testing the IO APIC....................... IO APIC #2...... ..... register #00: 02008000 ........ : physical APIC id: 02 WARNING: unexpected IO-APIC, please mail to linux-smp@vger.kernel.org ..... register #01: 00178020 ........ : max redirection entries: 0017 ........ : PRQ implemented: 1 ........ : IO APIC version: 0020 ..... register #02: 00000000 ........ : arbitration: 00 ..... IRQ redirection table: NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: 00 000 00 1 0 0 0 0 0 0 00 01 003 03 0 0 0 0 0 1 1 39 02 003 03 0 0 0 0 0 1 1 31 03 003 03 0 0 0 0 0 1 1 41 04 003 03 0 0 0 0 0 1 1 49 05 003 03 0 0 0 0 0 1 1 51 06 003 03 0 0 0 0 0 1 1 59 07 003 03 0 0 0 0 0 1 1 61 08 003 03 0 0 0 0 0 1 1 69 09 003 03 0 0 0 0 0 1 1 71 0a 000 00 1 0 0 0 0 0 0 00 0b 000 00 1 0 0 0 0 0 0 00 0c 003 03 0 0 0 0 0 1 1 79 0d 003 03 0 0 0 0 0 1 1 81 0e 003 03 0 0 0 0 0 1 1 89 0f 003 03 0 0 0 0 0 1 1 91 10 003 03 1 1 0 1 0 1 1 99 11 000 00 1 0 0 0 0 0 0 00 12 003 03 1 1 0 1 0 1 1 A1 13 003 03 1 1 0 1 0 1 1 A9 14 000 00 1 0 0 0 0 0 0 00 15 000 00 1 0 0 0 0 0 0 00 16 000 00 1 0 0 0 0 0 0 00 17 000 00 1 0 0 0 0 0 0 00 IO APIC #3...... ..... register #00: 03000000 ........ : physical APIC id: 03 ..... register #01: 00178020 ........ : max redirection entries: 0017 ........ : PRQ implemented: 1 ........ : IO APIC version: 0020 ..... register #02: 03000000 ........ : arbitration: 03 ..... IRQ redirection table: NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: 00 000 00 1 0 0 0 0 0 0 00 01 000 00 1 0 0 0 0 0 0 00 02 000 00 1 0 0 0 0 0 0 00 03 000 00 1 0 0 0 0 0 0 00 04 003 03 1 1 0 1 0 1 1 B1 05 003 03 1 1 0 1 0 1 1 B9 06 000 00 1 0 0 0 0 0 0 00 07 000 00 1 0 0 0 0 0 0 00 08 000 00 1 0 0 0 0 0 0 00 09 000 00 1 0 0 0 0 0 0 00 0a 000 00 1 0 0 0 0 0 0 00 0b 000 00 1 0 0 0 0 0 0 00 0c 000 00 1 0 0 0 0 0 0 00 0d 000 00 1 0 0 0 0 0 0 00 0e 000 00 1 0 0 0 0 0 0 00 0f 000 00 1 0 0 0 0 0 0 00 10 000 00 1 0 0 0 0 0 0 00 11 000 00 1 0 0 0 0 0 0 00 12 000 00 1 0 0 0 0 0 0 00 13 000 00 1 0 0 0 0 0 0 00 14 000 00 1 0 0 0 0 0 0 00 15 000 00 1 0 0 0 0 0 0 00 16 000 00 1 0 0 0 0 0 0 00 17 000 00 1 0 0 0 0 0 0 00 IO APIC #4...... ..... register #00: 04000000 ........ : physical APIC id: 04 ..... register #01: 00178020 ........ : max redirection entries: 0017 ........ : PRQ implemented: 1 ........ : IO APIC version: 0020 ..... register #02: 04000000 ........ : arbitration: 04 ..... IRQ redirection table: NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect: 00 000 00 1 0 0 0 0 0 0 00 01 000 00 1 0 0 0 0 0 0 00 02 000 00 1 0 0 0 0 0 0 00 03 000 00 1 0 0 0 0 0 0 00 04 000 00 1 0 0 0 0 0 0 00 05 000 00 1 0 0 0 0 0 0 00 06 003 03 1 1 0 1 0 1 1 C1 07 003 03 1 1 0 1 0 1 1 C9 08 000 00 1 0 0 0 0 0 0 00 09 000 00 1 0 0 0 0 0 0 00 0a 000 00 1 0 0 0 0 0 0 00 0b 000 00 1 0 0 0 0 0 0 00 0c 000 00 1 0 0 0 0 0 0 00 0d 000 00 1 0 0 0 0 0 0 00 0e 000 00 1 0 0 0 0 0 0 00 0f 000 00 1 0 0 0 0 0 0 00 10 000 00 1 0 0 0 0 0 0 00 11 000 00 1 0 0 0 0 0 0 00 12 000 00 1 0 0 0 0 0 0 00 13 000 00 1 0 0 0 0 0 0 00 14 000 00 1 0 0 0 0 0 0 00 15 000 00 1 0 0 0 0 0 0 00 16 000 00 1 0 0 0 0 0 0 00 17 000 00 1 0 0 0 0 0 0 00 IRQ to pin mappings: IRQ0 -> 0:2 IRQ1 -> 0:1 IRQ3 -> 0:3 IRQ4 -> 0:4 IRQ5 -> 0:5 IRQ6 -> 0:6 IRQ7 -> 0:7 IRQ8 -> 0:8 IRQ9 -> 0:9 IRQ12 -> 0:12 IRQ13 -> 0:13 IRQ14 -> 0:14 IRQ15 -> 0:15 IRQ16 -> 0:16 IRQ18 -> 0:18 IRQ19 -> 0:19 IRQ28 -> 1:4 IRQ29 -> 1:5 IRQ54 -> 2:6 IRQ55 -> 2:7 ..................................... done. Using local APIC timer interrupts. calibrating APIC timer ... ...... CPU clock speed is 2399.3442 MHz. ...... host bus clock speed is 133.2968 MHz. cpu: 0, clocks: 1332968, slice: 444322 CPU0 cpu: 1, clocks: 1332968, slice: 444322 CPU1 checking TSC synchronization across CPUs: passed. Waiting on wait_init_idle (map = 0x2) All processors have done init_idle Please let me know what to do to rectify this warning, also CC me in all replies, I am not subscribed to the list. Nick