public inbox for linux-smp@vger.kernel.org
 help / color / mirror / Atom feed
From: Klaas Zweck <khz@tzi.org>
To: linux-smp <linux-smp@vger.kernel.org>
Subject: timer on just one cpu in linux mp-system
Date: Thu, 18 Apr 2002 00:25:07 +0200	[thread overview]
Message-ID: <3CBDF643.4010103@tzi.org> (raw)

hi,

my question is how to make a linux mp-kernel
react on timer interrupts on just _one_ cpu?

my system is a pentium3 smp computer with
a serverworks chipset.

boot.msg says:

 >Intel MultiProcessor Specification v1.4
<4>    Virtual Wire compatibility mode.
<4>OEM ID: OEM00000 Product ID: PROD00000000 APIC at: 0xFEE00000
<4>Processor #3 Pentium(tm) Pro APIC version 17
<4>    Floating point unit present.
<4>    Machine Exception supported.
<4>    64 bit compare & exchange supported.
<4>    Internal APIC present.
<4>    SEP present.
<4>    MTRR  present.
<4>    PGE  present.
<4>    MCA  present.
<4>    CMOV  present.
<4>    PAT  present.
<4>    PSE  present.
<4>    PSN  present.
<4>    MMX  present.
<4>    FXSR  present.
<4>    XMM  present.
<4>    Bootup CPU

and so for the second cpu (except for the bootup cpu line)
cat /proc/interrupts says that timer interrupt
is number 0 and it is always counted on both cpus.
(they diifer slightly but both counters are updated )

example of cat /proc/interrupts

           CPU0       CPU1
  0:     105123      96263    IO-APIC-edge  timer  

in the function setup_local_APIC() in arch/i386/kernel/apic.c
i did the following to (try) to disable timer interrupt on cpu1:

if ( smp_processor_id() ){
 
          lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) |
              APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;

--->   lvtt1_value = lvtt1_value | APIC_LVT_MASKED;
          printk( "KHZ: Write to AP local APIC (Timer) %x \n", 
lvtt1_value );
 
        } else {
            lvtt1_value = SET_APIC_TIMER_BASE(APIC_TIMER_BASE_DIV) |
                APIC_LVT_TIMER_PERIODIC | LOCAL_TIMER_VECTOR;
            printk( "KHZ: Write to BP local APIC (Timer) %x \n", 
lvtt1_value );
} 

---> means my try to mask the timer interrupt for any but the boot cpu.
( since the boot cpu has smp_processor_id() zero ).

but it didn't work since cat /proc/interrupts still reports timer 
interrupts on
both cpus.

even calling clear_local_APIC() at the end of setup_local_APIC()
(both in arch/i386/kernel/apic.c)
which should set all local apic local vector table (LVT) entries to
masked state didn't work.

still cat /proc/interrupts reports timer irqs on both cpus.

what am i doing wrong ??

thanks and greetings,
klaas


             reply	other threads:[~2002-04-17 22:25 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2002-04-17 22:25 Klaas Zweck [this message]
2002-04-21 15:31 ` timer on just one cpu in linux mp-system Klaas Zweck
2002-04-21 17:30   ` Kernel doesn't see both CPU's J. Milgram

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3CBDF643.4010103@tzi.org \
    --to=khz@tzi.org \
    --cc=linux-smp@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox