From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Matthew Faulkner" Subject: interrupt processing Date: Fri, 15 Jun 2007 15:46:39 +0100 Message-ID: Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Return-path: DKIM-Signature: a=rsa-sha1; c=relaxed/relaxed; d=gmail.com; s=beta; h=domainkey-signature:received:received:message-id:date:from:to:subject:mime-version:content-type:content-transfer-encoding:content-disposition; b=qvCn6Qcfj6dAaB0STRERQ4n9gYDG6lRD7DUSEaZRUVCL4iRG5GYN187tlCi2c04kIUZXj6fl4eAm4OgdCxEFGRa937kTczFsfgqa2Tq4b8vxPw8PVsVsLiNFo/2T3fr8xXumgJWnibcup6lySJDxRgoRlcq8BLrPHdH+gi8ClCk= Content-Disposition: inline Sender: linux-smp-owner@vger.kernel.org List-Id: Content-Type: text/plain; charset="us-ascii"; format="flowed" To: linux-smp@vger.kernel.org Probably a very simple question, but can anyone tell me how the kernel decides which CPU (or core) a hardware interrupt gets handled by? Cheers