From: Sergey Matyukevich <geomatsi@gmail.com>
To: linux-snps-arc@lists.infradead.org
Cc: Vineet Gupta <vgupta@kernel.org>,
Vladimir Isaev <isaev@synopsys.com>,
Sergey Matyukevich <geomatsi@gmail.com>,
Sergey Matyukevich <sergey.matyukevich@synopsys.com>
Subject: [RFC PATCH 07/13] ARCv2: memset: rewrite using double load/stores
Date: Tue, 22 Feb 2022 17:15:00 +0300 [thread overview]
Message-ID: <20220222141506.4003433-8-geomatsi@gmail.com> (raw)
In-Reply-To: <20220222141506.4003433-1-geomatsi@gmail.com>
From: Vineet Gupta <vgupta@kernel.org>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
---
arch/arc/lib/memset-archs.S | 112 ++++++++++++++----------------------
1 file changed, 43 insertions(+), 69 deletions(-)
diff --git a/arch/arc/lib/memset-archs.S b/arch/arc/lib/memset-archs.S
index 330e22f7cf3c..a9a0ccef761d 100644
--- a/arch/arc/lib/memset-archs.S
+++ b/arch/arc/lib/memset-archs.S
@@ -5,6 +5,7 @@
#include <linux/linkage.h>
#include <asm/cache.h>
+#include <asm/assembler.h>
/*
* The memset implementation below is optimized to use prefetchw and prealloc
@@ -55,7 +56,7 @@ ENTRY_CFI(memset)
1:
#endif
-;;; Destination is aligned
+ ; promote memset pattern from char to int (double actually for STD)
and r1, r1, 0xFF
asl r4, r1, 8
or r4, r4, r1
@@ -63,75 +64,48 @@ ENTRY_CFI(memset)
or r5, r5, r4
mov r4, r5
- sub3 lp_count, r2, 8
- cmp r2, 64
- bmsk.hi r2, r2, 5
- mov.ls lp_count, 0
- add3.hi r2, r2, 8
-
-;;; Convert len to Dwords, unfold x8
- lsr.f lp_count, lp_count, 6
-
- lpnz @.Lset64bytes
- ;; LOOP START
- PREALLOC_INSTR r3, 64 ; alloc next line w/o fetching
-
-#ifdef CONFIG_ARC_HAS_LL64
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
-#else
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
-#endif
-.Lset64bytes:
-
- lsr.f lp_count, r2, 5 ;Last remaining max 124 bytes
- lpnz .Lset32bytes
- ;; LOOP START
-#ifdef CONFIG_ARC_HAS_LL64
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
- std.ab r4, [r3, 8]
-#else
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
- st.ab r4, [r3, 4]
-#endif
-.Lset32bytes:
-
- and.f lp_count, r2, 0x1F ;Last remaining 31 bytes
-.Lsmallchunk:
- lpnz .Lcopy3bytes
- ;; LOOP START
+ ; Loop #a:
+ ; - Updates 1 cache line worth data (64 bytes) per iteration
+ ; - PREALLOC the next line.
+ ;
+ ; = Only entered if at least 2 lines worth of work (i.e. >= 128 bytes),
+ ; else PREALLOC for next can "bleed" past end of buffer, causing data
+ ; corruption issue if that line is owned by some other core.
+ ; = Last 64 bytes (even for min 128 bytes work) are NOT done here to
+ ; avoid PREALLOC issue
+
+ sub r6, r2, 64
+ cmp r2, 64
+ bmsk.hi r2, r2, 5 ; trailing 63 bytes
+ mov.ls r6, 0
+ add.hi r2, r2, 64 ; line skipped in loop below
+
+ lsr.f lp_count, r6, 6
+ lpnz 2f
+ PREALLOCR r3, 64
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+2:
+ ; Loop #b: Remaining 32 / 64 bytes
+ lsr.f lp_count, r2, 5
+ lpnz .Lbyteloop
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+ ST64.ab r4, r3, 8
+
+.Lbyteloop:
+ ; Loop #c: straggler 31 bytes
+ and.f lp_count, r2, 0x1F
+ lpnz 4f
stb.ab r1, [r3, 1]
-.Lcopy3bytes:
-
+4:
j [blink]
END_CFI(memset)
--
2.25.1
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next prev parent reply other threads:[~2022-02-22 14:15 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 14:14 [RFC PATCH 00/13] ARC: handle the lack of ZOL support Sergey Matyukevich
2022-02-22 14:14 ` [RFC PATCH 01/13] ARC: uaccess: elide unaligned handling if hardware supports Sergey Matyukevich
2022-02-22 14:14 ` [RFC PATCH 02/13] ARC: Kconfig: introduce option to disable ZOL Sergey Matyukevich
2022-02-22 14:14 ` [RFC PATCH 03/13] ARC: uaccess: drop CC_OPTIMIZE_FOR_SIZE Sergey Matyukevich
2022-02-22 14:14 ` [RFC PATCH 04/13] ARC: uaccess: elide ZOL, use double load/stores Sergey Matyukevich
2022-02-22 14:14 ` [RFC PATCH 05/13] ARCv2: memset: don't prefetch for len == 0 which happens a lot Sergey Matyukevich
2022-02-22 14:14 ` [RFC PATCH 06/13] ARCv2: memset: elide unaligned handling if hardware supports Sergey Matyukevich
2022-02-22 14:15 ` Sergey Matyukevich [this message]
2022-02-22 14:15 ` [RFC PATCH 08/13] ARC: string: use generic C code if no ZOL support Sergey Matyukevich
2022-02-22 14:15 ` [RFC PATCH 09/13] ARC: delay: elide ZOL Sergey Matyukevich
2022-02-22 14:15 ` [RFC PATCH 10/13] ARC: checksum: " Sergey Matyukevich
2022-02-22 14:15 ` [RFC PATCH 11/13] ARC: head: " Sergey Matyukevich
2022-02-22 14:15 ` [RFC PATCH 12/13] ARC: build: inhibit ZOL generation by compiler Sergey Matyukevich
2022-02-22 14:15 ` [RFC PATCH 13/13] ARC: pt_regs: handle the case when ZOL is not supported Sergey Matyukevich
2022-02-28 2:09 ` [RFC PATCH 00/13] ARC: handle the lack of ZOL support Vineet Gupta
2022-03-03 19:22 ` Sergey Matyukevich
2022-03-23 10:09 ` [RFC PATCH 00/13] ARC: handle the lack of ZOL supporty Sergey Matyukevich
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