From: Jai Luthra <j-luthra@ti.com>
To: Lars-Peter Clausen <lars@metafoo.de>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
Peter Ujfalusi <peter.ujfalusi@gmail.com>
Cc: <linux-sound@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<alsa-devel@alsa-project.org>, Jai Luthra <j-luthra@ti.com>
Subject: [PATCH 2/2] ASoC: ti: davinci-mcasp: Set min period size using FIFO config
Date: Tue, 4 Jun 2024 15:31:51 +0530 [thread overview]
Message-ID: <20240604-asoc_next-v1-2-e895c88e744d@ti.com> (raw)
In-Reply-To: <20240604-asoc_next-v1-0-e895c88e744d@ti.com>
The minimum period size was enforced to 64 as older devices integrating
McASP with EDMA used an internal FIFO of 64 samples.
With UDMA based platforms this internal McASP FIFO is optional, as the
DMA engine internally does some buffering which is already accounted for
when registering the platform. So we should read the actual FIFO
configuration (txnumevt/rxnumevt) instead of hardcoding frames.min to
64.
Signed-off-by: Jai Luthra <j-luthra@ti.com>
---
sound/soc/ti/davinci-mcasp.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/sound/soc/ti/davinci-mcasp.c b/sound/soc/ti/davinci-mcasp.c
index 1e760c315521..2a53fb7e72eb 100644
--- a/sound/soc/ti/davinci-mcasp.c
+++ b/sound/soc/ti/davinci-mcasp.c
@@ -70,6 +70,7 @@ struct davinci_mcasp_context {
struct davinci_mcasp_ruledata {
struct davinci_mcasp *mcasp;
int serializers;
+ u8 numevt;
};
struct davinci_mcasp {
@@ -1470,12 +1471,13 @@ static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
static int davinci_mcasp_hw_rule_min_periodsize(
struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule)
{
+ struct davinci_mcasp_ruledata *rd = rule->private;
struct snd_interval *period_size = hw_param_interval(params,
SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
struct snd_interval frames;
snd_interval_any(&frames);
- frames.min = 64;
+ frames.min = rd->numevt;
frames.integer = 1;
return snd_interval_refine(period_size, &frames);
@@ -1516,6 +1518,9 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
if (mcasp->serial_dir[i] == dir)
max_channels++;
}
+ ruledata->numevt = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+ mcasp->txnumevt :
+ mcasp->rxnumevt;
ruledata->serializers = max_channels;
ruledata->mcasp = mcasp;
max_channels *= tdm_slots;
@@ -1591,7 +1596,7 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
snd_pcm_hw_rule_add(substream->runtime, 0,
SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
- davinci_mcasp_hw_rule_min_periodsize, NULL,
+ davinci_mcasp_hw_rule_min_periodsize, ruledata,
SNDRV_PCM_HW_PARAM_PERIOD_SIZE, -1);
return 0;
--
2.43.0
next prev parent reply other threads:[~2024-06-04 10:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-04 10:01 [PATCH 0/2] Fixes for McASP and dmaengine_pcm Jai Luthra
2024-06-04 10:01 ` [PATCH 1/2] ALSA: dmaengine: Synchronize dma channel in prepare() Jai Luthra
2024-06-06 17:28 ` Péter Ujfalusi
2024-06-04 10:01 ` Jai Luthra [this message]
2024-06-06 17:13 ` [PATCH 2/2] ASoC: ti: davinci-mcasp: Set min period size using FIFO config Péter Ujfalusi
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