From: Cezary Rojewski <cezary.rojewski@intel.com>
To: broonie@kernel.org
Cc: tiwai@suse.com, perex@perex.cz,
amadeuszx.slawinski@linux.intel.com, linux-sound@vger.kernel.org,
liam.r.girdwood@intel.com,
Cezary Rojewski <cezary.rojewski@intel.com>
Subject: [PATCH v2 02/10] ASoC: Intel: avs: Ignore Vendor-space manipulation for ACE
Date: Mon, 7 Apr 2025 13:23:44 +0200 [thread overview]
Message-ID: <20250407112352.3720779-3-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20250407112352.3720779-1-cezary.rojewski@intel.com>
A number of Vendor Specific registers utilized on cAVS architecture
(SkyLake till RaptorLake) are not present on ACE hardware (MeteorLake
onward). Similarly, certain recommended procedures do not apply. Adjust
existing code to be ACE-friendly.
Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
sound/soc/intel/avs/avs.h | 1 +
sound/soc/intel/avs/core.c | 13 ++++++++++---
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/sound/soc/intel/avs/avs.h b/sound/soc/intel/avs/avs.h
index 585543f872fc..91872d1df97a 100644
--- a/sound/soc/intel/avs/avs.h
+++ b/sound/soc/intel/avs/avs.h
@@ -72,6 +72,7 @@ extern const struct avs_dsp_ops avs_tgl_dsp_ops;
#define AVS_PLATATTR_CLDMA BIT_ULL(0)
#define AVS_PLATATTR_IMR BIT_ULL(1)
+#define AVS_PLATATTR_ACE BIT_ULL(2)
#define avs_platattr_test(adev, attr) \
((adev)->spec->attributes & AVS_PLATATTR_##attr)
diff --git a/sound/soc/intel/avs/core.c b/sound/soc/intel/avs/core.c
index 8fbf33e30dfc..72a14dca1a1e 100644
--- a/sound/soc/intel/avs/core.c
+++ b/sound/soc/intel/avs/core.c
@@ -54,14 +54,17 @@ void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable)
{
u32 value = enable ? 0 : pgctl_mask;
- avs_hda_update_config_dword(&adev->base.core, AZX_PCIREG_PGCTL, pgctl_mask, value);
+ if (!avs_platattr_test(adev, ACE))
+ avs_hda_update_config_dword(&adev->base.core, AZX_PCIREG_PGCTL, pgctl_mask, value);
}
static void avs_hdac_clock_gating_enable(struct hdac_bus *bus, bool enable)
{
+ struct avs_dev *adev = hdac_to_avs(bus);
u32 value = enable ? cgctl_mask : 0;
- avs_hda_update_config_dword(bus, AZX_PCIREG_CGCTL, cgctl_mask, value);
+ if (!avs_platattr_test(adev, ACE))
+ avs_hda_update_config_dword(bus, AZX_PCIREG_CGCTL, cgctl_mask, value);
}
void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable)
@@ -71,6 +74,8 @@ void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable)
void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable)
{
+ if (avs_platattr_test(adev, ACE))
+ return;
if (enable) {
if (atomic_inc_and_test(&adev->l1sen_counter))
snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN,
@@ -99,6 +104,7 @@ static int avs_hdac_bus_init_streams(struct hdac_bus *bus)
static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
{
+ struct avs_dev *adev = hdac_to_avs(bus);
struct hdac_ext_link *hlink;
bool ret;
@@ -114,7 +120,8 @@ static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
/* Set DUM bit to address incorrect position reporting for capture
* streams. In order to do so, CTRL needs to be out of reset state
*/
- snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
+ if (!avs_platattr_test(adev, ACE))
+ snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
return ret;
}
--
2.25.1
next prev parent reply other threads:[~2025-04-07 11:06 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-07 11:23 [PATCH v2 00/10] ASoC: Intel: avs: Add support for FCL platform Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 01/10] ALSA: hda: Allow to fetch hlink by ID Cezary Rojewski
2025-04-07 11:23 ` Cezary Rojewski [this message]
2025-04-07 11:23 ` [PATCH v2 03/10] ASoC: Intel: avs: Read HW capabilities when possible Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 04/10] ASoC: Intel: avs: Relocate DSP status registers Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 05/10] ASoC: Intel: avs: PTL-based platforms support Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 06/10] ASoC: Intel: avs: PCM operations for LNL-based platforms Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 07/10] ASoC: Intel: avs: Dynamically assign ops for non-HDAudio DAIs Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 08/10] ASoC: Intel: avs: Conditionally add DMA config when creating Copier Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 09/10] ASoC: Intel: avs: Add boards definitions for FCL platform Cezary Rojewski
2025-04-07 11:23 ` [PATCH v2 10/10] ALSA: hda: Select avs-driver by default on FCL Cezary Rojewski
2025-04-07 13:31 ` [PATCH v2 00/10] ASoC: Intel: avs: Add support for FCL platform Girdwood, Liam R
2025-04-08 12:49 ` Mark Brown
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