From: "Sheetal ." <sheetal@nvidia.com>
To: <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>,
<lgirdwood@gmail.com>, <broonie@kernel.org>
Cc: <perex@perex.cz>, <tiwai@suse.com>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-sound@vger.kernel.org>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <spujar@nvidia.com>, <mkumard@nvidia.com>,
Sheetal <sheetal@nvidia.com>
Subject: [PATCH v2 11/11] ASoC: tegra: Tegra264 support in isomgr_bw
Date: Tue, 29 Apr 2025 05:59:41 +0000 [thread overview]
Message-ID: <20250429055941.901511-12-sheetal@nvidia.com> (raw)
In-Reply-To: <20250429055941.901511-1-sheetal@nvidia.com>
From: Sheetal <sheetal@nvidia.com>
Tegra264 supports max 32 channels, hence calculating the max
bandwidth using the channel info from soc_data.
Signed-off-by: Sheetal <sheetal@nvidia.com>
---
sound/soc/tegra/tegra_isomgr_bw.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/sound/soc/tegra/tegra_isomgr_bw.c b/sound/soc/tegra/tegra_isomgr_bw.c
index 18e802bca6a6..fa979960bc09 100644
--- a/sound/soc/tegra/tegra_isomgr_bw.c
+++ b/sound/soc/tegra/tegra_isomgr_bw.c
@@ -11,8 +11,8 @@
#include "tegra_isomgr_bw.h"
#include "tegra210_admaif.h"
-/* Max possible rate is 192KHz x 16channel x 4bytes */
-#define MAX_BW_PER_DEV 12288
+#define MAX_SAMPLE_RATE 192 /* KHz*/
+#define MAX_BYTES_PER_SAMPLE 4
int tegra_isomgr_adma_setbw(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai, bool is_running)
@@ -98,7 +98,8 @@ int tegra_isomgr_adma_register(struct device *dev)
}
adma_isomgr->max_pcm_device = admaif->soc_data->num_ch;
- adma_isomgr->max_bw = STREAM_TYPE * MAX_BW_PER_DEV * adma_isomgr->max_pcm_device;
+ adma_isomgr->max_bw = STREAM_TYPE * MAX_SAMPLE_RATE * MAX_BYTES_PER_SAMPLE *
+ admaif->soc_data->max_stream_ch * adma_isomgr->max_pcm_device;
for (i = 0; i < STREAM_TYPE; i++) {
adma_isomgr->bw_per_dev[i] = devm_kzalloc(dev, adma_isomgr->max_pcm_device *
--
2.17.1
prev parent reply other threads:[~2025-04-29 6:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-29 5:59 [PATCH v2 00/11] Add Tegra264 support in AHUB drivers Sheetal .
2025-04-29 5:59 ` [PATCH v2 01/11] dt-bindings: ASoC: admaif: Add missing properties Sheetal .
2025-04-30 7:33 ` Krzysztof Kozlowski
2025-04-29 5:59 ` [PATCH v2 02/11] dt-bindings: ASoC: Document Tegra264 APE support Sheetal .
2025-04-30 7:34 ` Krzysztof Kozlowski
2025-04-29 5:59 ` [PATCH v2 03/11] ASoC: tegra: CIF: Add Tegra264 support Sheetal .
2025-04-29 5:59 ` [PATCH v2 04/11] ASoC: tegra: ADMAIF: " Sheetal .
2025-04-29 5:59 ` [PATCH v2 05/11] ASoC: tegra: ASRC: Update ARAM address Sheetal .
2025-04-29 5:59 ` [PATCH v2 06/11] ASoC: tegra: Update PLL rate for Tegra264 Sheetal .
2025-04-29 5:59 ` [PATCH v2 07/11] ASoC: tegra: I2S: Add Tegra264 support Sheetal .
2025-04-29 5:59 ` [PATCH v2 08/11] ASoC: tegra: AMX: " Sheetal .
2025-04-29 5:59 ` [PATCH v2 09/11] ASoC: tegra: ADX: " Sheetal .
2025-04-29 5:59 ` [PATCH v2 10/11] ASoC: tegra: AHUB: " Sheetal .
2025-04-29 5:59 ` Sheetal . [this message]
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